onsemi-NTMS4807NR2G

Part #onsemi-NTMS4807NR2G
Download 
onsemi-NTMS4807NR2G
NTMS4807N  
Power MOSFET  
30
V
,
1
4.8 A, N-Channel, SO-8  
Features  
•
ꢀLow R  
to Minimize Conduction Losses  
DS(on)  
•
ꢀLow Capacitance to Minimize Driver Losses  
•
ꢀOptimized Gate Charge to Minimize Switching Losses  
•
ꢀThis is a Pb-Free Device  
V
R
MAX  
I MAX  
D
(BR)DSS  
DS(ON)  
Applications  
6.1 m
W
@ 10 V  
7.5 m
W
@ 4.5 V  
•
ꢀDisk Drives  
•
ꢀDC-DC Converters  
•
ꢀPrinters  
30 V  
14.8 A  
N-Channel  
MAXIMUM RATINGS
(T =
 
25
°
C unless otherwise stated)  
J
Parameter  
Drain-to-Source Voltage  
Symbol Value Unit  
D
V
DSS  
30  
20  
V
V
A
Gate-to-Source Voltage  
Continuous Drain  
V
GS  
I
D
T =
 
25
°
C  
12.2  
9.8  
A
G
Current R  
q
JA  
T =
 
70
°
C  
A
Power Dissipation R  
T =
 
25
°
C  
P
1.55  
W
A
q
A
D
JA  
JA  
S
Continuous Drain  
Current R  
I
D
T =
 
25
°
C  
A
9.1  
7.3  
MARKING DIAGRAM/  
PIN ASSIGNMENT  
q
JA  
T =
 
70
°
C  
A
Steady  
State  
Power Dissipation R  
T =
 
25
°
C  
A
P
I
0.86  
W
A
q
D
1
8
Source  
Source  
Source  
Gate  
Drain  
Drain  
Drain  
Drain  
1
Continuous Drain  
Current R
 
, t
v
10 s  
T =
 
25
°
C  
A
14.8  
11.8  
2.3  
SO-8  
CASE 751  
STYLE 12  
D
q
JA  
T =
 
70
°
C  
A
T
o
p View  
Power Dissipation  
R
T =
 
25
°
C  
A
P
D
W
q
JA  
4807N =
 
Device Code  
A
Pulsed Drain Current  
T =
 
25
°
C, t
 
= 10
m
s  
I
DM  
50  
A
= Assembly Location  
=
Y
e
ar  
A
p
Y
Operating Junction and Storage
T
e
mperature  
T ,  
J
T
stg  
-55 to  
150  
°
C  
WW  
G
= Work Week  
= Pb-Free Package  
Source Current (Body Diode)  
I
S
2.9  
98  
A
(Note: Microdot may be in either location)  
Single Pulse Drain-to-Source Avalanche Energy  
(T =
 
25
°
C, V
 
= 30
V
, V
 
=
1
0
V
,  
E
AS  
mJ  
J
DD  
GS  
I =
 
14 A
 
, L = 1.0 mH, R
 
= 25
W
)  
ORDERING INFORMATION  
L
pk  
G
†
Device  
Package  
Shipping  
2500/
T
a
pe & Reel  
Lead
T
e
mperature for Soldering Purposes  
(1/8
″
from case for 10 s)  
T
L
260  
°
C  
NTMS4807NR2G  
SO-8  
(Pb-Free)  
THERMAL RESISTANCE MAXIMUM RATINGS  
Parameter  
Symbol Value
 
Unit  
†For information on tape and reel specifications,  
including part orientation and tape sizes, please  
refer to our
T
a
pe and Reel Packaging Specification  
Brochure, BRD8011/D.  
°
C/W  
Junction-to-Ambient – Steady

Junction-to-Ambient – t
v

Junction-to-Foot (Drain)  
R
R
80.5  
54.9  
19.5  
145  
q
q
JA  
JA  
R
q
JF  
R
q
JA  
Stresses exceeding Maximum Ratings may damage the device. Maximum  
Ratings are stress ratings only. Functional operation above the Recommended  
Operating Conditions is not implied. Extended exposure to stresses above the  
Recommended Operating Conditions may affect device reliability.  
1. Surfacemounted
 
on FR4 board using 1 in sq pad size.  
2. Surfacemounted
 
on FR4 board using the minimum recommended pad size.  
©
ꢀ Semiconductor Components Industries, LLC, 2007  
December, 2007 – Rev. 0  
1
Publication Order Number:  
NTMS4807N/D  
 

NTMS4807N  
ELECTRICAL CHARACTERISTICS
(T =
 
25
°
C unless otherwise specified)  
J
Parameter  
Symbol  
Test Condition  
Min  
Typ  
Max  
Unit  
OFF CHARACTERISTICS  
Drain-to-Source Breakdown Voltage  
V
V
GS  
= 0
V
, I
 
=
2
50
m
A  
D
30  
V
(BR)DSS  
Drain-to-Source Breakdown Voltage  
T
e
mperature Coefficient  
V
/T  
J
29  
mV/
°
C  
(BR)DSS  
Zero Gate Voltage Drain Current  
I
T =
 
25
°
C  
1.0  
10  
m
A  
DSS  
J
V
GS  
= 0
V
, V
 
=
2
4 V  
DS  
T =
 
100
°
C  
J
Gate-to-Source Leakage Current  
ON CHARACTERISTICS

Gate Threshold Voltage  
I
V
= 0
V
, V
 
=  
GS  
20 V  
100  
nA  
GSS  
DS  
GS  
V
V
= V
 
, I
 
= 250
m
A  
DS D  
1.5  
3.0  
V
GS(TH)  
Negative Threshold
T
e
mperature  
Coefficient  
V
/T  
6.0  
mV/
°
C  
GS(TH)  
J
Drain-to-Source On Resistance  
R
V
= 10
V
, I
 
= 14.8 A  
D
5.1  
6.5  
16  
6.1  
7.5  
m
W  
S
DS(on)  
GS  
V
= 4.5 V, I
 
= 12 A  
D
GS  
Forward Transconductance  
g
FS  
V =
 
1.5
V
, I
 
=
1
4.8 A  
DS D  
CHARGES, CAPACITANCES AND GATE RESISTANCE  
Input Capacitance  
C
C
2900  
562  
307  
24  
pF  
iss  
Output Capacitance  
V
GS  
= 0
V
, f =
1
.0 MHz, V
 
= 24 V  
DS  
oss  
Reverse Transfer Capacitance  
T
o
tal Gate Charge  
C
rss  
Q
nC  
G(TOT)  
Threshold Gate Charge  
Gate-to-Source Charge  
Gate-to-Drain Charge  
T
o
tal Gate Charge  
Q
3.4  
G(TH)  
V
= 4.5
V
, V
 
=
1
5
V
, I
 
=
1
4.8 A  
DS D  
GS  
Q
7.7  
GS  
Q
10.4  
46  
GD  
Q
V
= 10
V
, V
 
=
1
5
V
, I
 
=
1
4.8 A  
DS  
nC  
ns  
G(TOT)  
GS  
D
SWITCHING CHARACTERISTICS

Turn-On Delay Time  
Rise Time  
t
14  
6.5  
47  
17  
d(on)  
t
r
V
GS  
= 10
V
, V
 
=
1
5
V
,  
DS  
I
D
= 1.0 A, R
 
= 6.0
W  
G
Turn-Off Delay Time  
Fall Time  
t
d(off)  
t
f
DRAIN-SOURCE DIODE CHARACTERISTICS  
Forward Diode Voltage  
V
T =
 
25
°
C  
0.75  
0.58  
30  
1.0  
V
SD  
J
V
= 0
V
, I
 
=
2
.9 A  
S
GS  
T =
 
125
°
C  
J
Reverse Recovery Time  
Charge Time  
t
ns  
RR  
t
t
15  
a
V
= 0
V
, d
 
/
d =
 
100 A/
m
s,  
IS t  
GS  
I
S
= 2.9 A  
Discharge Time  
15  
b
Reverse Recovery Charge  
PACKAGE PARASITIC VALUES  
Source Inductance  
Drain Inductance  
Q
23  
nC  
RR  
L
T =
 
25
°
C  
0.66  
0.20  
1.5  
nH  
nH  
nH  
W
S
D
G
A
L
T =
 
25
°
C  
A
Gate Inductance  
L
T =
 
25
°
C  
A
Gate Resistance  
R
T =
 
25
°
C  
A
0.9  
1.4  
G
3. Pulse
 
T
e
st: pulse width = 300
m
s, duty cycle
v
2%.  
4. Switching
 
characteristics are independent of operating junction temperatures.  
2
 

NTMS4807N  
TYPICAL PERFORMANCE CURVES  
35  
30  
25  
20  
15  
10  
5
30  
5 V  
T =
 
25
°
C  
J
V
DS  
≥
10 V  
4.5 V  
4 V  
3.5 V  
3.3 V  
25  
20  
15  
10  
5
T =
 
100
°
C  
J
3.1 V  
2.9 V  
T =
 
25
°
C  
J
2.5 V  
2.7 V  
T =
 
-55
°
C  
J
0
0
0
0.5  
1.0  
1.5  
2.0  
2.5  
3.0  
1
2
3
4
V
GS  
, GATE-TO-SOURCE VOLTAGE (VOLTS)  
V
DS  
, DRAIN-TO-SOURCE VOLTAGE (VOLTS)  
Figure 1. On-Region Characteristics  
Figure 2. Transfer Characteristics  
0.0425  
0.0375  
0.0325  
0.0275  
0.0225  
0.0175  
0.0125  
0.0075  
0.0025  
0.02  
0.0175  
0.015  
0.0125  
0.01  
T =
 
25
°
C  
J
T =
 
25
°
C  
D
J
I
= 12.2 A  
V
= 4 V  
GS  
0.0075  
0.005  
0.0025  
0
V
GS  
= 10 V  
2
4
6
8
10  
5
10  
15  
20  
25  
30  
V
GS  
, GATE-TO-SOURCE VOLTAGE (VOLTS)  
I
D,  
DRAIN CURRENT (AMPS)  
Figure 4. On-Resistance vs. Drain Current and  
Gate Voltage  
Figure 3. On-Resistance vs. Gate-to-Source  
Voltage  
1.6  
1.4  
1.2  
1.0  
0.8  
0.6  
1000000  
100000  
10000  
1000  
V
= 0 V  
I
= 12.2 A  
= 10 V  
GS  
D
V
GS  
T =
 
150
°
C  
J
T =
 
100
°
C  
J
100  
3
6
9
, DRAIN-TO-SOURCE VOLTAGE (VOLTS)  
DS  
12  
15  
18  
21  
24  
27  
30  
-50  
-25  
0
25  
50  
75  
100  
125  
150  
T , JUNCTION TEMPERATURE (
°
C)  
J
V
Figure 5. On-Resistance Variation with  
Temperature  
Figure 6. Drain-to-Source Leakage Current  
vs. Voltage  
3

NTMS4807N  
TYPICAL PERFORMANCE CURVES  
10  
20  
16  
12  
8
4200  
3500  
2800  
2100  
1400  
QT  
T =
 
25
°
C  
J
9
C
V
GS  
= 0 V  
iss  
V
8
7
6
5
4
3
2
DS  
V
GS  
Q
Q
GD  
GS  
C
oss  
4
700  
0
I
D
= 14.8 A  
1
0
T =
 
25
°
C  
J
C
rss  
0
0
5
10  
15  
20  
25  
30  
0
5
10 15 20 25 30 35 40 45 50  
DRAIN-TO-SOURCE VOLTAGE (VOLTS)  
Q ,
 
TOTAL GATE CHARGE (nC)  
G
Figure 7. Capacitance Variation  
Figure 8. Gate-To-Source and  
Drain-To-Source Voltage vs. Total Charge  
1000  
100  
10  
6
5
4
3
2
V
I
= 24 V  
DD  
= 6.1 A  
= 10 V  
V
= 0 V  
GS  
T =
 
25
°
C  
J
D
V
GS  
t
d(off)  
t
f
t
r
t
d(on)  
1
0
1
10  
100  
0.4  
0.5  
0.6  
0.7  
0.8  
R ,
 
GATE RESISTANCE (OHMS)  
G
V
SD  
, SOURCE-TO-DRAIN VOLTAGE (VOLTS)  
Figure 9. Resistive Switching Time  
Variation vs. Gate Resistance  
Figure 10. Diode Forward Voltage vs. Current  
100  
75  
100  
10  
I
D
= 14 A  
10
m
s  
100
m
s  
1 ms  
1
50  
25  
0
10 ms  
V
= 20 V  
GS  
SINGLE PULSE  
= 25
°
C  
T
C
0.1  
0.01  
R
LIMIT  
dc  
DS(on)  
THERMAL LIMIT  
PACKAGE LIMIT  
0.1  
1
10  
100  
25  
50  
75  
100  
125  
150  
T , STARTING JUNCTION TEMPERATURE (
°
C)  
J
V
DS  
, DRAIN-TO-SOURCE VOLTAGE (VOLTS)  
Figure 11. Maximum Rated Forward Biased  
Safe Operating Area  
Figure 12. Maximum Avalanche Energy vs.  
Starting Junction Temperature  
4

NTMS4807N  
PACKAGE DIMENSIONS  
SOIC-8  
CASE 751-07  
ISSUE AJ  
NOTES:  
1. DIMENSIONING
 
AND TOLERANCING PER  
ANSI Y14.5M, 1982.  
-X-  
A
2. CONTROLLING
 
DIMENSION: MILLIMETER.  
3. DIMENSION
 
A AND B DO NOT INCLUDE  
MOLD PROTRUSION.  
4. MAXIMUM
 
MOLD PROTRUSION 0.15 (0.006)  
PER SIDE.  
5. DIMENSION
 
D DOES NOT INCLUDE DAMBAR  
PROTRUSION. ALLOWABLE DAMBAR  
PROTRUSION SHALL BE 0.127 (0.005) TOTAL  
IN EXCESS OF THE D DIMENSION AT  
MAXIMUM MATERIAL CONDITION.  
6. 751-01
 
THRU 751-06 ARE OBSOLETE. NEW  
STANDARD IS 751-07.  
8
5
4
S
M
M
B
0.25 (0.010)  
Y
1
K
-Y-  
G
MILLIMETERS  
DIM MIN
 
MAX  
INCHES  
MIN  
MAX  
0.197  
0.157  
0.069  
0.020  
C
N
X 45  
_
A
B
C
D
G
H
J
K
M
N
S
4.80  
3.80  
1.35  
0.33  
5.00 0.189  
4.00 0.150  
1.75 0.053  
0.51 0.013  
SEATING  
PLANE  
-Z-  
0.10 (0.004)  
1.27 BSC  
0.050 BSC  
M
0.10  
0.19  
0.40  
0
0.25 0.004  
0.25 0.007  
1.27 0.016  
0.010  
0.010  
0.050  
8
0.020  
0.244  
J
H
D
8
0
_
_
_
_
M
S
S
X
0.25 (0.010)  
Z
Y
0.25  
5.80  
0.50 0.010  
6.20 0.228  
SOLDERING FOOTPRINT*  
STYLE 12:  
PIN 1.
 
SOURCE  
2. SOURCE  
3. SOURCE  
4. GATE  
1.52  
0.060  
5. DRAIN  
6. DRAIN  
7. DRAIN  
8. DRAIN  
7.0  
0.275  
4.0  
0.155  
0.6  
0.024  
1.270  
0.050  
mm  
inches  
ǒ
Ǔ
SCALE 6:1  
*For additional information on our Pb-Free strategy and soldering  
details, please download the ON Semiconductor Soldering and  
Mounting
T
e
chniques Reference Manual, SOLDERRM/D.  
ON Semiconductor
and  
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC).
 
SCILLC reserves the right to make changes without further notice  
to any products herein.
 
SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability  
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.  
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time.
 
All  
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts.
 
SCILLC does not convey any license under its patent rights  
nor the rights of others.
 
SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications  
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur.
 
Should  
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,  
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death  
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part.
 
SCILLC is an Equal  
Opportunity/Affirmative Action Employer.
 
This literature is subject to all applicable copyright laws and is not for resale in any manner.  
PUBLICATION ORDERING INFORMATION  
LITERATURE FULFILLMEN
T
:  
N. American Technical Support
: 800-282-9855
T
o
ll Free  
ꢁUSA/Canada  
Europe, Middle East and Africa Technical Support:  
ꢁPhone: 421 33 790 2910  
Japan Customer Focus Center  
ꢁPhone: 81-3-5773-3850  
ON Semiconductor Website
:

ꢁLiterature Distribution Center for ON Semiconductor  
ꢁ
P
.
O. Box 5163, Denver, Colorado 80217 USA  
ꢁ
Phone
: 303-675-2175 or 800-344-3860
T
o
ll Free USA/Canada  
ꢁ
Fax
: 303-675-2176 or 800-344-3867
T
o
ll Free USA/Canada  
ꢁ
Email
: orderlit@onsemi.com  
For additional information, please contact your local  
Sales Representative  
NTMS4807N/D