onsemi-NTR1P02LT1
| Part # | onsemi-NTR1P02LT1 |
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NTR1P02L, NVTR01P02L
P-Channel, SOT-23
-20
V
,
–
1.3 A
These miniature surface mount MOSFETs low R
assure
DS(on)
minimal power loss and conserve energy, making these devices ideal
for use in space sensitive power management circuitry. Typical
applications are DC
−
DC converters and power management in
portable and battery
−
powered products such as computers, printers,
PCMCIA cards, cellular and cordless telephones.
V
R
Max
I Max
D
(BR)DSS
DS(on)
−
20 V
220 m
W
@
−
4.5 V
−
1.3 A
P
−
Channel
Features
D
•
Low R
Provides Higher Efficiency and Extends Battery Life
•
Miniature SOT
−
23 Surface Mount Package Saves Board Space
DS(on)
•
NVTR Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC
−
Q101
Qualified and PPAP Capable
G
•
Pb
−
Free and Halide
−
Free Packages are Available
S
MAXIMUM RATINGS
(T =
25
°
C unless otherwise noted)
J
MARKING DIAGRAM &
PIN ASSIGNMENT
Rating
Drain
−
to
−
Source Voltage
Gate
−
to
−
Source Voltage
−
Continuous
Drain Current
Symbol
Value
−
20
12
Unit
V
3
V
DSS
Drain
3
V
GS
V
1
2
P02 M
G
I
−
1.3
−
4.0
A
A
−
Continuous @ T
= 25
°
C
D
A
G
I
SOT
−
23
DM
−
Pulsed Drain Current (t
≤
10
m
s)
p
CASE 318
STYLE 21
T
o
tal Power Dissipation @ T
= 25
°
C
P
D
400
mW
1
Gate
2
A
Source
Operating and Storage
T
e
mperature Range
T , T
−
55 to
150
°
C
J
stg
P02
M
G
= Specific Device Code
= Date Code*
= Pb
−
Free Package
Thermal Resistance
−
Junction
−
to
−
Ambient
R
300
260
°
C/W
°
C
q
JA
Maximum Lead
T
e
mperature for Soldering
T
L
(Note: Microdot may be in either location)
*Date Code orientation may vary depending
upon manufacturing location.
Purposes, (1/8
″
from case for 10 s)
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
ORDERING INFORMATION
†
Device
Package
Shipping
NTR1P02LT1G
NTR1P02LT3G
NVTR01P02LT1G
SOT
−
23
(Pb
−
Free)
3000
T
a
pe & Reel
SOT
−
23
(Pb
−
Free)
10,000
T
a
pe &
Reel
SOT
−
23
3000
T
a
pe & Reel
(Pb
−
Free)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our
T
a
pe and Reel Packaging Specifications
Brochure, BRD8011/D.
©
Semiconductor Components Industries, LLC, 2001
1
Publication Order Number:
June, 2019
−
Rev. 14
NTR1P02LT1/D
NTR1P02L, NVTR01P02L
ELECTRICAL CHARACTERISTICS
(T =
25
°
C unless otherwise noted)
A
Parameter
Test Condition
Symbol
Min
Typ
Max
Unit
OFF CHARACTERISTICS
Drain
−
to
−
Source Breakdown Volt-
age
(V =
0
V
, I
=
−
10
m
A)
V
(BR)DSS
−
20
V
GS
D
Zero Gate Voltage Drain Current
(V =
−
16
V
, V
= 0
V
)
I
−
1.0
−
10
m
A
DS
GS
DSS
(V =
−
16
V
, V
= 0 V,
DS
GS
T =
125
°
C)
J
Gate
−
Body Leakage Current
(V
GS
=
12
V
, V
= 0
V
)
I
100
nA
DS
GSS
Gate Threshold Voltage
(V =
V ,
I =
−
250
m
A)
V
GS(th)
−
0.7
−
1.0
−
1.25
V
DS
GS
D
Static Drain
−
to
−
Source
On
−
Resistance
(V =
−
4.5
V
, I
=
−
0.75 A)
r
0.140
0.200
0.22
0.35
W
GS
D
DS(on)
(V =
−
2.5
V
, I
=
−
0.5 A)
GS
D
DYNAMIC CHARACTERISTICS
Input Capacitance
(V =
−
5.0 V)
C
225
130
55
pF
ns
DS
iss
Output Capacitance
Transfer Capacitance
(V =
−
5.0 V)
DS
C
oss
(V =
−
5.0 V)
DS
C
rss
Turn
−
On Delay Time
t
7.0
15
18
9
d(on)
(V =
−
4.5
V
, V
=
−
5.0 V,
Rise Time
t
GS
D
DD
r
I
=
−
1.0 A, R
= 5.0
W
,
L
Turn
−
Off Delay Time
Fall Time
t
d(off)
R
= 6.0
W
)
G
t
f
T
o
tal Gate Charge
(V =
−
16 V, I
=
−
1.5 A,
Q
T
3.1
nC
A
DS
D
V
=
−
4.5 V)
GS
SOURCE
−
DRAIN DIODE CHARACTERISTICS
Continuous Current
I
S
−
0.6
−
0.75
−
1.0
Pulsed Current
I
SM
Reverse Recovery Time
(V =
0
V
, I
=
−
0.6 A)
V
SD
V
GS
S
t
rr
16
11
ns
(I =
−
1.0 A, V
= 0 V,
S
GS
t
a
dI /dt
= 100 A/
m
s)
S
t
5.5
8.5
b
Reverse Recovery Stored Charge
Q
nC
RR
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
1. Pulse
T
e
st: Pulse Width
≤
300
m
s, Duty Cycle
≤
2%.
2. Switching
characteristics are independent of operating junction temperature.
2
NTR1P02L, NVTR01P02L
3.0
3
T =
25
°
C
2.2 V
= 2.4 V to 3.0 V
J
V
DS
≥
5 V
2.5
2.0
1.5
2.0 V
V
GS
2
1
0
1.8 V
1.6 V
T =
25
°
C
J
1.0
0.5
0
T =
100
°
C
J
1.4 V
1.2 V
T =
−
55
°
C
J
0
1
2
3
4
5
1.0
1.5
2.0
2.5
V
DS
, DRAIN
−
TO
−
SOURCE VOLTAGE (V)
V
GS
, GATE
−
TO
−
SOURCE VOLTAGE (V)
Figure 1. On
−
Region Characteristics
Figure 2. Transfer Characteristics
0.30
0.25
0.20
0.30
0.25
0.20
T =
25
°
C
J
I
= 1.0 A
D
T =
25
°
C
J
V
= 2.5 V
= 4.5 V
GS
V
GS
0.15
0.10
0.15
0.10
0.05
0
0
2
4
6
8
10
0.1 0.2
0.3 0.4 0.5 0.6 0.7 0.8
I ,
DRAIN CURRENT (A)
0.9
1
V
, GATE
−
TO
−
SOURCE VOLTAGE (V)
GS
D
Figure 3. On
−
Resistance vs. Gate
−
to
−
Source
Figure 4. On
−
Resistance vs. Drain Current and
Voltage
Gate Voltage
1000
1.6
1.4
1.2
1.0
0.8
V
GS
= 0 V
I
V
= 0.75 A
D
T =
125
°
C
J
= 4.5 V
100
10
GS
T =
100
°
C
J
1
0.1
0.6
0.4
T =
25
°
C
J
0.01
−
50
−
25
0
25
50
75
100
125
150
1
6
11
16
T , JUNCTION TEMPERATURE (
°
C)
J
V
, DRAIN
−
TO
−
SOURCE VOLTAGE (V)
DS
Figure 5. On
−
Resistance Variation with
Figure 6. Drain
−
to
−
Source Leakage Current
Temperature
vs. Voltage
3
NTR1P02L, NVTR01P02L
5
400
300
200
Q
T
V
= 0 V
GS
T =
25
°
C
J
4
3
2
C
C
iss
Q
Q
gd
gs
oss
V
I
= 16 V
= 1.5 A
DS
100
0
1
0
C
D
rss
T =
25
°
C
J
0
5
10
15
20
25
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
V
DS
, DRAIN
−
TO
−
SOURCE VOLTAGE (V)
Q ,
TOTAL GATE CHARGE (nC)
G
Figure 7. Capacitance Variation
Figure 8. Gate
−
to
−
Source and
Drain
−
to
−
Source Voltage vs. Total Charge
100
1.0
0.9
0.8
0.7
V
GS
= 0 V
V
I
= 48 V
= 9 A
= 4.5 V
DD
T =
25
°
C
J
D
t
t
V
GS
d(off)
f
t
r
0.6
0.5
10
t
d(on)
0.4
0.3
0.2
0.1
0
1
1
10
R ,
GATE RESISTANCE (
W
)
100
0
0.5
1.0
V
SD
, SOURCE
−
TO
−
DRAIN VOLTAGE (V)
G
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance
Figure 10. Diode Forward Voltage vs. Current
100
10
1
100
m
s
1 ms
10 ms
V
= 12 V
GS
0.1
Single Pulse
= 25
°
C
T
C
dc
R
Limit
0.01
DS(on)
Thermal Limit
Package Limit
0.001
0.1
1
10
100
V
DS
, DRAIN
−
TO
−
SOURCE VOLTAGE (V)
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
4
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SOT
−
23 (TO
−
236)
CASE 318
−
08
ISSUE AS
DATE 30 JAN 2018
SCALE 4:1
NOTES:
D
1. DIMENSIONING
AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING
DIMENSION: MILLIMETERS.
3. MAXIMUM
LEAD THICKNESS INCLUDES LEAD FINISH.
MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF
THE BASE MATERIAL.
0.25
3
4. DIMENSIONS
D AND E DO NOT INCLUDE MOLD FLASH,
PROTRUSIONS, OR GATE BURRS.
T
H
E
E
1
2
MILLIMETERS
INCHES
DIM
A
A1
b
c
D
E
e
L
MIN
0.89
0.01
0.37
0.08
2.80
1.20
1.78
0.30
0.35
2.10
0
°
NOM
1.00
0.06
0.44
0.14
2.90
1.30
1.90
0.43
0.54
2.40
−−−
MAX
MIN
0.035
0.000
0.015
0.003
0.110
0.047
0.070
0.012
0.014
0.083
0
°
NOM
0.039
0.002
0.017
0.006
0.114
0.051
0.075
0.017
0.021
0.094
−−−
MAX
0.044
0.004
0.020
0.008
0.120
0.055
0.080
0.022
0.027
0.104
10
°
L
1.11
0.10
0.50
0.20
3.04
1.40
2.04
0.55
0.69
2.64
10
°
3X
b
L1
VIEW C
e
TOP VIEW
L1
A
H
E
T
c
A1
SEE VIEW C
SIDE VIEW
GENERIC
MARKING DIAGRAM*
END VIEW
RECOMMENDED
SOLDERING FOOTPRINT
XXXM
G
G
1
3X
0.90
XXX = Specific Device Code
2.90
M
= Date Code
G
= Pb
−
Free Package
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb
−
Free indicator, “G” or microdot “
G
”,
may or may not be present.
3X
0.95
0.80
PITCH
DIMENSIONS: MILLIMETERS
STYLE 1 THRU 5:
CANCELLED
STYLE 6:
STYLE 7:
PIN 1.
EMITTER
2. BASE
STYLE 8:
PIN 1.
BASE
2. EMITTER
3. COLLECTOR
PIN 1.
ANODE
2. NO
CONNECTION
3. CATHODE
3. COLLECTOR
STYLE 9:
PIN 1.
ANODE
2. ANODE
STYLE 10:
STYLE 11:
STYLE 12:
STYLE 13:
PIN 1.
SOURCE
2. DRAIN
STYLE 14:
PIN 1.
CATHODE
2. GATE
PIN 1.
DRAIN
2. SOURCE
3. GATE
PIN 1.
ANODE
PIN 1.
CATHODE
2. CATHODE
3. ANODE
2. CATHODE
3. CATHODE
−
ANODE
3. CATHODE
3. GATE
3. ANODE
STYLE 15:
STYLE 16:
STYLE 17:
PIN 1.
NO CONNECTION
2. ANODE
STYLE 18:
STYLE 19:
STYLE 20:
PIN 1.
GATE
2. CATHODE
3. ANODE
PIN 1.
ANODE
2. CATHODE
3. CATHODE
PIN 1.
NO CONNECTION
PIN 1.
CATHODE
PIN 1.
CATHODE
2. ANODE
3. GATE
2. CATHODE
3. ANODE
2. ANODE
3. CATHODE
−
ANODE
3. CATHODE
STYLE 21:
STYLE 22:
STYLE 23:
PIN 1.
ANODE
2. ANODE
STYLE 24:
STYLE 25:
STYLE 26:
PIN 1.
GATE
2. SOURCE
3. DRAIN
PIN 1.
RETURN
2. OUTPUT
3. INPUT
PIN 1.
GATE
2. DRAIN
PIN 1.
ANODE
2. CATHODE
3. GATE
PIN 1.
CATHODE
2. ANODE
3. SOURCE
3. NO
CONNECTION
3. CATHODE
STYLE 27:
STYLE 28:
PIN 1.
CATHODE
2. CATHODE
3. CATHODE
PIN 1.
ANODE
2. ANODE
3. ANODE
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions
are uncontrolled
except when stamped
“CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98ASB42226B
SOT
−
23 (TO
−
236)
PAGE 1 OF 1
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©
Semiconductor Components Industries, LLC, 2019
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