onsemi-NTR4502PT1G
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NTR4502
P
,
N
VTR4502P
Power MOSFET
−
30
V
,
−
1.95 A, Single, P
−
Channel,
SOT
−
23
Features
•
Leading Planar Technology for Low Gate Charge / Fast Switching
V
R
TYP
I
D
−
1.95 A
(BR)DSS
DS(on)
•
Low R
for Low Conduction Losses
DS(ON)
155 m
W
@
−
10 V
240 m
W
@
−
4.5 V
•
SOT
−
23 Surface Mount for Small Footprint (3 X 3 mm)
•
AEC Q101 Qualified
−
NVTR4502P
•
These Devices are Pb
−
Free and are RoHS Compliant
−
30 V
P
−
Channel MOSFET
Applications
•
DC to DC Conversion
S
•
Load/Power Switch for Portables and Computing
•
Motherboard, Notebooks, Camcorders, Digital Camera’s, etc.
•
Battery Charging Circuits
G
MAXIMUM RATINGS
(T =
25
°
C unless otherwise stated)
J
D
Parameter
Drain
−
to
−
Source Voltage
Symbol Value
Unit
V
−
30
20
V
V
A
DSS
MARKING DIAGRAM/
PIN ASSIGNMENT
Gate
−
to
−
Source Voltage
V
GS
Drain
3
t < 10 s
T =
25
°
C
I
D
−
1.95
−
1.56
1.25
A
T =
70
°
C
A
TR2 M
G
Power Dissipation
t < 10 s
P
W
A
D
G
SOT
−
23
CASE 318
STYLE 21
2
1
Gate
Continuous Drain Current
Steady T
= 25
°
C
I
D
−
1.13
−
0.90
0.4
Source
A
State
Steady State
t =
10
m
s
T =
70
°
C
A
TR2 =
Device Code
Power Dissipation
P
W
M
G
= Date Code*
= Pb
−
Free Package
D
Pulsed Drain Current
I
−
6.8
A
(Note: Microdot may be in either location)
p
DM
*Date Code orientation and/or overbar may
vary depending upon manufacturing location.
Operating Junction and Storage
T
e
mperature
T ,
STG
−
55 to
150
°
C
J
T
Source Current (Body Diode)
I
−
1.25
A
S
ORDERING INFORMATION
Lead
T
e
mperature for Soldering Purposes
(1/8 in from case for 10 s)
T
260
°
C
L
Device
Package
Shipping
†
NTR4502PT1G
SOT
−
23
(Pb
−
Free)
3000 /
T
a
pe & Reel
THERMAL RESISTANCE RATINGS
Parameter
Symbol
Max
300
100
Unit
NVTR4502PT1G
SOT
−
23
(Pb
−
Free)
3000 /
T
a
pe & Reel
R
°
C/W
q
JA
R
q
JA
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our
T
a
pe and Reel Packaging Specifications
Brochure, BRD8011/D.
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Surface
−
mounted on FR4 board using 1 in sq. pad size
(Cu area = 1.127 in sq. [1 oz] including traces).
©
Semiconductor Components Industries, LLC, 2011
1
Publication Order Number:
August, 2011
−
Rev. 5
NTR4502P/D
NTR4502
P
,
N
VTR4502P
Electrical Characteristics
(T =
25
°
C unless otherwise specified)
J
Parameter
Symbol
Test Condition
Min
Typ
Max Unit
OFF CHARACTERISTICS
Drain
−
to
−
Source Breakdown Voltage
V
V
GS
= 0
V
, I
=
−
250
m
A
−
30
V
(BR)DSS
D
Zero Gate Voltage Drain Current
I
V
GS
= 0
V
, V
=
−
30 V
T =
25
°
C
J
−
1
m
A
DSS
DS
T =
55
°
C
J
−
10
100
Gate
−
to
−
Source Leakage Current
Gate Threshold Voltage
I
V
= 0
V
, V
=
20 V
nA
GSS
DS
GS
V
V
GS
= V
, I
=
−
250
m
A
−
1.0
−
3.0
200
350
V
GS(TH)
DS
D
Drain
−
to
−
Source On Resistance
R
V
GS
=
−
10
V
, I
=
−
1.95 A
155
240
3
m
W
DS(on)
D
V
GS
=
−
4.5
V
, I
=
−
1.5 A
D
Forward Transconductance
CHARGES AND CAPACITANCES
Input Capacitance
g
V
DS
=
−
10
V
, I
=
−
1.25 A
S
FS
D
C
V
= 0
V
, f = 1
M
Hz, V
=
−
15 V
200
80
50
6
pF
ISS
GS
DS
Output Capacitance
C
OSS
RSS
Reverse Transfer Capacitance
T
o
tal Gate Charge
C
Q
V
=
−
10
V
, V
=
−
15 V; I
=
−
1.95 A
10
nC
ns
G(TOT)
GS
DS
D
Threshold Gate Charge
Gate
−
to
−
Source Charge
Gate
−
to
−
Drain Charge
Turn
−
On Delay Time
Q
0.3
1
G(TH)
Q
GS
GD
Q
1.7
t
V
=
−
10
V
, V
=
−
15
V
,
=
−
1.95 A, R
= 6
W
5.2
12
10
20
35
30
d(ON)
GS
D
DD
G
I
Rise Time
t
r
Turn
−
Off Delay Time
t
19
d(OFF)
Fall Time
t
f
17.5
Forward Diode Voltage
Reverse Recovery Time
V
V
= 0
V
, I
=
−
1.25 A
−
0.8
−
1.2
V
SD
RR
GS
S
t
V
GS
= 0
V
,
d
I
/d =
100 A/
m
s, I
=
−
1.25 A
23
ns
SD
t
S
2. Surface
−
mounted on FR4 board using 1 in sq. pad size (Cu area = 1.127 in sq. [1 oz] including traces).
3. Pulse
T
e
st: pulse width
v
300
m
s, duty cycle
v
2%.
4. Switching
characteristics are independent of operating junction temperatures.
2
NTR4502
P
,
N
VTR4502P
V
=
−
4.0 V
GS
V
DS
=
−
10 V
5
4
3
2
1
0
5
4
3
2
1
0
T =
25
°
C
=
−
3.8 V
J
V
GS
T =
−
55
°
C
J
V
=
−
5.0 V
GS
V
GS
=
−
3.6 V
T =
25
°
C
J
V
=
−
7.0 V
GS
T =
100
°
C
J
V
=
−
3.4 V
GS
V
=
−
10 V
GS
V
GS
=
−
3.2 V
V
=
−
3.0 V
GS
V
V
=
−
2.8 V
=
−
2.6 V
GS
V
=
−
2.4 V
GS
GS
0
1
2
3
4
5
6
7
8
9
10
1
2
3
4
5
6
7
−
V ,
DRAIN
−
TO
−
SOURCE VOLTAGE (V)
DS
−
V ,
GATE
−
TO
−
SOURCE VOLTAGE (V)
GS
Figure 1. On
−
Region Characteristics
Figure 2. Transfer Characteristics
0.4
0.35
0.3
0.3
0.25
0.2
T =
25
°
C
J
I
=
−
1.95 A
D
T =
25
°
C
J
V
=
−
4.5 V
GS
GS
0.25
0.2
V
=
−
10 V
0.15
0.1
0.15
0.1
3
4
5
6
7
8
9
10
1
1.5
2
2.5
3
3.5
4
4.5
5
−
V ,
GATE
−
TO
−
SOURCE VOLTAGE (V)
GS
−
I ,
DRAIN CURRENT (A)
D
Figure 3. On
−
Resistance versus
Gate
−
to
−
Source Voltage
Figure 4. On
−
Resistance versus Drain Current
and Gate Voltage
1000
100
10
1.8
1.6
1.4
1.2
1
I
V
=
−
1.9 A
V
GS
= 0 V
D
=
−
10 V
GS
T =
150
°
C
J
T =
100
°
C
J
0.8
0.6
1
−
50
−
25
0
25
50
75
100
125
150
2
6
10
14
18
22
26
30
T , JUNCTION TEMPERATURE (
°
C)
J
−
V ,
DRAIN
−
TO
−
SOURCE VOLTAGE (V)
DS
Figure 5. On
−
Resistance Variation with
Figure 6. Drain
−
to
−
Source Leakage Current
Temperature
versus Voltage
3
NTR4502
P
,
N
VTR4502P
500
400
300
200
100
0
T =
25
°
C
J
V
= 0 V
V
= 0 V
DS
GS
C
ISS
C
RSS
C
ISS
C
OSS
C
RSS
10
5
0
5
10
15
20
25
30
−
V
GS
−
V
DS
GATE
−
TO
−
SOURCE OR DRAIN
−
TO
−
SOURCE
VOLTAGE (V)
Figure 7. Capacitance Variation
12
10
8
18
15
12
9
Q
T
6
Q
Q
GD
GS
4
6
2
3
I
D
=
−
1.95 A
T =
25
°
C
J
0
0
0
1
2
3
4
5
6
7
Q ,
TOTAL GATE CHARGE (nC)
G
Figure 8. Gate
−
to
−
Source and
Drain
−
to
−
Source Voltage versus Total Charge
100
10
1
3
V
=
−
15 V
=
−
1.95 V
=
−
10 V
DS
T =
25
°
C
J
I
D
2.5
2
V
GS
t
f
t
t
d(off)
t
r
1.5
1
d(on)
0.5
0
0.3
0.6
0.9
1.2
1
10
R ,
GATE RESISTANCE (
W
)
100
−
V ,
SOURCE
−
TO
−
DRAIN VOLTAGE (V)
SD
G
Figure 9. Resistive Switching Time Variation
versus Gate Resistance
Figure 10. Diode Forward Voltage versus
Current
4
NTR4502
P
,
N
VTR4502P
PACKAGE DIMENSIONS
SOT
−
23 (TO
−
236)
CASE 318
−
08
ISSUE AP
NOTES:
1. DIMENSIONING
AND TOLERANCING PER ANSI Y14.5M, 1982.
2. CONTROLLING
DIMENSION: INCH.
D
3. MAXIMUM
LEAD THICKNESS INCLUDES LEAD FINISH
THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM
THICKNESS OF BASE MATERIAL.
SEE VIEW C
3
4. DIMENSIONS
D AND E DO NOT INCLUDE MOLD FLASH,
PROTRUSIONS, OR GATE BURRS.
H
E
MILLIMETERS
INCHES
NOM
0.040
0.002
0.018
0.005
0.114
0.051
0.075
0.008
0.021
0.094
−−−
E
DIM
A
A1
b
c
D
E
e
L
L1
MIN
0.89
0.01
0.37
0.09
2.80
1.20
1.78
0.10
0.35
2.10
0
°
NOM
1.00
0.06
0.44
0.13
2.90
1.30
1.90
0.20
0.54
2.40
−−−
MAX
MIN
0.035
0.001
0.015
0.003
0.110
0.047
0.070
0.004
0.014
0.083
0
°
MAX
0.044
0.004
0.020
0.007
0.120
0.055
0.081
0.012
0.029
0.104
10
°
1.11
0.10
0.50
0.18
3.04
1.40
2.04
0.30
0.69
2.64
10
°
c
1
2
b
0.25
e
q
H
A
E
q
L
STYLE 21:
A1
PIN 1.
GATE
L1
VIEW C
2. SOURCE
3. DRAIN
SOLDERING FOOTPRINT*
0.95
0.037
0.95
0.037
2.0
0.079
0.9
0.035
mm
inches
ǒ
Ǔ
SCALE 10:1
0.8
0.031
*For additional information on our Pb
−
Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting
T
e
chniques Reference Manual, SOLDERRM/D.
ON Semiconductor
and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC).
SCILLC reserves the right to make changes without further notice
to any products herein.
SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time.
All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts.
SCILLC does not convey any license under its patent rights
nor the rights of others.
SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur.
Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part.
SCILLC is an Equal
Opportunity/Affirmative Action Employer.
This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMEN
T
:
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−
282
−
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o
ll Free
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−
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−
5773
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3850
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.
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−
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−
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−
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−
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o
ll Free USA/Canada
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−
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−
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o
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For additional information, please contact your local
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NTR4502P/D
