onsemi-NTR4503NT1G
| Part # | onsemi-NTR4503NT1G |
Download  | onsemi-NTR4503NT1G |
NTR4503N, NVTR4503N
N-Channel, SOT-23
30
V
,
2
.5 A
Features
•
Leading Planar Technology for Low Gate Charge / Fast Switching
•
4.5 V Rated for Low
V
o
ltage Gate Drive
•
SOT
−
23 Surface Mount for Small Footprint (3 x 3 mm)
•
NV Prefix for Automotive and Other Applications Requiring Unique
Site and Control Change Requirements; AEC
−
Q101 Qualified and
PPAP Capable
V
R
TYP
I MAX
D
(BR)DSS
DS(on)
85 m
W
@ 10 V
30 V
2.5 A
105 m
W
@ 4.5 V
•
These Devices are Pb
−
Free and are RoHS Compliant
N
−
Channel
Applications
•
DC
−
DC Conversion
•
Load/Power Switch for Portables
•
Load/Power Switch for Computing
D
G
MAXIMUM RATINGS
(T =
25
°
C unless otherwise noted)
J
Parameter
Drain
−
to
−
Source Voltage
Symbol Value
Unit
V
S
V
DSS
30
20
Gate
−
to
−
Source Voltage
V
GS
V
MARKING DIAGRAM/
PIN ASSIGNMENT
Continuous Drain
Steady
State
T
= 25
°
C
= 85
°
C
= 25
°
C
= 25
°
C
I
2.0
1.5
2.5
0.73
A
A
D
3
T
A
3
Drain
t
≤
10 s
T
A
1
Power Dissipation
Steady
State
T
A
P
W
A
D
2
TR3 M
G
G
SOT
−
23
CASE 318
STYLE 21
Continuous Drain
Steady
State
T
A
= 25
°
C
= 85
°
C
= 25
°
C
I
D
1.5
1.1
T
A
1
2
Gate
Source
Power Dissipation
T
A
P
0.42
W
D
TR3
M
= Specific Device Code
= Date Code
Pulsed Drain Current
t =
10
m
s
p
I
10
A
DM
G
= Pb
−
Free Package
Operating Junction and Storage
T
e
mperature
T ,
T
stg
−
55 to
150
°
C
J
(Note: Microdot may be in either location)
Source Current (Body Diode)
I
2.0
4.0
A
A
S
Peak Source Current
(Diode Forward)
t =
10
m
s
p
I
SM
ORDERING INFORMATION
†
Device
NTR4503NT1G
Package
Shipping
Lead
T
e
mperature for Soldering Purposes
(1/8” from case for 10 s)
T
260
°
C
L
SOT
−
23
(Pb
−
Free)
3000 /
T
a
pe & Reel
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
NVTR4503NT1G SOT
−
23
(Pb
−
Free)
3000 /
T
a
pe & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our
T
a
pe and Reel Packaging Specification
Brochure, BRD8011/D.
©
Semiconductor Components Industries, LLC, 2003
1
Publication Order Number:
June, 2019
−
Rev. 8
NTR4503N/D
NTR4503N, NVTR4503N
THERMAL RESISTANCE RATINGS
Parameter
Symbol
Max
170
100
300
Unit
R
°
C/W
q
JA
R
q
JA
R
q
JA
1. Surface
−
mounted on FR4 board using 1 in sq pad size.
2. Surface
−
mounted on FR4 board using the minimum recommended pad size.
2
NTR4503N, NVTR4503N
ELECTRICAL CHARACTERISTICS
(T =
25
°
C unless otherwise noted)
J
Parameter
Symbol
Test Conditions
Min
Typ
Max
Units
OFF CHARACTERISTICS
Drain
−
to
−
Source Breakdown Voltage
Zero Gate Voltage Drain Current
V
V
= 0
V
, I
= 250
m
A
30
36
V
(BR)DSS
GS
D
I
V
= 0
V
, V
= 24 V
1.0
10
m
A
DSS
GS
DS
V
GS
= 0
V
, V
= 24 V, T
= 125
°
C
DS J
Gate
−
to
−
Source Leakage Current
Gate Threshold Voltage
I
V
= 0
V
, V
=
“
20 V
“
100
nA
GSS
DS
GS
V
V
= V
, I
= 250
m
A
1.0
1.75
85
3.0
110
140
V
GS(TH)
GS
DS
D
Drain
−
to
−
Source On
−
Resistance
R
V
= 10 V, I
= 2.5 A
m
W
DS(on)
GS
D
V
= 4.5
V
, I
= 2.0 A
105
5.3
GS
DS
D
Forward Transconductance
CHARGES AND CAPACITANCES
Input Capacitance
g
V
= 4.5
V
, I
= 2.5 A
S
FS
D
C
135
52
pF
iss
V
= 0
V
, f =
1
.0 MHz,
GS
GS
Output Capacitance
C
oss
V
DS
= 15 V
Reverse Transfer Capacitance
Input Capacitance
C
15
rss
C
130
42
250
75
pF
nC
iss
V
= 0
V
, f =
1
.0 MHz,
= 24 V
Output Capacitance
C
oss
V
DS
Reverse Transfer Capacitance
T
o
tal Gate Charge
C
13
25
rss
Q
Q
3.6
0.3
0.6
0.7
1.9
0.3
0.6
0.9
7.0
G(TOT)
Threshold Gate Charge
Gate
−
to
−
Source Charge
Gate
−
to
−
Drain Charge
T
o
tal Gate Charge
Q
G(TH)
V
GS
= 10
V
, V
=
1
5 V,
DS
I
D
= 2.5 A
Q
GS
Q
GD
nC
G(TOT)
Threshold Gate Charge
Gate
−
to
−
Source Charge
Gate
−
to
−
Drain Charge
Q
G(TH)
V
GS
= 4.5
V
, V
= 24 V,
DS
I
D
= 2.5 A
Q
GS
GD
Q
Turn
−
On Delay Time
Rise Time
t
5.8
5.8
14
12
10
25
5.0
ns
ns
d(on)
t
r
V
V
= 10
V
, V
=
1
5 V,
DD
GS
I
= 1 A, R
= 6
W
D
G
Turn
−
Off Delay Time
Fall Time
t
t
t
d(off)
t
f
1.6
4.8
6.7
13.6
1.8
Turn
−
On Delay Time
Rise Time
d(on)
t
r
= 10
V
, V
=
2
4 V,
GS
DD
I
D
= 2.5 A, R
= 2.5
W
G
Turn
−
Off Delay Time
Fall Time
d(off)
t
f
DRAIN
−
SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
Reverse Recovery Time
Reverse Recovery Charge
V
V
= 0
V
, I
= 2.0 A
0.85
9.2
1.2
V
SD
RR
GS
S
t
ns
nC
V
GS
= 0
V
, I
=
2
.0 A,
S
dI /dt
= 100 A/
m
s
S
Q
4.0
RR
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
3. Pulse
T
e
st: Pulse Width
v
300
m
s, Duty Cycle
v
2%.
4. Switching
characteristics are independent of operating junction temperatures.
3
NTR4503N, NVTR4503N
TYPICAL PERFORMANCE CURVES
10
8
10 V
6 V
5 V
4.5 V
4.2 V
4 V
3.8 V
3.6 V
V
≥
10 V
DS
T =
25
°
C
J
8
4
0
6
3.4 V
3.2 V
4
100
°
C
3 V
2.8 V
2.6 V
25
°
C
2
0
T =
−
55
°
C
J
0
1
2
3
4
2
3
4
5
6
V
GS
, GATE
−
TO
−
SOURCE VOLTAGE (VOLTS)
V
DS
, DRAIN
−
TO
−
SOURCE VOLTAGE (VOLTS)
Figure 1. On
−
Region Characteristics
Figure 2. Transfer Characteristics
0.12
0.3
0.25
0.2
I
= 2.5 A
D
T =
25
°
C
J
T =
25
°
C
J
0.11
0.10
0.09
V
GS
= 4.5 V
0.15
0.1
0.08
0.07
0.05
0
V
GS
= 10 V
4
2
3
5
6
2
3
4
5
6
7
8
9
10
V
GS
, GATE
−
TO
−
SOURCE VOLTAGE (VOLTS)
I
D,
DRAIN CURRENT (AMPS)
Figure 4. On
−
Resistance vs. Drain Current and
Figure 3. On
−
Resistance vs. Gate
−
to
−
Source
Gate Voltage
Voltage
1000
100
10
1.8
V
GS
= 0 V
I
V
= 2.5 A
D
= 10 V
GS
1.6
T =
150
°
C
J
1.4
1.2
1.0
0.8
0.6
T =
100
°
C
J
1
−
50
−
25
0
25
50
75
100
125 150
5
10
, DRAIN
−
TO
−
SOURCE VOLTAGE (VOLTS)
DS
15
20
25
30
T , JUNCTION TEMPERATURE (
°
C)
V
J
Figure 5. On
−
Resistance Variation with
Figure 6. Drain
−
to
−
Source Leakage Current
Temperature
vs. Voltage
4
NTR4503N, NVTR4503N
TYPICAL PERFORMANCE CURVES
300
200
15
10
15
V
GS
= 0 V
V
= 0 V
T =
25
°
C
J
DS
V
DS
C
iss
Q
G
10
C
rss
V
I
GS
5
0
100
0
5
0
Q
Q
GD
GS
= 2.5 A
D
C
oss
T =
25
°
C
J
10
5
0
5
10
15
20
25
30
0
1
2
3
4
V
GS
V
DS
Q ,
TOTAL GATE CHARGE (nC)
G
GATE
−
TO
−
SOURCE OR DRAIN
−
TO
−
SOURCE VOLTAGE (VOLTS)
Figure 8. Gate
−
to
−
Source and
Drain
−
to
−
Source Voltage vs. Total Charge
Figure 7. Capacitance Variation
100
3
V
I
= 24 V
= 2.5 A
V
GS
= 0 V
DD
T =
25
°
C
J
D
V
GS
= 10 V
t
d(off)
2
t
f
10
t
d(on)
t
r
1
0
1
1
10
R ,
GATE RESISTANCE (OHMS)
100
0.3
0.5
0.6
0.7
0.8
0.9
1
0.4
V
, SOURCE
−
TO
−
DRAIN VOLTAGE (VOLTS)
G
SD
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance
Figure 10. Diode Forward Voltage vs. Current
5
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SOT
−
23 (TO
−
236)
CASE 318
−
08
ISSUE AS
DATE 30 JAN 2018
SCALE 4:1
NOTES:
D
1. DIMENSIONING
AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING
DIMENSION: MILLIMETERS.
3. MAXIMUM
LEAD THICKNESS INCLUDES LEAD FINISH.
MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF
THE BASE MATERIAL.
0.25
3
4. DIMENSIONS
D AND E DO NOT INCLUDE MOLD FLASH,
PROTRUSIONS, OR GATE BURRS.
T
H
E
E
1
2
MILLIMETERS
INCHES
DIM
A
A1
b
c
D
E
e
L
MIN
0.89
0.01
0.37
0.08
2.80
1.20
1.78
0.30
0.35
2.10
0
°
NOM
1.00
0.06
0.44
0.14
2.90
1.30
1.90
0.43
0.54
2.40
−−−
MAX
MIN
0.035
0.000
0.015
0.003
0.110
0.047
0.070
0.012
0.014
0.083
0
°
NOM
0.039
0.002
0.017
0.006
0.114
0.051
0.075
0.017
0.021
0.094
−−−
MAX
0.044
0.004
0.020
0.008
0.120
0.055
0.080
0.022
0.027
0.104
10
°
L
1.11
0.10
0.50
0.20
3.04
1.40
2.04
0.55
0.69
2.64
10
°
3X
b
L1
VIEW C
e
TOP VIEW
L1
A
H
E
T
c
A1
SEE VIEW C
SIDE VIEW
GENERIC
MARKING DIAGRAM*
END VIEW
RECOMMENDED
SOLDERING FOOTPRINT
XXXM
G
G
1
3X
0.90
XXX = Specific Device Code
2.90
M
= Date Code
G
= Pb
−
Free Package
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb
−
Free indicator, “G” or microdot “
G
”,
may or may not be present.
3X
0.95
0.80
PITCH
DIMENSIONS: MILLIMETERS
STYLE 1 THRU 5:
CANCELLED
STYLE 6:
STYLE 7:
PIN 1.
EMITTER
2. BASE
STYLE 8:
PIN 1.
BASE
2. EMITTER
3. COLLECTOR
PIN 1.
ANODE
2. NO
CONNECTION
3. CATHODE
3. COLLECTOR
STYLE 9:
PIN 1.
ANODE
2. ANODE
STYLE 10:
STYLE 11:
STYLE 12:
STYLE 13:
PIN 1.
SOURCE
2. DRAIN
STYLE 14:
PIN 1.
CATHODE
2. GATE
PIN 1.
DRAIN
2. SOURCE
3. GATE
PIN 1.
ANODE
PIN 1.
CATHODE
2. CATHODE
3. ANODE
2. CATHODE
3. CATHODE
−
ANODE
3. CATHODE
3. GATE
3. ANODE
STYLE 15:
STYLE 16:
STYLE 17:
PIN 1.
NO CONNECTION
2. ANODE
STYLE 18:
STYLE 19:
STYLE 20:
PIN 1.
GATE
2. CATHODE
3. ANODE
PIN 1.
ANODE
2. CATHODE
3. CATHODE
PIN 1.
NO CONNECTION
PIN 1.
CATHODE
PIN 1.
CATHODE
2. ANODE
3. GATE
2. CATHODE
3. ANODE
2. ANODE
3. CATHODE
−
ANODE
3. CATHODE
STYLE 21:
STYLE 22:
STYLE 23:
PIN 1.
ANODE
2. ANODE
STYLE 24:
STYLE 25:
STYLE 26:
PIN 1.
GATE
2. SOURCE
3. DRAIN
PIN 1.
RETURN
2. OUTPUT
3. INPUT
PIN 1.
GATE
2. DRAIN
PIN 1.
ANODE
2. CATHODE
3. GATE
PIN 1.
CATHODE
2. ANODE
3. SOURCE
3. NO
CONNECTION
3. CATHODE
STYLE 27:
STYLE 28:
PIN 1.
CATHODE
2. CATHODE
3. CATHODE
PIN 1.
ANODE
2. ANODE
3. ANODE
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions
are uncontrolled
except when stamped
“CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98ASB42226B
SOT
−
23 (TO
−
236)
PAGE 1 OF 1
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