onsemi-NTTFS1D2N02P1E
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NTTFS1D2N02P1E
N-Channel, Power33
25
V
,
1
.0 m
W
, 180 A
Features
•
Small Footprint for Compact Design
•
Low R
to Minimize Conduction Losses
DS(on)
•
Low Q
and Capacitance to Minimize Driver Losses
G
V
R
MAX
I MAX
D
•
These Devices are Pb
−
Free, Halogen Free/BFR Free and are RoHS
(BR)DSS
DS(ON)
Compliant
1.0 m
W
@ 10 V
1.2 m
W
@ 4.5 V
25 V
180 A
Typical Applications
•
DC
−
DC Converters
•
Power Load Switch
NMOS
•
Notebook Battery Management
D (5
−
8)
MAXIMUM RATINGS
(T =
25
°
C unless otherwise noted)
J
Parameter
Drain
−
to
−
Source Voltage
Symbol
Value
25
Unit
V
V
DSS
G (4)
Gate
−
to
−
Source Voltage
V
GS
+16/
−
12
180
V
Continuous Drain
T
T
T
= 25
°
C
= 85
°
C
= 25
°
C
I
D
A
C
C
C
S (1, 2, 3)
Current R
q
JC
130
Steady
State
Power Dissipation
P
52
W
A
D
D
D
MARKING
DIAGRAM
R
q
JC
Pin 1
Continuous Drain
Current R
T =
25
°
C
A
I
D
41
29
1
q
JA
T =
85
°
C
A
Steady
State
2EJN
AYWWZZ
PQFN8
(Power33)
CASE 483AW
Power Dissipation
T =
25
°
C
A
P
2.7
W
A
R
q
JA
Continuous Drain
Current R
T =
25
°
C
A
I
D
23
16
q
JA
2EJN
A
Y
WW
ZZ
= Specific Device Code
= Assembly Location
=
Y
e
ar
= Work Week
= Assembly Lot Code
T =
85
°
C
A
Steady
State
Power Dissipation
T =
25
°
C
A
P
0.82
W
R
q
JA
Pulsed Drain Current
T =
25
°
C, t
= 10
m
s
A
I
DM
195
202
A
p
Single Pulse Drain
−
to
−
Source Avalanche
E
AS
mJ
L(pk)
ORDERING INFORMATION
this data sheet.
Operating Junction and Storage
T
e
mperature
Range
T , T
−
55 to
°
C
°
C
J
stg
+150
Lead
T
e
mperature Soldering Reflow for Solder-
ing Purposes (1/8
″
from case for 10 s)
T
L
260
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
2
1. Surface
−
mounted on FR4 board using a 1 in
pad size, 2 oz Cu pad.
2. Surface
−
mounted on FR4 board using minimum pad size, 2 oz Cu pad.
3. The
entire application environment impacts the thermal resistance values
shown. They are not constants and are only valid for the particular conditions
noted. Actual continuous current will be limited by thermal & electro
−
mechanical application board design. R
is determined by the user’s board
q
CA
design.
4. 100%
UIS tested at L = 0.1 mH, I
= 40 A.
AV
©
Semiconductor Components Industries, LLC, 2019
1
Publication Order Number:
September, 2019
−
Rev. 1
NTTFS1D2N02P1E/D
NTTFS1D2N02P1E
THERMAL RESISTANCE RATINGS
Parameter
Symbol
Max
2.4
47
Unit
R
°
C/W
q
JC
R
q
JA
R
152
q
JA
ELECTRICAL CHARACTERISTICS
(T =
25
°
C unless otherwise specified)
J
Parameter
Symbol
Test Condition
Min
Typ
Max
Unit
OFF CHARACTERISTICS
Drain
−
to
−
Source Breakdown Voltage
V
V
GS
= 0
V
, I
= 1
m
A
25
V
(BR)DSS
D
Drain
−
to
−
Source Breakdown Voltage
T
e
mperature Coefficient
V
/
I
D
= 1 mA, ref to 25
°
C
16
(BR)DSS
mV/
°
C
T
J
Zero Gate Voltage Drain Current
I
V
= 0
V
,
T =
25
°
C
10
DSS
GS
DS
J
m
A
V
= 20 V
T =
125
°
C
J
100
100
Gate
−
to
−
Source Leakage Current
Gate Threshold Voltage
I
V
DS
= 0
V
, V
= +16/
−
12 V
nA
GSS
GS
V
V
= V
, I
= 934
m
A
1.2
2.0
V
GS(TH)
GS
DS
D
Threshold
T
e
mperature Coefficient
Drain
−
to
−
Source On Resistance
V
/T
I =
934
m
A, ref to 25
°
C
D
−
4.4
0.86
1.05
224
0.5
mV/
°
C
GS(TH)
J
R
V
GS
GS
= 10 V
= 4.5 V
I
= 38 A
= 35 A
1.0
1.2
DS(on)
D
D
m
W
V
I
Forward Transconductance
Gate Resistance
g
FS
V
DS
= 5
V
, I
=
3
8 A
S
D
R
T =
25
°
C
A
W
G
CHARGES & CAPACITANCES
Input Capacitance
C
4040
1100
68
ISS
Output Capacitance
C
V
GS
= 0
V
, f = 1
M
Hz, V
= 13 V
pF
nC
OSS
RSS
DS
Reverse Capacitance
T
o
tal Gate Charge
C
Q
24
G(TOT)
Threshold Gate Charge
Gate
−
to
−
Drain Charge
Gate
−
to
−
Source Charge
T
o
tal Gate Charge
Q
5.2
3.9
9.8
54
G(TH)
V
= 4.5
V
, V
=
1
3 V; I
= 38 A
DS D
GS
Q
GD
GS
Q
Q
V
= 10
V
, V
=
1
3 V; I
= 38 A
GS DS
D
G(TOT)
GS
Turn
−
On Delay Time
Rise Time
t
24.6
13
d(ON)
t
r
V
= 4.5
V
, V
=
1
3
V
,
DD
GS
D
ns
I
= 38 A, R
= 6
W
G
Turn
−
Off Delay Time
Fall Time
t
38.5
9.8
d(OFF)
t
f
GS
Turn
−
On Delay Time
Rise Time
t
14.8
4.2
59
d(ON)
t
r
V
= 10
V
, V
=
1
3
V
,
DD
GS
D
ns
V
I
= 38 A, R
= 6
W
G
Turn
−
Off Delay Time
Fall Time
t
d(OFF)
t
f
7.9
SOURCE
−
TO
−
DRAIN DIODE CHARACTERISTICS
Forward Diode Voltage
V
SD
T =
25
°
C
0.78
0.65
38
1.2
J
V
S
= 0
V
,
= 38 A
GS
I
T =
125
°
C
J
Reverse Recovery Time
t
ns
RR
V
= 0
V
, dI/dt = 100 A/
m
s,
GS
I
S
= 38 A
Reverse Recovery Charge
Q
25
nC
RR
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
5. Switching
characteristics are independent of operating junction temperatures.
2
NTTFS1D2N02P1E
TYPICAL CHARACTERISTICS
180
160
140
120
100
80
180
160
140
120
100
80
3.6 to 10 V
3.2 V
T =
25
°
C
J
V
GS
= 2.8 V
2.6 V
60
60
40
40
20
0
20
0
T =
125
°
C
J
T =
−
55
°
C
J
0
1
2
3
0
1
2
3
4
5
V
DS
, DRAIN
−
TO
−
SOURCE VOLTAGE (V)
V
GS
, GATE
−
TO
−
SOURCE VOLTAGE (V)
Figure 1. On
−
Region Characteristics
Figure 2. Transfer Characteristics
1.6
1.4
1.2
1.0
0.8
6
5
4
3
2
T =
25
°
C
J
T =
25
°
C
D
J
I
= 38 A
V
= 4.5 V
= 10 V
GS
V
GS
1
0
0.6
0.4
2
3
4
5
6
7
8
9
10
10
15
20
25
30
35
40
45
50
V
GS
, GATE
−
TO
−
SOURCE VOLTAGE (V)
I ,
DRAIN CURRENT (A)
D
Figure 3. On
−
Resistance vs. Gate
−
to
−
Source
Figure 4. On
−
Resistance vs. Drain Current and
Voltage
Gate Voltage
100K
1.8
1.6
1.4
1.2
1.0
0.8
T =
150
°
C
J
V
= 10 V
= 38 A
GS
10K
1K
100
10
I
D
T =
125
°
C
J
T =
85
°
C
J
T =
25
°
C
J
1
0.1
0.6
0.4
0.01
−
50
−
25
0
25
50
75 100
125 150
175
5
7
9
11 13 15 17 19 21 23
25
T , JUNCTION TEMPERATURE (
°
C)
J
V
, DRAIN
−
TO
−
SOURCE VOLTAGE (V)
DS
Figure 5. On
−
Resistance Variation with
Figure 6. Drain
−
to
−
Source Leakage Current
Temperature
vs. Voltage
3
NTTFS1D2N02P1E
TYPICAL CHARACTERISTICS
10K
1K
10
V
= 13 V
= 38 A
DS
9
8
7
6
5
4
3
C
ISS
I
D
T =
25
°
C
J
C
OSS
100
C
RSS
Q
GD
Q
GS
10
1
V
= 0 V
GS
2
1
0
T =
25
°
C
J
f = 1 MHz
5
0
10
15
20
25
0
5
10 15 20 25 30 35 40 45 50
55
Q ,
TOTAL GATE CHARGE (nC)
V
DS
, DRAIN
−
TO
−
SOURCE VOLTAGE (V)
G
Figure 7. Capacitance Variation
Figure 8. Gate
−
to
−
Source vs. Total Charge
40
10
1000
100
V
GS
= 0 V
t
t
d(off)
t
d(on)
10
1
V
V
I
= 13 V
= 10 V
= 38 A
GS
DS
f
t
r
D
T =
125
°
C
T =
25
°
C
T =
−
55
°
C
J
J
J
1
1
10
R ,
GATE RESISTANCE (
W
)
100
0.3
0.4
0.5
, SOURCE
−
TO
−
DRAIN VOLTAGE (V)
SD
0.6
0.7
0.8
0.9
1.0
V
G
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance
Figure 10. Diode Forward Voltage vs. Current
5000
1000
100
25
°
C Rating
100
°
C Rating
125
°
C Rating
100
10
1
100
m
s
10
1 ms
10 ms
100 ms
1 s
10 s
R
Limit
DS(on)
T =
25
°
C
A
Single Pulse
T =
Max Rated
J
0.1
DC
R
= 155
°
C/W
q
JA
1
0.01
0.01
0.1
1
10
100
0.001 0.01
0.1
t ,
TIME IN AVALANCHE (mS)
AV
1
10
100 1000
V
DS
, DRAIN
−
TO
−
SOURCE VOLTAGE (V)
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
Figure 12. Maximum Drain Current vs. Time in
Avalanche
4
NTTFS1D2N02P1E
TYPICAL CHARACTERISTICS
10
1
50% Duty Cycle
20%
0.1
2%
1%
0.01
0.001
5% 10%
0.0001
0.00001
Single Pulse
0.000001 0.00001
0.000001
0.0001
0.001
0.01
0.1
1
10
100
1000
t, RECTANGULAR PULSE DURATION (sec)
Figure 13. transient Thermal impedance
ORDERING INFORMATION
Device
†
Marking
Package
Shipping
NTTFS1D2N02P1E
2EJN
Power33
(Pb
−
Free)
3000 /
T
a
pe & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our
T
a
pe and Reel Packaging
Specifications Brochure, BRD8011/D.
5
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
WDFN8 3.3X3.3, 0.65P
CASE 483AW
ISSUE A
DATE 10 SEP 2019
GENERIC
MARKING DIAGRAM*
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb
−
Free indicator, “G” or microdot “
G
”, may
or may not be present. Some products may
not follow the Generic Marking.
XXXX = Specific Device Code
A
Y
= Assembly Location
=
Y
e
ar
XXXX
AYWW
WW =
Work Week
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions
are uncontrolled
except when stamped
“CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON13672G
WDFN8 3.3X3.3, 0.65P
PAGE 1 OF 1
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