onsemi-NTTFS5C673NLTAG
| Part # | onsemi-NTTFS5C673NLTAG |
Download  | onsemi-NTTFS5C673NLTAG |
NTTFS5C673NL
Power MOSFET
60
V
,
9
.3 m
W
, 50 A, Single N−Channel
Features
•
Small Footprint (3.3×3.3 mm) for Compact Design
•
Low R
to Minimize Conduction Losses
•
Low Q
and Capacitance to Minimize Driver Losses
DS(on)
G
•
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
V
R
MAX
I MAX
D
(BR)DSS
DS(ON)
9.3 m
W
@ 10 V
MAXIMUM RATINGS
(T =
25
°
C unless otherwise noted)
60 V
J
50 A
13.3 m
W
@ 4.5 V
Parameter
Drain−to−Source Voltage
Symbol
Value
60
Unit
V
V
DSS
Gate−to−Source Voltage
V
GS
20
V
D (5)
Continuous Drain
Current R
T
= 25
°
C
= 100
°
C
= 25
°
C
I
50
A
C
D
q
JC
T
C
35
Steady
State
Power Dissipation
T
C
P
46
W
A
D
G (4)
R
q
JC
T
C
= 100
°
C
23
Continuous Drain
Current R
T =
25
°
C
A
I
D
13
S (1,2,3)
N−CHANNEL MOSFET
q
JA
T =
100
°
C
A
9
Steady
State
Power Dissipation
T =
25
°
C
A
P
3.1
1.6
290
W
D
R
q
JA
MARKING
DIAGRAM
T =
100
°
C
A
Pulsed Drain Current
T =
25
°
C, t
= 10
m
s
I
DM
A
A
p
1
1
S
S
S
G
D
D
D
D
Operating Junction and Storage
T
e
mperature
T , T
−
5
5 to
+175
°
C
J
stg
673L
AYWW
G
G
WDFN8
(
m
8FL)
CASE 511AB
Source Current (Body Diode)
I
S
52
88
A
Single Pulse Drain−to−Source Avalanche
E
AS
mJ
Energy (I
= 2.3 A)
L(pk)
673L
A
Y
= Specific Device Code
= Assembly Location
=
Y
e
ar
Lead
T
e
mperature for Soldering Purposes
(1/8
″
from case for 10 s)
T
L
260
°
C
WW
G
= Work Week
= Pb−Free Package
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
(Note: Microdot may be in either location)
THERMAL RESISTANCE MAXIMUM RATINGS
Parameter
Symbol
Value
3.2
Unit
ORDERING INFORMATION
See detailed ordering, marking and shipping information in the
Junction−to−Case − Steady State
R
°
C/W
q
JC
JA
R
48
q
1. The
entire application environment impacts the thermal resistance values shown,
they are not constants and are only valid for the particular conditions noted.
2
2. Surface−mounted
on FR4 board using a 650 mm
, 2 oz. Cu pad.
3. Maximum
current for pulses as long as 1 second is higher but is dependent
on pulse duration and duty cycle.
©
Semiconductor Components Industries, LLC, 2017
1
Publication Order Number:
May, 2018 − Rev. 2
NTTFS5C673NL/D
NTTFS5C673NL
ELECTRICAL CHARACTERISTICS
(T =
25
°
C unless otherwise specified)
J
Parameter
Symbol
Test Condition
Min
Typ
Max
Unit
OFF CHARACTERISTICS
Drain−to−Source Breakdown Voltage
V
V
GS
= 0
V
, I
=
2
50
m
A
60
V
(BR)DSS
D
Drain−to−Source Breakdown Voltage
T
e
mperature Coefficient
V
/
28
(BR)DSS
mV/
°
C
T
J
Zero Gate Voltage Drain Current
I
V
V
= 0
V
,
= 60 V
T =
25
°
C
10
DSS
GS
DS
J
m
A
T =
125
°
C
J
250
100
Gate−to−Source Leakage Current
Gate Threshold Voltage
I
V
= 0
V
, V
=
2
0 V
nA
GSS
DS
GS
V
V
= V
, I
= 35
m
A
1.2
2.0
V
GS(TH)
GS
DS
D
Threshold
T
e
mperature Coefficient
Drain−to−Source On Resistance
V
/T
−4.5
8.0
11
mV/
°
C
GS(TH)
J
R
V
= 10 V
I
I
= 25 A
= 25 A
9.3
DS(on)
GS
D
m
W
V
GS
= 4.5 V
13.3
D
Forward Transconductance
CHARGES AND CAPACITANCES
Input Capacitance
g
V
=15
V
, I
=
2
5 A
37
S
FS
DS
D
C
880
450
11
ISS
Output Capacitance
C
OSS
C
RSS
V
= 0
V
, f = 1
M
Hz, V
= 25 V
pF
GS
DS
Reverse Transfer Capacitance
T
o
tal Gate Charge
Q
V
GS
= 4.5
V
, V
=
3
0 V; I
= 25 A
4.5
9.5
1.0
2.0
0.8
2.9
nC
nC
G(TOT)
G(TOT)
DS
D
T
o
tal Gate Charge
Q
V
GS
= 10
V
, V
=
3
0 V; I
= 25 A
DS D
Threshold Gate Charge
Gate−to−Source Charge
Gate−to−Drain Charge
Plateau Voltage
Q
G(TH)
Q
nC
V
GS
GD
GP
V
GS
= 4.5
V
, V
=
3
0 V; I
= 25 A
DS D
Q
V
Turn−On Delay Time
t
9.0
50
d(ON)
Rise Time
t
r
V
GS
= 4.5
V
, V
=
3
0
V
,
DS
ns
V
I
= 25 A, R
= 2.5
W
D
G
Turn−Off Delay Time
t
13
d(OFF)
Fall Time
t
f
3.0
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
V
SD
T =
25
°
C
J
0.9
0.8
28
14
14
18
1.2
V
I
= 0
V
,
GS
S
= 25 A
T =
125
°
C
J
Reverse Recovery Time
Charge Time
t
RR
t
a
ns
V
= 0
V
,
d
Is/dt = 100 A/
m
s,
GS
I
S
= 25 A
Discharge Time
t
b
Reverse Recovery Charge
Q
nC
RR
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. Pulse
T
e
st: pulse width
v
300
m
s, duty cycle
v
2%.
5. Switching
characteristics are independent of operating junction temperatures.
2
NTTFS5C673NL
TYPICAL CHARACTERISTICS
40
35
30
25
20
15
10
40
V
= 3.6 V to 10 V
V
DS
= 3 V
GS
35
30
25
20
15
10
3.2 V
3.0 V
2.8 V
T =
125
°
C
J
2.6 V
2.4 V
T =
25
°
C
J
5
0
5
0
T =
−55
°
C
J
0
0.5
1.0
1.5
2.0
2.5
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5 4.0
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
V
GS
, GATE−TO−SOURCE VOLTAGE (V)
Figure 1. On−Region Characteristics
Figure 2. Transfer Characteristics
20
18
16
14
12
10
40
T =
25
°
C
J
I
= 25 A
D
35
30
25
20
T =
25
°
C
J
V
V
= 4.5 V
GS
15
10
5
= 10 V
GS
8
6
3
4
5
6
7
8
9
10
0
10 20 30 40
50 60 70
80 90
100
V
GS
, GATE−TO−SOURCE VOLTAGE (V)
I ,
DRAIN CURRENT (A)
D
Figure 3. On−Resistance vs. Gate−to−Source
Voltage
Figure 4. On−Resistance vs. Drain Current and
Gate Voltage
2.25
100,000
I
V
= 25 A
D
2.00
1.75
1.50
1.25
1.00
T =
175
°
C
J
= 10 V
GS
10,000
1000
100
T =
125
°
C
J
T =
85
°
C
J
10
1
0.75
0.50
−50 −25
0
25
50
75
100 125 150 175
10
20
, DRAIN−TO−SOURCE VOLTAGE (V)
DS
30
40
50
60
T , JUNCTION TEMPERATURE (
°
C)
V
J
Figure 5. On−Resistance Variation with
Temperature
Figure 6. Drain−to−Source Leakage Current
vs. Voltage
3
NTTFS5C673NL
TYPICAL CHARACTERISTICS
10
10,000
1000
100
10
Q
V
= 0 V
T
GS
9
8
7
6
5
4
3
2
T =
25
°
C
J
f = 1 MHz
C
iss
C
oss
Q
gd
Q
gs
C
rss
T =
25
°
C
J
V
= 30 V
= 25 A
DS
1
0
I
D
1
0
10
20
30
40
50
60
100
100
0
1
2
3
4
5
6
7
8
9
10
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
Q ,
TOTAL GATE CHARGE (nC)
g
Figure 7. Capacitance Variation
Figure 8. Gate−to−Source vs. Total Charge
100
10
1
100
10
V
= 0 V
GS
t
r
t
d(off)
t
d(on)
1
V
V
= 4.5 V
= 30 V
GS
t
f
DS
T =
125
°
C
T =
25
°
C
J
T =
−55
°
C
J
J
I
D
= 25 A
0.1
1
10
R ,
GATE RESISTANCE (
W
)
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
V
SD
, SOURCE−TO−DRAIN VOLTAGE (V)
G
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance
Figure 10. Diode Forward Voltage vs. Current
100
10
1000
100
10
1 ms
500
m
s
T
= 25
°
C
J(initial)
V
GS
≤
10 V
1
T
= 100
°
C
J(initial)
Single Pulse
= 25
°
C
1
T
C
10 ms
R
Limit
0.1
DS(on)
Thermal Limit
Package Limit
dc
0.01
0.1
0.1
1
10
1E−5
1E−4
T ,
TIME IN AVALANCHE (s)
AV
1E−3
1E−2
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
Figure 12. Maximum Drain Current vs. Time in
Avalanche
4
NTTFS5C673NL
TYPICAL CHARACTERISTICS
100
10
1
Duty Cycle = 50%
20%
10%
5%
2%
1%
0.1
Single Pulse
0.01
0.000001 0.00001
0.0001
0.001
0.01
0.1
1
10
100
1000
PULSE TIME (sec)
Figure 13. Thermal Response
DEVICE ORDERING INFORMATION
Device
†
Marking
Package
Shipping
NTTFS5C673NLTAG
673L
DFN5
(Pb−Free)
1500 /
T
a
pe & Reel
5000 /
T
a
pe & Reel
NTTFS5C673NLTWG
673L
DFN5
(Pb−Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our
T
a
pe and Reel Packaging
Specifications Brochure, BRD8011/D.
5
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
WDFN8 3.3×3.3, 0.65P
CASE 511AB
ISSUE D
1
DATE 23 APR 2012
SCALE 2:1
2X
NOTES:
0.20
C
1. DIMENSIONING
AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING
DIMENSION: MILLIMETERS.
3. DIMENSION
D1 AND E1 DO NOT INCLUDE MOLD FLASH
PROTRUSIONS OR GATE BURRS.
D
A
B
E
2X
D1
MILLIMETERS
INCHES
NOM
0.030
−−−
0.012
0.20
C
8
1
7
6
5
4
DIM
A
A1
b
c
MIN
0.70
0.00
0.23
0.15
NOM
0.75
−−−
0.30
0.20
MAX
MIN
MAX
0.031
0.002
0.016
0.010
0.80
0.05
0.40
0.25
0.028
0.000
0.009
0.006
4X
q
E1
0.008
D
3.30 BSC
3.05
2.11
3.30 BSC
3.05
1.60
0.30
0.65 BSC
0.41
0.80
0.43
0.130 BSC
0.120
0.083
0.130 BSC
0.120
0.063
0.012
0.026 BSC
0.016
0.032
0.017
0.005
0.059
−−−
D1
D2
E
E1
E2
E3
e
G
K
L
L1
M
2.95
1.98
3.15
2.24
0.116
0.078
0.124
0.088
c
2
3
A1
TOP VIEW
2.95
1.47
0.23
3.15
1.73
0.40
0.116
0.058
0.009
0.124
0.068
0.016
0.10
0.10
C
C
A
C
6X
e
0.012
0.026
0.012
0.002
0.055
0
0.020
0.037
0.022
0.008
0.063
0.30
0.65
0.30
0.06
1.40
0
0.51
0.95
0.56
0.20
1.60
SEATING
PLANE
0.13
1.50
−−−
DETAIL A
SIDE VIEW
DETAIL A
q
12
12
_
_
_
_
8X
b
0.10
0.05
C
C
A
B
SOLDERING FOOTPRINT*
8X
e/2
0.42
0.65
4X
L
4X
0.66
PITCH
1
8
4
5
PACKAGE
OUTLINE
K
E2
M
E3
3.60
L1
D2
G
2.30
BOTTOM VIEW
0.57
0.47
0.75
GENERIC
MARKING DIAGRAM*
2.37
3.46
1
XXXXX
DIMENSION: MILLIMETERS
AYWW
G
*For additional information on our Pb
−
Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting
T
e
chniques Reference Manual, SOLDERRM/D.
G
XXXXX =
Specific Device Code
A
Y
= Assembly Location
=
Y
e
ar
WW
G
= Work Week
= Pb
−
Free Package
*This information is generic. Please refer
to device data sheet for actual part
marking.
Pb
−
Free indicator, “G” or microdot “
G
”,
may or may not be present.
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions
are uncontrolled
except when stamped
“CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON30561E
WDFN8 3.3X3.3, 0.65P
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
©
Semiconductor Components Industries, LLC, 2019
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent
coverage may be accessed at
www.onsemi.com/site/pdf/Patent
−
Marking.pdf
. ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such
claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This
literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMEN
T
:
TECHNICAL SUPPORT
North American Technical Support:
Voice Mail: 1 800
−
282
−
9855
T
o
ll Free USA/Canada
Phone: 011 421 33 790 2910
Europe, Middle East and Africa Technical Support:
Phone: 00421 33 790 2910
For additional information, please contact your local Sales Representative
◊
