onsemi-NTZD3154NT1G
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NTZD3154N
Small Signal MOSFET
20
V
,
5
40 mA, Dual N−Channel
Features
•
Low R
Improving System Efficiency
DS(on)
•
Low Threshold
V
o
ltage
V
R
Typ
D
•
Small Footprint 1.6 x 1.6 mm
•
ESD Protected Gate
•
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
(BR)DSS
DS(on)
400 m
W
@ 4.5 V
500 m
W
@ 2.5 V
20
540 mA
700 m
W
@ 1.8 V
Applications
D1
D2
•
Load/Power Switches
•
Power Supply Converter Circuits
•
Battery Management
•
Cell Phones, Digital Cameras, PDAs, Pagers, etc.
G1
G2
N−Channel
MOSFET
MAXIMUM RATINGS
(T =
25
°
C unless otherwise noted.)
J
S1
S2
Parameter
Drain−to−Source Voltage
Symbol Value Unit
V
DSS
20
V
V
MARKING
DIAGRAM
Gate−to−Source Voltage
V
GS
7.0
6
Continuous Drain Current
T = 25
°
C
540
390
250
mA
A
Steady
State
I
D
1
TV M
G
T = 85
°
C
A
G
SOT−563−6
CASE 463A
Power Dissipation
P
D
mW
mA
Steady State
TV
M
G
= Specific Device Code
= Date Code
= Pb−Free Package
Continuous Drain Current
T = 25
°
C
570
410
280
A
t
v
5 s
I
D
T = 85
°
C
A
(Note: Microdot may be in either location)
Power Dissipation
P
mW
D
t
v
5 s
t =
10
m
s
PINOU
T
:
S
OT−563
Pulsed Drain Current
I
1.5
A
p
DM
Operating Junction and Storage
T
e
mperature
T ,
−55 to
150
°
C
J
T
STG
S
1
2
3
6
5
D
1
1
Source Current (Body Diode)
I
350
260
mA
S
Lead
T
e
mperature for Soldering Purposes
T
°
C
L
(1/8
″
from case for 10 s)
G
G
2
1
2
THERMAL RESISTANCE RATINGS
Parameter
Symbol
Max
Unit
4
S
2
D
Junction−to−Ambient – Steady State
500
°
C/W
R
q
JA
T
o
p View
447
ORDERING INFORMATION
See detailed ordering and shipping information in the package
Stresses exceeding those listed in the Maximum Ratings table may damage
the device. If any of these limits are exceeded, device functionality should not
be assumed, damage may occur and reliability may be affected.
1. Surface
mounted on FR4 board using 1 in sq pad size
(Cu. area = 1.127 in sq [1 oz] including traces).
©
Semiconductor Components Industries, LLC, 2014
1
Publication Order Number:
December, 2014 − Rev. 3
NTZD3154N/D
NTZD3154N
ELECTRICAL CHARACTERISTICS
(T =
25
°
C unless otherwise noted.)
J
Parameter
OFF CHARACTERISTICS
Symbol
Test Condition
Min Typ Max
Unit
Drain−to−Source Breakdown Voltage
V
V
GS
= 0
V
, I
=
2
50
m
A
20
−
−
−
−
V
(BR)DSS
D
Drain−to−Source Breakdown Voltage
T
e
m-
perature Coefficient
V
/T
14
mV/
°
C
(BR)DSS
J
−
Zero Gate Voltage Drain Current
T =
25
°
C
−
−
−
−
−
−
1.0
5.0
m
A
m
A
J
V
= 0 V
= 16 V
GS
I
DSS
V
DS
T =
125
°
C
J
Gate−to−Source Leakage Current
Gate Threshold Voltage
I
V
DS
= 0
V
, V
=
“
4.5 V
“
5.0
GSS
GS
V
V
= V
, I
= 250
m
A
0.45
−
−
1.0
−
V
mV/
°
C
W
GS(TH)
GS
DS
D
Negative Threshold
T
e
mperature Coefficient
Drain−to−Source On Resistance
V
/T
J
−
2.0
0.4
0.5
0.7
1.0
GS(TH)
V
GS
V
GS
V
GS
= 4.5
V
, I
= 540 mA
−
0.55
0.7
0.9
−
D
= 2.5
V
, I
= 500 mA
−
R
D
DS(on)
= 1.8
V
, I
= 350 mA
−
D
Forward Transconductance
CHARGES AND CAPACITANCES
Input Capacitance
g
V
DS
= 10
V
, I
=
5
40 mA
−
S
FS
D
C
−
−
−
−
−
−
−
80
13
150
25
20
2.5
−
pF
ISS
Output Capacitance
C
C
V
= 0
V
, f =
1
.0 MHz, V
= 16 V
DS
OSS
RSS
GS
Reverse Transfer Capacitance
T
o
tal Gate Charge
10
Q
1.5
0.1
0.2
0.35
nC
G(TOT)
Threshold Gate Charge
Gate−to−Source Charge
Gate−to−Drain Charge
Q
G(TH)
V
GS
= 4.5
V
, V
=
1
0 V; I
= 540 mA
DS D
Q
−
GS
GD
Q
−
GS
Turn−On Delay Time
Rise Time
t
−
−
−
−
6.0
4.0
16
−
−
−
−
ns
d(ON)
t
r
V
GS
= 4.5
V
, V
=
1
0
V
, I
=
5
40 mA,
DD D
R
= 10
W
G
Turn−Off Delay Time
Fall Time
t
d(OFF)
t
f
8.0
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
T =
25
°
C
−
−
−
0.7
0.6
6.5
1.2
−
V
J
V
S
= 0
V
,
= 350 mA
GS
V
SD
I
T =
125
°
C
J
Reverse Recovery Time
t
V
GS
= 0
V
, d
/
d =
100 A/
m
s, I
= 350 mA
−
ns
RR
ISD
t
S
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
2. Surface−mounted
on FR4 board using 1 in. sq. pad size (Cu. area = 1.127 in sq [1 oz] including traces).
3. Pulse
T
e
st: pulse width
v
300
m
s, duty cycle
v
2%.
4. Switching
characteristics are independent of operating junction temperatures.
2
NTZD3154N
TYPICAL PERFORMANCE CURVES
(T =
25
°
C unless otherwise noted)
J
1.2
1.0
0.8
0.6
0.4
0.2
0
1.8
V
DS
w
10 V
5.5 V
1.8 V
T =
25
°
C
J
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
T =
−55
°
C
J
T =
100
°
C
J
V
= 1.6 V
= 1.4 V
GS
V
GS
= 2.0 V to 2.2 V
V
GS
T =
25
°
C
J
V
V
= 1.2 V
= 1.0 V
GS
GS
0
1
2
3
4
5
6
7
8
9
10
0.5
1.0
1.5
2.0
2.5
3.0
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
V
GS
, GATE−TO−SOURCE VOLTAGE (V)
Figure 1. On−Region Characteristics
Figure 2. Transfer Characteristics
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.9
0.8
0.7
0.6
0.5
0.4
0.3
I
= 0.54 A
T =
25
°
C
J
D
T =
25
°
C
J
V
GS
= 1.8 V
V
GS
= 2.5 V
V
GS
= 4.5 V
1
2
3
4
5
6
0.2
0.4
0.6
0.8
1
1.2
V
GS
, GATE−TO−SOURCE VOLTAGE (V)
I ,
DRAIN CURRENT (A)
D
Figure 3. On−Resistance versus
Gate−to−Source Voltage
Figure 4. On−Resistance versus Drain Current
and Gate Voltage
2
1.8
1.6
1.4
1.2
1
1000
100
10
V
GS
= 0 V
I
V
= 0.54 A
D
= 4.5 V
T =
150
°
C
GS
J
T =
100
°
C
J
0.8
0.6
−50
−25
0
25
50
75
100
125
150
2
4
6
8
10
12
14
16
18
20
T , JUNCTION TEMPERATURE (
°
C)
J
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 5. On−Resistance Variation with
Temperature
Figure 6. Drain−to−Source Leakage Current
versus Voltage
3
NTZD3154N
TYPICAL PERFORMANCE CURVES
(T =
25
°
C unless otherwise noted)
J
5
20
16
200
150
T =
25
°
C
Q
J
T
V
DS
4
3
2
1
0
V
= 0 V
GS
V
GS
12
8
C
RSS
100
50
0
C
ISS
Q
Q
GS
GD
0.4
4
I
= 0.54 A
T =
25
°
C
D
C
J
OSS
V
= 0 V
DS
0
1.6
5
0
5
10
15
20
0
0.2
0.6
0.8
1
1.2
1.4
V
GS
V
DS
Q ,
TOTAL GATE CHARGE (nC)
g
Figure 8. Gate−to−Source and
Drain−to−Source Voltage versus Total Charge
GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (V)
Figure 7. Capacitance Variation
0.6
100
10
1
V =
0 V
GS
T =
25
°
C
J
V
= 10 V
= 0.2 A
= 4.5 V
DS
I
D
0.5
0.4
0.3
0.2
0.1
0
V
GS
t
d(OFF
)
t
f
t
d(ON)
t
r
1
10
R ,
GATE RESISTANCE (
W
)
100
0.2
0.3
V
0.4
, SOURCE−TO−DRAIN VOLTAGE (V)
SD
0.5
0.6
0.7
0.8
0.9
1
G
Figure 9. Resistive Switching Time Variation
versus Gate Resistance
Figure 10. Diode Forward Voltage versus
Current
ORDERING INFORMATION
Device
Package
Shipping
NTZD3154NT1G
NTZD3154NT1H
NTZD3154NT2G
NTZD3154NT2H
NTZD3154NT5G
NTZD3154NT5H
4000 /
T
a
pe & Reel
SOT−563
(Pb−Free)
8000 /
T
a
pe & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our
T
a
pe and Reel Packaging
Specifications Brochure, BRD8011/D.
4
NTZD3154N
PACKAGE DIMENSIONS
SOT−563, 6 LEAD
CASE 463A
ISSUE F
NOTES:
1. DIMENSIONING
AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING
DIMENSION: MILLIMETERS
3. MAXIMUM
LEAD THICKNESS INCLUDES LEAD
FINISH THICKNESS. MINIMUM LEAD THICKNESS
IS THE MINIMUM THICKNESS OF BASE MATERIAL.
D
A
−X−
L
6
5
2
4
3
MILLIMETERS
DIM MIN
NOM MAX
INCHES
NOM MAX
E
−Y−
MIN
H
E
A
b
C
D
E
e
0.50
0.17
0.08
1.50
1.10
0.55
0.22
0.12
1.60
1.20
0.60 0.020 0.021 0.023
0.27 0.007 0.009 0.011
0.18 0.003 0.005 0.007
1.70 0.059 0.062 0.066
1.30 0.043 0.047 0.051
0.02 BSC
1
b
5
6 PL
C
0.5 BSC
0.20
e
M
0.08 (0.003)
X Y
L
0.10
1.50
0.30 0.004 0.008 0.012
1.70 0.059 0.062 0.066
H
1.60
E
SOLDERING FOOTPRINT*
0.3
0.0118
0.45
0.0177
1.0
0.0394
1.35
0.0531
0.5
0.5
0.0197 0.0197
mm
inches
ǒ
Ǔ
SCALE 20:1
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting
T
e
chniques Reference Manual, SOLDERRM/D.
ON Semiconductor
and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC).
SCILLC owns the rights to a number of patents, trademarks,
copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at
www.onsemi.com/site/pdf/Patent−Marking.pdf
. SCILLC
reserves the right to make changes without further notice to any products herein.
SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any
particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without
limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications
and actual performance may vary over time.
All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts.
SCILLC
does not convey any license under its patent rights nor the rights of others.
SCILLC products are not designed, intended, or authorized for use as components in systems intended for
surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where
personal injury or death may occur.
Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and
its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly,
any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture
of the part.
SCILLC is an Equal Opportunity/Affirmative Action Employer.
This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMEN
T
:
N. American Technical Support
: 800−282−9855
T
o
ll Free
USA/Canada
Europe, Middle East and Africa Technical Support:
Phone: 421 33 790 2910
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Phone: 81−3−5817−1050
Literature Distribution Center for ON Semiconductor
P
.
O. Box 5163, Denver, Colorado 80217 USA
Phone
: 303−675−2175 or 800−344−3860
T
o
ll Free USA/Canada
Fax
: 303−675−2176 or 800−344−3867
T
o
ll Free USA/Canada
Email
: orderlit@onsemi.com
For additional information, please contact your local
Sales Representative
NTZD3154N/D
