onsemi-NVB5404NT4G
| Part # | onsemi-NVB5404NT4G |
Download  | onsemi-NVB5404NT4G |
NTB5404N, NTP5404N,
NVB5404N
Power MOSFET
40
V
,
1
67 A, Single N−Channel, D
2
PAK &
TO−220
Features
•
Low R
DS(on)
•
High Current Capability
I
D
MAX
V
R
MAX
DS(ON)
(Note 1)
(BR)DSS
•
Low Gate Charge
40 V
4.5 m
ꢂ
@ 10 V
167 A
•
AEC−Q101 Qualified and PPAP Capable − NVB5404N
•
These Devices are Pb−Free and are RoHS Compliant
D
Applications
•
Electronic Brake Systems
•
Electronic Power Steering
•
Bridge Circuits
N−Channel
G
S
MAXIMUM RATINGS
(T =
25
°
C unless otherwise stated)
J
MARKING
DIAGRAMS
Parameter
Drain−to−Source Voltage
Symbol
Value Units
V
DSS
40
20
V
V
A
Gate−to−Source Voltage
Continuous Drain
V
GS
2
D PAK
NTB5404NG
AYWW
T
= 25
°
C
I
D
167
118
254
C
CASE 418B
STYLE 2
Steady
State
1
Current − R
ꢀ
2
3
JC
T
C
= 100
°
C
Power Dissipation −
R
Steady
State
P
D
W
A
T
C
= 25
°
C
ꢀ
JC
1
4
Continuous Drain
Current − R
Steady
State
T =
25
°
C
A
I
D
24
17
ꢀ
JA
T =
100
°
C
A
Power Dissipation −
Steady
State
T =
25
°
C
P
5.4
W
A
D
TO−220AB
CASE 221A
STYLE 5
R
ꢀ
JA
NTP5404NRG
AYWW
Pulsed Drain Current
t =
10
ꢁ
s
p
I
670
A
DM
Operating Junction and Storage
T
e
mperature
T ,
−55 to
175
°
C
J
T
STG
1
2
3
Source Current (Body Diode) Pulsed
I
S
75
A
G
= Pb−Free Device
A
Y
WW
= Assembly Location
=
Y
e
ar
= Work Week
Single Pulse Drain−to Source Avalanche
EAS
1000
mJ
Energy − (V
= 50 V, V
= 10 V, I
= 45 A,
DD
GS
PK
L = 1 mH, R
= 25
ꢂ
)
G
Lead
T
e
mperature for Soldering Purposes
(1/8” from case for 10 s)
260
°
C
T
L
ORDERING INFORMATION
Device
Package
Shipping
†
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
2
NTB5404NT4G
D PAK
800 /
T
a
pe & Reel
(Pb−Free)
THERMAL RESISTANCE RATINGS
NTP5404NRG
NVB5404NT4G
TO−220
(Pb−Free)
50 Units / Rail
Parameter
Junction−to−Case (Drain)
Symbol
Max
0.59
50
Unit
°
C/W
°
C/W
2
D PAK
800 /
T
a
pe & Reel
R
R
θ
JC
JA
(Pb−Free)
θ
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our
T
a
pe and Reel Packaging Specifications
Brochure, BRD8011/D.
1. Surface
mounted on FR4 board using 1 sq in pad size,
(Cu Area 1.127 sq in [2 oz] including traces).
©
Semiconductor Components Industries, LLC, 2015
1
Publication Order Number:
January, 2015 − Rev. 8
NTB5404N/D
NTB5404N, NTP5404N, NVB5404N
ELECTRICAL CHARACTERISTICS
(T =
25
°
C unless otherwise stated)
J
Parameter
Symbol
Test Condition
Min
Typ
Max
Unit
OFF CHARACTERISTICS
Drain−to−Source Breakdown Voltage
V
V
GS
= 0
V
, I
= 250
ꢁ
A
40
V
(BR)DSS
D
Drain−to−Source Breakdown Voltage
T
e
mperature Coefficient
V
/T
J
34
mV/
°
C
(BR)DSS
Zero Gate Voltage Drain Current
I
V
V
= 0
V
,
T =
25
°
C
1.0
10
ꢁ
A
DSS
GS
DS
J
= 40 V
= 0
V
, V
=
GS
T =
100
°
C
J
Gate−to−Source Leakage Current
Gate Threshold Voltage
I
V
30 V
100
nA
GSS
DS
V
V
= V
, I
= 250
ꢁ
A
1.5
3.5
V
GS(TH)
GS
DS
D
Gate Threshold
T
e
mperature
Coefficient
V
/T
−8.2
mV/
°
C
GS(TH)
J
Drain−to−Source On Resistance
R
V
= 10 V, I
= 40 A
3.5
5.1
35
4.5
7.0
m
ꢂ
DS(on)
GS
D
V
GS
= 5.0 V, I
= 15 A
D
Forward Transconductance
CHARGES AND CAPACITANCES
Input Capacitance
g
FS
V
= 10 V, I
= 15 A
S
DS
D
C
4300
1075
450
125
5.5
7000
1700
1000
pF
nC
ISS
V
GS
= 0
V
, f =
1
.0 MHz,
Output Capacitance
C
C
OSS
RSS
V
DS
= 32 V
Reverse Transfer Capacitance
T
o
tal Gate Charge
Q
G(TOT)
Threshold Gate Charge
Gate−to−Source Charge
Gate−to−Drain Charge
Q
G(TH)
V
= 10 V, V
= 32 V,
DS
GS
I
D
= 40 A
Q
12.5
55
GS
GD
Q
GS
Turn−On Delay Time
Rise Time
t
10
65
85
85
ns
ns
d(ON)
t
r
V
= 10 V, V
= 32 V,
GS
DD
I
D
= 40 A, R
= 2.5
ꢂ
G
Turn−Off Delay Time
Fall Time
t
d(OFF)
t
f
GS
Turn−On Delay Time
Rise Time
t
25
175
46
d(ON)
t
r
V
= 5
V
, V
= 20 V,
DD
GS
I
D
= 20 A, R
= 2.5
ꢂ
G
Turn−Off Delay Time
Fall Time
t
d(OFF)
t
f
62
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
V
T =
25
°
C
0.8
0.65
75
1.1
V
SD
J
V
= 0
V
,
GS
S
I =
20 A
T =
125
°
C
J
Reverse Recovery Time
Charge Time
t
ns
RR
t
t
38
a
V
= 0
V
, dI
/dt = 100 A/
ꢁ
s,
SD
GS
I =
20 A
S
Discharge Time
38
b
Reverse Recovery Charge
Q
140
nC
RR
2. Pulse
T
e
st: pulse width
≤
300
ꢁ
s, duty cycle
≤
2%.
3. Switching
characteristics are independent of operating junction temperatures.
2
NTB5404N, NTP5404N, NVB5404N
TYPICAL PERFORMANCE CURVES
200
175
150
125
100
75
200
T =
25
°
C
V
GS
= 8 V to 10 V
7 V
J
V
DS
≥
10 V
175
150
125
100
75
6 V
5 V
4.8 V
4.6 V
4.4 V
4.2 V
T =
25
°
C
J
50
50
25
0
4 V
3.8 V
25
0
T =
125
°
C
J
T =
−55
°
C
J
0
1
2
3
4
5
6
7
8
9
10
0
1
2
3
4
5
6
7
8
9
10
V
GS
, GATE−TO−SOURCE VOLTAGE (VOLTS)
V
DS
, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 1. On−Region Characteristics
Figure 2. Transfer Characteristics
0.01
0.01
0.009
0.008
0.007
0.006
T =
25
°
C
J
I
= 40 A
D
0.009
0.008
0.007
0.006
0.005
0.004
0.003
0.002
0.001
T =
25
°
C
J
V
GS
= 5 V
0.005
0.004
0.003
V
GS
= 10 V
0.002
3
4
5
6
7
8
9
10
20 30
40 50 60 70 80 90
100 110 120 130
140
I
D,
DRAIN CURRENT (AMPS)
V
GS
, GATE−TO−SOURCE VOLTAGE (VOLTS)
Figure 4. On−Resistance vs. Drain Current and
Gate Voltage
Figure 3. On−Resistance vs. Gate−to−Source
Voltage
100000
10000
1000
2.2
V
GS
= 0 V
I
V
= 40 A
D
2
1.8
1.6
1.4
1.2
1
= 10 V
GS
T =
175
°
C
J
T =
100
°
C
J
100
10
0.8
0.6
−50 −25
0
25
50
75 100
125 150 175
4
8
12
, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
DS
16
20
24
28
32
36
40
T , JUNCTION TEMPERATURE (
°
C)
J
V
Figure 5. On−Resistance Variation with
Temperature
Figure 6. Drain−to−Source Leakage Current
vs. Voltage
3
NTB5404N, NTP5404N, NVB5404N
TYPICAL PERFORMANCE CURVES
12000
10000
8000
6000
4000
12
36
V
= 0 V
V =
0 V
GS
DS
T =
25
°
C
J
QT
C
10
30
24
18
12
iss
V
DS
V
GS
8
6
C
rss
Q
GS
Q
GD
C
iss
4
C
oss
2000
0
6
0
2
0
I
= 40 A
D
T =
25
°
C
C
J
rss
0
20
40
60
80
100
120
140
10
5
V
0
5
10
15 20 25
30 35 40
V
DS
GS
Q ,
TOTAL GATE CHARGE (nC)
G
GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 8. Gate−To−Source and
Figure 7. Capacitance Variation
Drain−To−Source Voltage vs. Total Charge
1000
40
35
30
25
20
15
10
t
V
I
= 32 V
= 40 A
= 10 V
V
GS
= 0 V
d(off)
DS
t
f
T =
25
°
C
J
D
t
r
V
GS
100
10
1
t
d(on)
5
0
1
10
100
0.4
0.5
0.6
0.7
0.8
0.9
1
1.1
R ,
GATE RESISTANCE (OHMS)
G
V
SD
, SOURCE−TO−DRAIN VOLTAGE (VOLTS)
Figure 9. Resistive Switching Time
Variation vs. Gate Resistance
Figure 10. Diode Forward Voltage vs. Current
1000
100
10
10
ꢁ
S
100
ꢁ
S
1 mS
10 mS
dc
1
V
GS
= 10 V
SINGLE PULSE
= 25
°
C
T
C
0.1
0.01
R
LIMIT
DS(on)
THERMAL LIMIT
PACKAGE LIMIT
0.001
0.1
1
10
100
V
DS
, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
4
NTB5404N, NTP5404N, NVB5404N
100
10
1
50% Duty Cycle
20%
10%
5%
2%
1%
P
(pk)
R
(t) = r(t) R
ꢀ
JA
0.1
ꢀ
JA
D CURVES APPLY FOR POWER
PULSE TRAIN SHOWN
t
READ TIME AT t
0.01
1
1
t
2
T
J(pk)
− T
= P
R
ꢀ
(t)
JA
C
(pk)
SINGLE PULSE
DUTY CYCLE, D = t
/t
1
2
0.001
0.000001 0.00001
0.0001
0.001
0.01
0.1
1
10
100
1000
t, PULSE TIME (sec)
Figure 12. Thermal Response
5
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
D
2
PAK 3
CASE 418B
−
04
ISSUE L
DATE 17 FEB 2015
SCALE 1:1
NOTES:
1. DIMENSIONING
AND TOLERANCING
PER ANSI Y14.5M, 1982.
C
2. CONTROLLING
DIMENSION: INCH.
3. 418B
−
01 THRU 418B
−
03 OBSOLETE,
NEW STANDARD 418B
−
04.
E
V
W
−
B
−
INCHES
DIM MIN
MAX
MILLIMETERS
4
MIN
MAX
A
B
C
D
E
F
G
H
J
0.340 0.380
0.380 0.405
0.160 0.190
0.020 0.035
0.045 0.055
0.310 0.350
0.100 BSC
8.64
9.65 10.29
4.06
0.51
1.14
7.87
9.65
4.83
0.89
1.40
8.89
A
S
1
2
3
2.54 BSC
0.080
0.018 0.025
0.090 0.110
0.110
2.03
0.46
2.29
1.32
7.11
5.00 REF
2.00 REF
0.99 REF
2.79
0.64
2.79
1.83
8.13
−
T
−
SEATING
PLANE
K
W
J
K
L
G
0.052 0.072
0.280 0.320
0.197 REF
0.079 REF
0.039 REF
0.575 0.625 14.60 15.88
0.045 0.055
M
N
P
R
S
V
H
D
3 PL
M
M
T B
0.13 (0.005)
1.14
1.40
VARIABLE
CONFIGURATION
ZONE
N
P
R
U
L
L
L
M
M
M
F
F
F
VIEW W
−
W
VIEW W
−
W
VIEW W
−
W
1
2
3
STYLE 1:
STYLE 2:
STYLE 3:
STYLE 4:
STYLE 5:
PIN 1.
CATHODE
2. ANODE
STYLE 6:
PIN 1.
NO CONNECT
2. CATHODE
PIN 1.
BASE
PIN 1.
GATE
PIN 1.
ANODE
2. CATHODE
3. ANODE
PIN 1.
GATE
2. COLLECTOR
3. EMITTER
4. COLLECTOR
2. DRAIN
3. SOURCE
4. DRAIN
2. COLLECTOR
3. EMITTER
4. COLLECTOR
3. CATHODE
4. ANODE
3. ANODE
4. CATHODE
4. CATHODE
MARKING INFORMATION AND FOOTPRINT ON PAGE 2
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions
are uncontrolled
except when stamped
“CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98ASB42761B
D
2
PAK 3
PAGE 1 OF 2
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
©
Semiconductor Components Industries, LLC, 2019
D
2
PAK 3
CASE 418B
−
04
ISSUE L
DATE 17 FEB 2015
GENERIC
MARKING DIAGRAM*
xx
xxxxxxxxx
AWLYWWG
AYWW
xxxxxxxxG
AKA
xxxxxxxxG
AYWW
IC
Standard
Rectifier
xx
A
WL
Y
= Specific Device Code
= Assembly Location
= Wafer Lot
=
Y
e
ar
WW
G
AKA
= Work Week
= Pb
−
Free Package
= Polarity Indicator
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb
−
Free indicator, “G” or microdot “
G
”,
may or may not be present.
SOLDERING FOOTPRINT*
10.49
8.38
16.155
3.
2
5
X
04
2X
1.016
5.080
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb
−
Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting
T
e
chniques Reference Manual, SOLDERRM/D.
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions
are uncontrolled
except when stamped
“CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98ASB42761B
D
2
PAK 3
PAGE 2 OF 2
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
©
Semiconductor Components Industries, LLC, 2019
onsemi
,
, and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “
onsemi
” or its affiliates
and/or subsidiaries in the United States and/or other countries.
onsemi
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A listing of
onsemi
’s product/patent coverage may be accessed at
www.onsemi.com/site/pdf/Patent
−
Marking.pdf
.
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−
is” and
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onsemi
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