onsemi-NVBLS0D5N04M8TXG
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NVBLS0D5N04M8
N-Channel
40
V
,
3
00 A, 0.57 m
W
Features
•
Typical R
•
Typical Q
= 0.46 m
W
at V
= 10
V
, I
=
8
0 A
GS D
DS(on)
= 220 nC at V
= 10
V
, I
=
8
0 A
g(tot)
GS
D
•
UIS Capability
•
AEC
−
Q101 Qualified and P
P
A
P Capable
•
These Devices are Pb
−
Free and are RoHS Compliant
MAXIMUM RATINGS
T =
25
°
C unless otherwise noted
J
MO
−
299A
CASE 100CU
Parameter
Drain
−
to
−
Source Voltage
Gate
−
to
−
Source Voltage
Symbol
Ratings
40
Units
V
DSS
V
V
A
V
GS
20
D (9)
Drain Current
−
Continuous (V
= 10)
I
D
300
GS
T
= 25
°
C
C
Pulsed Drain Current
T
= 25
°
C
See
Figure 4
C
G (1)
Power Dissipation
E
1064
429
mJ
W
AS
P
D
Derate Above 25
°
C
2.86
W/
°
C
°
C
S (2
−
8)
Operating and Storage
T
e
mperature
Thermal Resistance, Junction
−
to
−
Case
Maximum Thermal Resistance,
T , T
−
55 to +175
0.35
J
STG
R
°
C/W
°
C/W
q
JC
JA
ORDERING INFORMATION
R
43
q
Junction
−
to
−
Ambient
Device
Package
Marking
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
1. Current
is limited by bondwire configuration.
NVBLS0D5N04M8TXG MO
−
299A
(Pb
−
Free)
0D5N04M8
2. Starting
T =
25
°
C, L = 0.3 mH, I
= 84 A, V
= 40 V during inductor charging
J
AS
DD
and V
= 0 V during time in avalanche.
DD
3. R
is the sum of the junction
−
to
−
case and case
−
to
−
ambient thermal
q
JA
resistance, where the case thermal reference is defined as the solder
mounting surface of the drain pins. R
is guaranteed by design, while R
q
JA
q
JC
is determined by the board design. The maximum rating presented here is
2
based on mounting on a 1 in
pad of 2 oz copper.
©
Semiconductor Components Industries, LLC, 2018
1
Publication Order Number:
June, 2019
−
Rev. 0
NVBLS0D5N04M8/D
NVBLS0D5N04M8
Table 1. ELECTRICAL CHARACTERISTICS
(T =
25
°
C unless otherwise noted)
J
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
OFF CHARACTERISTICS
B
Drain
−
to
−
Source Breakdown Voltage
Drain
−
to
−
Source Leakage Current
I
= 250
m
A, V
= 0 V
40
−
−
−
−
−
−
1
V
VDSS
D
GS
V
= 40 V,
= 0 V
T =
25
°
C
J
I
m
A
mA
nA
DS
GS
DSS
V
J
−
1
I
Gate
−
to
−
Source Leakage Current
V
GS
=
20 V
−
100
GSS
ON CHARACTERISTICS
V
Gate
−
to
−
Source Threshold Voltage
Drain
−
to
−
Source On Resistance
V
= V
, I
= 250
m
A
2.0
3.0
4.0
V
GS(th)
DS(on)
GS
DS
D
R
I
D
= 80 A, V
= 10 V
T =
25
°
C
J
−
0.46
0.57
m
W
GS
DYNAMIC CHARACTERISTICS
C
Input Capacitance
V
= 25
V
, V
= 0 V, f = 1
M
Hz
−
−
−
−
−
−
−
−
15900
4000
600
2.6
−
−
pF
pF
pF
W
iss
DS
GS
C
Output Capacitance
oss
C
Reverse Transfer Capacitance
Gate Resistance
−
rss
R
f = 1 MHz
−
g
Q
T
o
tal Gate Charge at 10 V
Threshold Gate Charge
Gate
−
to
−
Source Gate Charge
Gate
−
to
−
Drain “Miller” Charge
V
= 0 to 10 V
= 0 to 2 V
V =
20 V
DD
D
220
29
296
39
−
nC
nC
nC
nC
g(
T
o
T)
GS
I
= 80 A
Q
V
GS
g(th)
Q
73
gs
Q
41
−
gd
SWITCHING CHARACTERISTICS
t
Turn
−
On Time
Turn
−
On Delay
Rise Time
V
GS
= 20
V
, I
=
8
0 A,
−
−
−
−
−
−
−
54
82
106
52
−
221
−
ns
ns
ns
ns
ns
ns
on
DD
D
V
= 10
V
, R
= 6
W
GEN
t
d(on)
t
r
−
t
Turn
−
Off Delay
Fall Time
−
d(off)
t
f
−
t
Turn
−
Off Time
215
off
DRAIN
−
SOURCE DIODE CHARACTERISTICS
V
Source
−
to
−
Drain Diode Voltage
I
I
= 80 A, V
= 0 V
−
−
−
−
−
−
1.25
1.2
V
V
SD
SD
GS
= 40 A, V
= 0 V
SD
GS
t
Reverse
−
Recovery Time
Reverse
−
Recovery Charge
119
228
133
274
ns
nC
I =
80 A, dI
/d =
100 A/
m
s,
rr
F
SD
DD
t
V
= 32 V
Q
rr
4. The
maximum value is specified by design at T
= 175
°
C. Product is not tested to this condition in production.
J
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
2
NVBLS0D5N04M8
Typical Characteristics
700
600
500
400
300
200
100
0
1.2
1.0
0.8
0.6
0.4
0.2
0.0
CURRENT LIMITED
BY PACKAGE
V
GS
= 10V
CURRENT LIMITED
BY SILICON
25
50
75 100 125 150 175 200
T
C
, CASE TEMPERATURE(
o
C)
0
25
50
75 100 125 150 175
T
C
, CASE TEMPERATURE(
o
C)
Figure 2.
Maximum Continuous Drain Current vs.
Case Temperature
Figure 1.
Normalized Power Dissipation vs. Case
Temperature
2
DUTY CYCLE
−
DESCENDING ORDER
1
D = 0.50
0.20
0.10
P
DM
0.05
0.02
0.01
t
0.1
1
t
2
NOTES:
DUTY FACTOR: D = t
/t
1
2
SINGLE PULSE
0.01
PEAK T
= P
x Z
x R
+ T
J
DM
q
JA
q
JA
C
10
−
5
10
−
4
10
−
3
10
−
2
10
−
1
10
0
10
1
t, RECTANGULAR
PULSE DURATION(s)
Figure 3.
Normalized Maximum Transient Thermal Impedance
10000
1000
100
V
GS
= 10V
o
T
= 25
C
C
FOR TEMPERATURES
o
ABOVE 25
C DERATE PEAK
CURRENT AS FOLLOWS:
175
−
T
C
I = I
2
150
SINGLE PULSE
10
−
5
10
−
4
10
−
3
10
−
2
10
−
1
10
0
10
1
t, RECTANGULAR PULSE DURATION(s)
Figure 4.
Peak Current Capability
3
NVBLS0D5N04M8
Typical Characteristics
10000
1000
2000
1000
If R = 0
= (L)(I
)/(1.3*RATED BV
t
AV
−
V
)
DD
AS
DSS
≠
If R
AV
0
t
= (L/R)ln[(I
*R)/(1.3*RATED BV
−
V )
+1]
DSS DD
AS
100
10
100us
100
10
1
STARTING T
= 25
o
C
J
OPERATION IN THIS
AREA MAY BE
1ms
LIMITED BY r
DS(on)
1
10ms
100ms
SINGLE PULSE
T
STARTING T
J
= 150
o
C
= MAX RATED
= 25
o
C
J
T
C
0.1
0.001 0.01
0.1
1
10 100
1000 10000
t
A
V
, TIME IN AVALANCHE (ms)
0.1
1
10
100 200
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
NOTE: Refer to Fairchild Application Notes AN7514 and AN7515
Figure 6.
Unclamped Inductive Switching
Capability
Figure 5.
Forward Bias Safe Operating Area
300
400
PULSE DURATION = 80
m
s
DUTY CYCLE = 0.5% MAX
V
GS
= 0 V
100
240
180
120
60
V
DD
= 5V
T
J
= 175
o
C
T
J
= 25
o
C
10
1
T
J
= 25
o
C
T
J
=
−
55
o
C
T
J
= 17
5
o
C
0
0.1
2
3
4
5
6
0.0
0.2
0.4
0.6
0.8
1.0
1.2
V
GS
, GATE TO SOURCE VOLTAGE (V)
V
SD
, BODY DIODE FORWARD VOLTAGE (V)
Figure 7.
Transfer Characteristics
Figure 8.
Forward Diode Characteristics
400
350
V
GS
15V Top
350
300
250
200
150
100
50
300
10V
8V
V
GS
15V Top
10V
5V
7V
6V
250
8V
7V
5.5V
5V Bottom
200
6V
5.5V
5V Bottom
150
5V
100
80
m
s PULSE WIDTH
80
m
s PULSE WIDTH
Tj=175
o
C
50
0
Tj=25
o
C
0
0.0
0.0
0.5
1.0
1.5
2.0
0.5
1.0
1.5
2.0
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
Figure 9.
Saturation Characteristics
Figure 10.
Saturation Characteristics
4
NVBLS0D5N04M8
Typical Characteristics
5
2.0
PULSE DURATION = 80
m
s
DUTY CYCLE = 0.5% MAX
I
D
=
80A
PULSE DURATION = 80
m
s
DUTY CYCLE = 0.5% MAX
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
4
3
2
1
0
T
J
= 17
5
o
C
T
J
= 25
o
C
I
D
= 80A
= 10V
V
GS
−
80
−
40
0
40
80
120
160
200
2
4
6
8
10
T
J
, JUNCTION TEMPERATURE
(
o
C
)
V
GS
, GATE TO SOURCE VOLTAGE (V)
Figure 11.
R
DSON
vs. Gate Voltage
Figure 12.
Normalized R
DSON
vs. Junction
Temperature
1.5
1.10
V
GS
=
V
DS
I
D
= 1mA
I
D
= 250
m
A
1.2
0.9
0.6
0.3
0.0
1.05
1.00
0.95
0.90
−
80
−
40
0
40
80
120
160 200
−
80
−
40
0
40
80
120
160
200
T
J
, JUNCTION TEMPERATURE (
o
C)
T
J
, JUNCTION TEMPERATURE(
o
C)
Figure 13. Normalized Gate Threshold Voltage vs.
Temperature
Figure 14.
Normalized Drain to Source
Breakdown Voltage vs. Junction Temperature
100000
10
I
D
= 80A
V
DD
=16V
8
C
iss
V
DD
= 20V
10000
V
DD
= 24V
6
C
oss
4
2
0
1000
C
rss
f = 1MHz
V
GS
= 0V
100
0.1
1
10
100
0
20 40 60 80
100 120 140 160 180 200 220
Q
g
,
GATE CHARGE(nC)
V
DS
, DRAIN TO SOURCE VOLTAGE
(V)
Figure 15.
Capacitance vs. Drain to Source
Voltage
Figure 16.
Gate Charge
vs. Gate to Source
Voltage
PowerTrench is a registered trademark of Semiconductor Components Industries, LLC.
5
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
H
−
PSOF8L 11.68×9.80
CASE 100CU
ISSUE C
DATE 22 MAY 2023
GENERIC
MARKING DIAGRAM*
AYWWZZ
XXXXXXXX
XXXXXXXX
A
Y
= Assembly Location
=
Y
e
ar
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb
−
Free indicator, “G” or microdot “
G
”, may
or may not be present. Some products may
not follow the Generic Marking.
WW =
Work Week
ZZ
XXXX = Specific Device Code
= Assembly Lot Code
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions
are uncontrolled
except when stamped
“CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON13813G
H
−
PSOF8L 11.68×9.80
PAGE 1 OF 1
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©
Semiconductor Components Industries, LLC, 2019
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,
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