onsemi-NVD5C446NT4G
| Part # | onsemi-NVD5C446NT4G |
Download  | onsemi-NVD5C446NT4G |
NVD5C446N
MOSFET
– Powe
r
,
S
ingle
N-Channel
40
V
,
3
.5 m
W
, 101 A
Features
•
Low R
to Minimize Conduction Losses
DS(on)
•
Low Q
and Capacitance to Minimize Driver Losses
G
•
AEC
−
Q101 Qualified and P
P
A
P Capable
•
These Devices are Pb
−
Free, Halogen Free/BFR Free and are RoHS
Compliant
V
R
I
D
(BR)DSS
DS(on)
40 V
3.5 m
W
@ 10 V
101 A
MAXIMUM RATINGS
(T =
25
°
C unless otherwise noted)
J
D
Parameter
Drain
−
to
−
Source Voltage
Symbol
Value
40
Unit
V
V
DSS
Gate
−
to
−
Source Voltage
V
“
20
101
71
V
GS
G
Continuous Drain Cur-
T
= 25
°
C
= 100
°
C
= 25
°
C
I
A
C
D
rent R
(Notes 1 & 3)
q
JC
T
C
Steady
State
S
Power Dissipation R
(Note 1)
T
C
P
101
33
W
A
q
D
JC
JA
N
−
CHANNEL MOSFET
T
C
= 100
°
C
Continuous Drain
Current R
T =
25
°
C
A
I
22
D
4
q
JA
T =
100
°
C
A
18
(Notes 1, 2 & 3)
Steady
State
2
1
Power Dissipation R
(Notes 1 & 2)
T =
25
°
C
A
P
3.1
2.2
590
W
q
D
3
T =
100
°
C
A
DPAK
CASE 369C
STYLE 2
Pulsed Drain Current
T =
25
°
C, t
= 10
m
s
I
DM
A
A
p
Operating Junction and Storage
T
e
mperature
T , T
−
55 to
175
°
C
J
stg
MARKING DIAGRAM
& PIN ASSIGNMENT
Source Current (Body Diode)
I
73
A
S
Single Pulse Drain
−
to
−
Source Avalanche
E
AS
214
mJ
4
Energy (T
= 25
°
C, I
= 11 A)
J
L(pk)
Drain
Lead
T
e
mperature for Soldering Purposes
(1/8
″
from case for 10 s)
T
L
260
°
C
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
2
THERMAL RESISTANCE MAXIMUM RATINGS
Drain
1
3
Gate Source
Parameter
Symbol
Value
2.28
48
Unit
A
Y
WW
= Assembly Location
=
Y
e
ar
= Work Week
Junction
−
to
−
Case (Drain) (Note 1)
Junction
−
to
−
Ambient
−
Steady State (Note 2)
R
°
C/W
q
JC
R
q
JA
5C446N= Device Code
1. The
entire application environment impacts the thermal resistance values shown,
they are not constants and are only valid for the particular conditions noted.
G
= Pb
−
Free Package
2
2. Surface
−
mounted on FR4 board using a 650 mm
, 2 oz. Cu pad.
3. Maximum
current for pulses as long as 1 second is higher but is dependent
on pulse duration and duty cycle.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
©
Semiconductor Components Industries, LLC, 2015
1
Publication Order Number:
June, 2019
−
Rev. 0
NVD5C446N/D
NVD5C446N
ELECTRICAL CHARACTERISTICS
(T =
25
°
C unless otherwise noted)
J
Parameter
OFF CHARACTERISTICS
Symbol
Test Condition
Min
Typ
Max
Unit
Drain
−
to
−
Source Breakdown Voltage
V
V
GS
= 0
V
, I
=
2
50
m
A
40
V
(BR)DSS
D
Drain
−
to
−
Source Breakdown Voltage
T
e
mperature Coefficient
V
/T
J
19
mV/
°
C
(BR)DSS
Zero Gate Voltage Drain Current
I
T =
25
°
C
10
m
A
DSS
J
V
= 0
V
,
GS
DS
V
= 40 V
T =
125
°
C
J
250
100
Gate
−
to
−
Source Leakage Current
ON CHARACTERISTICS
(Note 4)
Gate Threshold Voltage
I
V
= 0
V
, V
=
2
0 V
nA
GSS
DS
GS
V
V
= V
, I
= 250
m
A
2.0
4.0
3.5
V
mV/
°
C
m
W
S
GS(TH)
GS
DS
D
Negative Threshold
T
e
mperature Coefficient
Drain
−
to
−
Source On Resistance
Forward Transconductance
V
/T
J
7.5
2.9
100
GS(TH)
R
V
= 10
V
, I
=
5
0 A
DS(on)
GS D
g
V
= 3
V
, I
=
5
0 A
FS
DS D
CHARGES, CAPACITANCES AND GATE RESISTANCES
Input Capacitance
C
2300
1200
46
pF
nC
iss
V
= 0
V
, f =
1
.0 MHz,
DS
GS
Output Capacitance
C
oss
V
= 25 V
Reverse Transfer Capacitance
T
o
tal Gate Charge
C
rss
Q
34.3
5.0
G(TOT)
Threshold Gate Charge
Gate
−
to
−
Source Charge
Gate
−
to
−
Drain Charge
Plateau Voltage
Q
G(TH)
V
GS
= 10
V
, V
=
3
2
V
,
DS
Q
12.2
5.8
GS
GD
GP
I
D
= 50 A
Q
V
7.2
V
SWITCHING CHARACTERISTICS
(Note 5)
Turn
−
On Delay Time
t
20
62
43
17
ns
d(on)
Rise Time
t
r
V
= 10
V
, V
=
3
2
V
,
GS
D
DS
I
= 50 A, R
= 2.5
W
G
Turn
−
Off Delay Time
t
d(off)
Fall Time
t
f
DRAIN
−
SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
V
T =
25
°
C
0.9
0.8
46
23
23
40
1.2
V
SD
J
V
S
= 0
V
,
GS
I
= 50 A
T =
125
°
C
J
Reverse Recovery Time
Charge Time
t
ns
RR
ta
V
GS
= 0
V
,
d
Is/dt = 100 A/
m
s,
I
S
= 50 A
Discharge Time
tb
Reverse Recovery Charge
Q
nC
RR
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. Pulse
T
e
st: Pulse Width
≤
300
m
s, Duty Cycle
≤
2%.
5. Switching
characteristics are independent of operating junction temperatures.
2
NVD5C446N
TYPICAL CHARACTERISTICS
200
160
120
80
200
V
GS
= 8 V to 10 V
V
DS
= 3 V
7.0 V
160
120
80
6.0 V
5.2 V
5.0 V
4.8 V
4.6 V
4.4 V
T =
25
°
C
J
40
0
40
0
T =
125
°
C
J
T =
−
55
°
C
J
0
0.5
1.0
1.5
2.0
2.5
3.0
2
3
4
5
6
V
DS
, DRAIN
−
TO
−
SOURCE VOLTAGE (V)
V
GS
, GATE
−
TO
−
SOURCE VOLTAGE (V)
Figure 1. On
−
Region Characteristics
Figure 2. Transfer Characteristics
4.0
3.5
3.0
2.5
2.0
1.5
1.0
10
9
T =
25
°
C
J
T =
25
°
C
D
J
I
= 50 A
8
V
GS
= 10 V
7
6
5
4
3
2
0.5
0
1
0
3
4
5
6
7
8
9
10
10 20
30
40
50
60
70
80
90 100
V
GS
, GATE
−
TO
−
SOURCE VOLTAGE (V)
I ,
DRAIN CURRENT (A)
D
Figure 3. On
−
Resistance vs. Gate
−
to
−
Source
Figure 4. On
−
Resistance vs. Drain Current and
Voltage
Gate Voltage
100000
10000
1000
100
2.0
1.8
1.6
1.4
1.2
1.0
T =
150
°
C
J
V
= 10 V
= 50 A
GS
I
D
T =
125
°
C
J
T =
85
°
C
J
10
T =
25
°
C
J
1
0.8
0.6
0.1
0.01
5
10
15
20
25
30
35
40
−
50
−
25
0
25
50
75 100
125 150
175
T , JUNCTION TEMPERATURE (
°
C)
J
V
, DRAIN
−
TO
−
SOURCE VOLTAGE (V)
DS
Figure 5. On
−
Resistance Variation with
Figure 6. Drain
−
to
−
Source Leakage Current
Temperature
vs. Voltage
3
NVD5C446N
TYPICAL CHARACTERISTICS
10
9
10000
1000
C
ISS
Q
Q
GD
GS
8
7
6
5
4
3
2
C
OSS
100
10
V
DS
= 32 V
C
V
= 0 V
RSS
GS
T =
25
°
C
J
T =
25
°
C
J
1
0
I
D
= 50 A
f = 1 MHz
0
5
10
15
20
25
30
35
40
0
5
10
15
20
25
30
35
V
DS
, DRAIN
−
TO
−
SOURCE VOLTAGE (V)
Q ,
TOTAL GATE CHARGE (nC)
G
Figure 7. Capacitance Variation
Figure 8. Gate
−
to
−
Source vs. Total Charge
1000
100
100
V
V
= 10 V
= 32 V
= 50 A
V
GS
= 0 V
GS
DS
I
D
10
t
t
r
d(off)
d(on)
t
T =
125
°
C
T =
25
°
C
T =
−
55
°
C
J
t
f
J
J
1
10
1
10
R ,
GATE RESISTANCE (
W
)
100
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
V
, SOURCE
−
TO
−
DRAIN VOLTAGE (V)
G
SD
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance
Figure 10. Diode Forward Voltage vs. Current
100
1000
T
V
= 25
°
C
C
≤
10 V
GS
Single Pulse
100
10
T (initial)
= 25
°
C
J
T (initial)
= 100
°
C
J
10
10
m
s
0.5 ms
1 ms
1
R
Limit
DS(on)
Thermal Limit
Package Limit
10 ms
1
0.1
0.00001
0.0001
0.001
0.01
0.1
1
10
100
1000
V
DS
, DRAIN
−
TO
−
SOURCE VOLTAGE (V)
TIME IN AVALANCHE (s)
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
Figure 12. I
PEAK
vs. Time in Avalanche
4
NVD5C446N
TYPICAL CHARACTERISTICS
10
1
50% Duty Cycle
20%
10%
5%
2%
0.1
1%
Single Pulse
0.01
0.001
0.000001 0.00001
0.0001
0.001
0.01
0.1
1
10
100
1000
10000
PULSE TIME (sec)
Figure 13. Thermal Characteristics
ORDERING INFORMATION
Order Number
†
Package
Shipping
NVD5C446NT4G
DPAK
(Pb
−
Free)
2500 /
T
a
pe & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our
T
a
pe and Reel Packaging
Specifications Brochure, BRD8011/D.
5
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
DPAK (SINGLE GAUGE)
CASE 369C
4
ISSUE F
2
1
DATE 21 JUL 2015
3
SCALE 1:1
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: INCHES.
3. THERMAL PAD CONTOUR OPTIONAL WITHIN DI-
MENSIONS b3, L3 and Z.
A
D
E
C
A
b3
B
4. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH, PROTRUSIONS, OR BURRS. MOLD
FLASH, PROTRUSIONS, OR GATE BURRS SHALL
NOT EXCEED 0.006 INCHES PER SIDE.
5. DIMENSIONS D AND E ARE DETERMINED AT THE
OUTERMOST EXTREMES OF THE PLASTIC BOD
Y
.
6. DATUMS A AND B ARE DETERMINED AT DATUM
PLANE H.
c2
4
2
L3
Z
DETAIL A
H
1
3
7. OPTIONAL MOLD FEATURE.
INCHES
DIM MIN
MAX
0.086 0.094
A1
0.000 0.005
0.025 0.035
b2
0.028 0.045
b3
0.180 0.215
MILLIMETERS
L4
NOTE 7
MIN
2.18
0.00
0.63
0.72
4.57
0.46
0.46
5.97
6.35
MAX
2.38
0.13
0.89
1.14
5.46
0.61
0.61
6.22
6.73
c
b2
e
BOTTOM VIEW
A
SIDE VIEW
b
b
M
0.005 (0.13)
C
TOP VIEW
c
0.018 0.024
c2
0.018 0.024
Z
Z
D
E
e
0.235 0.245
0.250 0.265
0.090 BSC
H
2.29 BSC
9.40 10.41
1.40 1.78
2.90 REF
0.51 BSC
0.89 1.27
GAUGE
PLANE
SEATING
PLANE
H
L
L1
L2
0.370 0.410
0.055 0.070
0.114 REF
L2
C
0.020 BSC
L3
0.035 0.050
L
BOTTOM VIEW
A1
L4
Z
−−−
0.040
0.155
−−−
−−−
3.93
1.01
−−−
L1
ALTERNATE
CONSTRUCTIONS
DETAIL A
ROTATED 9
0
5
CW
GENERIC
MARKING DIAGRAM*
STYLE 1:
PIN 1.
BASE
STYLE 2:
PIN 1.
GATE
2. DRAIN
STYLE 3:
STYLE 4:
STYLE 5:
PIN 1.
GATE
PIN 1.
ANODE
2. CATHODE
3. ANODE
PIN 1.
CATHODE
2. ANODE
2. COLLECTOR
2. ANODE
3. CATHODE
4. ANODE
3. EMITTER
3. SOURCE
4. DRAIN
3. GATE
4. ANODE
XXXXXXG
ALYWW
AYWW
XXX
4. COLLECTOR
4. CATHODE
STYLE 6:
PIN 1.
MT1
2. MT2
STYLE 7:
STYLE 8:
STYLE 9:
PIN 1.
ANODE
2. CATHODE
STYLE 10:
PIN 1.
CATHODE
2. ANODE
XXXXXG
PIN 1.
GATE
PIN 1.
N/C
2. COLLECTOR
2. CATHODE
3. GATE
4. MT2
3. EMITTER
3. ANODE
3. RESISTOR
ADJUST
4. CATHODE
3. CATHODE
4. ANODE
4. COLLECTOR
4. CATHODE
IC
Discrete
SOLDERING FOOTPRINT*
XXXXXX =
Device Code
A
L
Y
WW
G
= Assembly Location
= Wafer Lot
=
Y
e
ar
= Work Week
= Pb
−
Free Package
6.20
0.244
3.00
0.118
2.58
0.102
*This information is generic. Please refer
to device data sheet for actual part
marking.
5.80
0.228
1.60
0.063
6.17
0.243
mm
inches
ǒ
Ǔ
SCALE 3:1
*For additional information on our Pb
−
Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting
T
e
chniques Reference Manual, SOLDERRM/D.
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions
are uncontrolled
except when stamped
“CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON10527D
DPAK (SINGLE GAUGE)
PAGE 1 OF 1
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T
:
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−
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o
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