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December 2015  
FDMS86300  
N-Channel PowerTrench

®

MOSFET  
80 V, 122 A, 3.9 m
Ω  
Features  
General Description  
„
Max r

DS(on)

= 3.9 m
Ω
at V

GS

= 10
V
,
I

D

= 19 A  
This N-Channel MOSFET
 
has been designed specifically to  
improve the overall efficiency and to minimize switch node  
ringing of DC/DC converters using either synchronous or  
conventional switching PWM controllers.It has been optimized  
for low gate charge, low r

DS(on)

, fast switching speed and body  
diode reverse recovery performance.  
„
Max r

DS(on)

= 5.5 m
Ω
at V

GS

= 8
V
,
I

D

= 15.5 A  
„
Advanced Package and Silicon combination for low r

DS(on)  

and high efficiency  
„
Next generation enhanced body diode technology,  
engineered for soft recovery  
Applications  
„
MSL1 robust package design  
„
100% UIL tested  
„
OringFET / Load Switching  
„
DC-DC Conversion  
„
RoHS Compliant  
Bottom  
Top  
Pin 1  
S
G
S
S
S
D
D
D
D
5
6
7
8
4
3
S
S
G
2
1
D
D
D
D
Power 56  
MOSFET Maximum Ratings
T

A

= 25 °C unless otherwise noted  
Symbol  
V

DS  

V

GS  

Parameter  
Ratings  
80  
Units  
Drain to Source Voltage  
Gate to Source Voltage  
Drain Current
 
-Continuous  
-Continuous  
V
V
±20  
T

C

= 25 °C  
T

C

= 100 °C  
T

A

= 25 °C  
122  
78  
I

D  

A
-Continuous  
(Note 1a)  
(Note 4)  
(Note 3)  
19  
-Pulsed  
556  
E

AS  

Single Pulse Avalanche Energy  
Power Dissipation  
Power Dissipation  
252  
mJ  
W
T

C

= 25 °C  
T

A

= 25 °C  
104  
P

D  

(Note 1a)  
2.5  
T

J

, T

STG  

Operating and Storage Junction
T
e
mperature Range  
-55 to +150  
°C  
Thermal Characteristics  
R

θ
JC  

R

θ
JA  

Thermal Resistance, Junction to Case  
Thermal Resistance, Junction to Ambient  
1.2  
50  
°C/W  
(Note 1a)  
Package Marking and Ordering Information  
Device Marking  
Device  
Package  
Reel Size  
13 ’’  
Tape Width  
12 mm  
Quantity  
FDMS86300  
FDMS86300  
Power 56  
3000 units  
1
©2012 Fairchild Semiconductor Corporation  
FDMS86300 Rev.1.4  

Electrical Characteristics
T

J

= 25 °C unless otherwise noted  
Symbol  
Parameter  
Test Conditions  
Min  
Typ  
Max  
Units  
Off Characteristics  
BV

DSS  

Drain to Source Breakdown Voltage  
I

D

= 250
μ
A, V

GS

= 0 V  
80  
V
Δ
BV

DSS  

Δ
T

J  

Breakdown Voltage
T
e
mperature  
Coefficient  
I

D

= 250
μ
A, referenced to 25 °C  
39  
mV/°C  
I

DSS  

I

GSS  

Zero Gate Voltage Drain Current  
Gate to Source Leakage Current  
V

DS

= 64 V, V

GS

= 0 V  
V

GS

= ±20 V, V

DS

= 0 V  
1
μ
A  
±100  
nA  
On Characteristics  
V

GS(th)  

Gate to Source Threshold Voltage  
V

GS

= V

DS

, I

D

= 250
μ
A  
2.5  
3.4  
-11  
4.5  
V
Δ
V

GS(th)  

Δ
T

J  

Gate to Source Threshold Voltage  
T
e
mperature Coefficient  
I

D

= 250
μ
A, referenced to 25 °C  
mV/°C  
V

GS

= 10 V, I

D

= 19 A  
3.2  
3.8  
5.0  
60  
3.9  
5.5  
5.8  
r

DS(on)  

g

FS  

Static Drain to Source On Resistance  
Forward Transconductance  
V

GS

= 8 V, I

D

= 15.5 A  
m
Ω  
V

GS

= 10 V, I

D

= 19 A, T

J

= 125 °C  
V

DS

= 10 V, I

D

= 19 A  
S
Dynamic Characteristics  
C

iss  

C

oss  

C

rss  

R

g  

Input Capacitance  
5325  
957  
26  
7082  
1272  
63  
pF  
pF  
pF  
Ω
V

DS

= 40 V, V

GS

= 0 V,  
f = 1 MHz  
Output Capacitance  
Reverse Transfer Capacitance  
Gate Resistance  
1.2  
Switching Characteristics  
t

d(on)  

t

r  

t

d(off)  

t

f  

Turn-On Delay Time  
Rise Time  
31  
26  
50  
43  
58  
18  
86  
71  
ns  
ns  
V

DD

= 40 V, I

D

= 19 A,  
V

GS

= 10 V, R

GEN

= 6
Ω  
Turn-Off Delay Time  
Fall Time  
36  
ns  
9
ns  
Q

g  

T
o
tal Gate Charge  
T
o
tal Gate Charge  
Gate to Source Charge  
Gate to Drain “Miller” Charge  
V

GS

= 0 V to 10 V  
V

GS

= 0 V to 8 V  
72  
nC  
nC  
nC  
nC  
Q

g  

59  
V

DD

= 40 V,  

D

= 19 A  
I
Q

gs  

Q

gd  

28.2  
14.9  
Drain-Source Diode Characteristics  
V

GS

= 0 V, I

S

= 2.1 A  
(Note 2)  
(Note 2)  
0.71  
0.81  
57  
1.2  
1.3  
90  
V

SD  

Source to Drain Diode
 
Forward Voltage  
V
V

GS

= 0 V, I

S

= 19 A  
t

rr  

Reverse Recovery Time  
Reverse Recovery Charge  
Reverse Recovery Time  
Reverse Recovery Charge  
ns  
nC  
ns  
I

F

= 19 A, di/dt = 100 A/
μ
s  
I

F

= 19 A, di/dt = 300 A/
μ
s  
Q

rr  

t

rr  

50  
80  
48  
77  
Q

rr  

Notes
:  
103  
165  
nC  
2
1. R  
is determined with the device mounted on a 1 in
 
pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. R  
is guaranteed by design while R
 
is determined by  
θ
CA  
θ
JA  
θ
JC  
the user’s board design.  
b)  
a)  
125 °C/W when mounted on a  
minimum pad of 2 oz copper.  
50 °C/W when mounted
 
on a  
1 in
 
pad of
 
2 oz
 
copper  
2
2. Pulse Test: Pulse Width < 300
μ
s, Duty cycle < 2.0%.  
3. E
 
of 252 mJ is based on starting T
 
= 25
°
C, L = 0.3 mH, I
 
= 41 A, V
 
= 72 V, V
 
= 10 V.  
AS  
J
AS  
DD  
GS  
4. Pulse Id limited by junction temperature, td
≤
100
μ
s, please refer to SOA curve for more details.  
©2012 Fairchild Semiconductor Corporation  
FDMS86300 Rev.1.4  
2

Typical Characteristics
T

J

= 25 °C unless otherwise noted  
250  
5
4
3
2
1
0
V
= 8 V  
GS  
V
= 7 V  
GS  
V

GS

= 5.5 V  
V

GS

= 6 V  
200  
150  
100  
50  
V
= 6.5 V  
GS  
V
= 10 V  
GS  
V

GS

= 6.5 V  
V
= 6 V  
GS  
V

GS

= 7 V  
V

GS

= 8 V  
V
= 5.5 V  
GS  
V

GS

= 10 V  
PULSE DURATION = 80
μ
s  
PULSE DURATION = 80
μ
s  
DUTY CYCLE = 0.5% MAX  
DUTY CYCLE = 0.5% MAX  
0
0
1
2
3
4
5
0
50  
100  
150  
200  
250  
I

D

,
DRAIN CURRENT (A)  
V

DS

, DRAIN TO SOURCE VOLTAGE (V)  
Figure 1.
 
On-Region Characteristics  
Figur
e
2
. N
 
o r m a l i z e d O n – R e s i s ta n c e  
vs Drain Current and Gate Voltage  
12  
1.8  
PULSE DURATION = 80
μ
s  
DUTY CYCLE = 0.5% MAX  
I

D

= 19 A  
I

D

= 19 A  
1.6  
1.4  
1.2  
1.0  
0.8  
0.6  
V

GS

= 10 V  
9
6
3
0
T

J

= 125

o  

C
T

J

= 25

o  

C
5
6
7
8
9
10  
-75 -50 -25  
0
25 50 75
 
100 125 150  
T

J

,
JUNCTION TEMPERATURE
(

o

C
)  
V

GS

,
GATE TO SOURCE VOLTAGE (V)  
F i gu re 3 .
 
N orma li zed
 
On – Res is ta nc e  
vs Junction Temperature  
Figur
e
4
. On-Resistance
 
vs Gate to  
Source Voltage  
300  
250  
PULSE DURATION = 80
μ
s  
DUTY CYCLE = 0.5% MAX  
V

GS

= 0 V  
100  
200  
150  
100  
50  
10  
T

J

= 150

o  

C
V

DS

= 5 V  
1
T

J

= 150

o  

C
T

J

= 25

o

C  
0.1  
T

J

= 25

o  

C
T

J

= -55

o  

C
0.01  
T

J

= -55

o  

C
0
0.001  
2
3
4
5
6
7
8
0.0  
0.2  
0.4  
0.6  
0.8  
1.0  
1.2  
V

GS

, GATE TO SOURCE VOLTAGE (V)  
V

SD

, BODY DIODE FORWARD VOLTAGE (V)  
Figure 5.
 
Transfer Characteristics  
Figur
e
6
. Source
 
to Drain Diode  
Forward Voltage vs Source Current  
©2012 Fairchild Semiconductor Corporation  
FDMS86300 Rev.1.4  
3

Typical Characteristics
T

J

= 25 °C unless otherwise noted  
10  
10000  
1000  
100  
10  
I

D

= 19 A  
C

iss  

V

DD

= 40 V  
8
V

DD

= 30 V  
V

DD

= 50 V  
C

oss  

6
4
2
0
C

rss  

f = 1 MHz  
= 0 V  
V
GS  
1
0.1  
0
10  
20  
30  
40  
50  
60  
70  
80  
1
10  
80  
V

DS

, DRAIN TO SOURCE VOLTAGE (V)  
Q ,
 
GATE CHARGE (nC)  
g
Figure 7.
 
Gate Charge Characteristics  
Figur
e
8
. C
 
a p a c i t a n c e v s D r a i n  
to Source Voltage  
140  
105  
70  
100  
V

GS

= 10 V  
T

J

= 25

o

C  
T

J

= 100

o

C  
10  
V

GS

= 6 V  
T

J

= 125

o  

C
35  
R

θ
JC

= 1.2

o

C/W  
0
25  
1
0.01  
50  
75  
100  
125  
150  
0.1  
1
10  
100  
500  
T

C

,
CASE TEMPERATURE
(

o

C
)  
t

AV

, TIME IN AVALANCHE (ms)  
Figur
e
9. U
 
n c l a m p e d I n d u c t i v e  
Switching Capability  
Figur
e
1
0. Maximum Continuous Drain  
Current vs Case Temperature  
1000  
100  
10  
20000  
SINGLE PULSE  
R

θ
JC

= 1.2

o

C/W  
10000  

C

= 25

o  

C
10
μ
s  
T
THIS AREA IS  
LIMITED BY r

DS(on)  

1000  
100
μ
s  
SINGLE PULSE  
T

J

= MAX RATED  
1
1 ms  
R

θ
JC

= 1.2

o

C/W  

C

= 25

o

C  
10 ms  
100  
50  
CURVE BENT TO  
MEASURED DATA  
T
100 ms/DC  
0.1  
0.1  
10

-5  

10

-4  

10

-3  

t, PULSE WIDTH (sec)  
10

-2  

10

-1  

1
1
10  
100 500  
V

DS

, DRAIN to SOURCE VOLTAGE (V)  
Figure 11.
 
Forward Bias Safe  
Operating Area  
Figure 12. Single Pulse Maximum  
Power Dissipation  
©2012 Fairchild Semiconductor Corporation  
FDMS86300 Rev.1.4  
4

Typical Characteristics
T

J

= 25 °C unless otherwise noted  
2
DUTY CYCLE-DESCENDING ORDER  
1
D = 0.5  
0.2  
0.1  
P
DM  
0.05  
0.02  
0.01  
0.1  
t
1
t
2
NOTES:  
0.01  
Z
(t) = r(t) x R  
= 1.2 °C/W  
θ
JC  
θ
JC  
R
θ
JC  
SINGLE PULSE  
Peak T
 
= P  
x Z
 
(t) + T  
θ
JC
C  
J
DM  
Duty Cycle, D = t
 
/ t  
1
2
0.001  
10

-5  

10

-4  

10

-3  

t, RECTANGULAR PULSE DURATION (sec)  
10

-2  

10

-1  

1
Figure 13.
 
Junction-to-Case Transient Thermal Response Curve  
©2012 Fairchild Semiconductor Corporation  
FDMS86300 Rev.1.4  
5

PQFN8 5X6, 1.27P  
CASE 483AE  
ISSUE A  
5.10  
3.91  
5.10  
PKG  
A
SEE  
DETAIL B  
1.27  
6.61  
C
L
B
8
7
6
5
8
5
0.77  
4.52  
3.75  
5.85  
5.65  
C
PKG  
6.15  
L
KEEP OUT  
AREA  
1.27  
1
4
1
2
3
4
TOP VIEW  
0.61  
1.27  
3.81  
LAND PATTERN  
RECOMMENDATION  
OPTIONAL DRAFT  
ANGLE MAY APPEAR  
ON FOUR SIDES  
SEE  
DETAIL C  
5.00  
4.80  
OF THE PACKAGE  
0.35  
0.15  
ꢀƒꢁꢂꢃƒ  
0.10 C  
0.30  
0.05  
0.05  
0.00  
SIDE VIEW  
ꢀƒꢁꢂꢃƒ  
8X  
0.08 C  
C
0.35  
0.15  
5.20  
4.80  
1.10  
0.90  
SEATING  
PLANE  
DETAIL C  
DETAIL B  
SCALE: 2:1  
3.81  
SCALE: 2:1  
1.27  
0.51  
(8X)  
0.31  
NOTES: UNLESS OTHERWISE SPECIFIED  
(0.34)  
A. PACKAGE
 
STANDARD REFERENCE:
 
JEDEC MO-240,  
ISSUE A, VAR. AA,.  
0.10  
C A B  
1
2
3
4
B. DIMENSIONS
 
DO NOT INCLUDE BURRS OR MOLD FLASH.  
MOLD FLASH OR BURRS DOES NOT EXCEED 0.10MM.  
C. ALL
 
DIMENSIONS ARE IN MILLIMETERS.  
0.76  
0.51  
(0.52)  
D. DIMENSIONING
 
AND TOLERANCING PER
 
ASME Y14.5M-2009.  
E. IT
 
IS RECOMMENDED TO HAVE NO TRACES OR  
VIAS WITHIN THE KEEP
 
OUT AREA.  
6.25  
5.90  
+0.30  
3.48  
-0.10  
(0.50)  
(0.30)  
(2X)  
8
7
6
5
ꢀꢄꢅꢅ“ꢀꢄꢂꢀ  
+0.10  
-0.15  
0.20  
(8X)  
3.96  
3.61  
BOTTOM VIEW  

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arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.  
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,  
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or  
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer  
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not  
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification  
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized  
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and  
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such  
claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This  
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