onsemi-NVJD4401NT1G
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Download  | onsemi-NVJD4401NT1G |
NTJD4401N, NVJD4401N
MOSFET
– Dual, N-Channel,
Small Signal, ESD
Protection, SC-88
20 V
Features
•
Small Footprint (2 x 2 mm)
•
Low Gate Charge N
−
Channel Device
•
ESD Protected Gate
V
R
Typ
I Max
D
(BR)DSS
DS(on)
0.29
W
@ 4.5 V
0.36
W
@ 2.5 V
20 V
0.63 A
•
Same Package as SC
−
70 (6 Leads)
•
AEC
−
Q101 Qualified and PPAP Capable
−
NVJD4401N
•
These Devices are Pb
−
Free and are RoHS Compliant
Applications
SC
−
88 (SOT
−
363)
•
Load Power Switching
•
Li
−
Ion Battery Supplied Devices
•
Cell Phones, Media Players, Digital Cameras, PDAs
•
DC
−
DC Conversion
S
1
G
1
D
2
1
6
5
4
D
1
2
3
G
2
MAXIMUM RATINGS
(T =
25
°
C unless otherwise stated)
J
Parameter
Drain
−
to
−
Source Voltage
Symbol
Value
20
Unit
V
V
DSS
S
2
Gate
−
to
−
Source Voltage
V
GS
12
V
Continuous Drain
Current
Steady T
= 25
°
C
I
0.63
0.46
0.27
0.14
0.91
0.65
0.55
0.29
1.2
A
A
D
T
o
p View
State
T =
85
°
C
A
(Based on R
)
q
JA
Power Dissipation
(Based on R
Steady T
= 25
°
C
P
W
A
A
D
)
State
q
JA
MARKING DIAGRAM &
PIN ASSIGNMENT
D1 G2 S2
T =
85
°
C
A
Continuous Drain
Current
Steady T
= 25
°
C
I
D
A
State
T =
85
°
C
A
(Based on R
)
q
JL
6
1
Power Dissipation
(Based on R
Steady T
= 25
°
C
W
A
TD M
G
)
State
SC
−
88/SOT
−
363
CASE 419B
STYLE 28
q
JL
P
D
T =
85
°
C
A
G
Pulsed Drain Current
t
≤
10
m
s
I
A
DM
1
S1 G1 D2
Operating Junction and Storage
T
e
mperature
T , T
−
55 to
150
°
C
J
STG
TD
M
G
= Device Code
= Date Code
= Pb
−
Free Package
Continuous Source Current (Body Diode)
I
0.63
260
A
S
Lead
T
e
mperature for Soldering Purposes
(1/8” from case for 10 s)
°
C
T
L
(Note: Microdot may be in either location)
THERMAL RESISTANCE RATINGS
(Note 1)
Parameter
Symbol Typ
Max Units
458
°
C/W
252
ORDERING INFORMATION
See detailed ordering and shipping information in the package
Junction
−
to
−
Ambient – Steady State
Junction
−
to
−
Lead (Drain) – Steady State
R
400
194
q
JA
R
q
JL
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
1. Surface
mounted on FR4 board using 1 oz Cu area = 0.9523 in sq.
©
Semiconductor Components Industries, LLC, 2015
1
Publication Order Number:
May, 2019
−
Rev. 7
NTJD4401N/D
NTJD4401N, NVJD4401N
ELECTRICAL CHARACTERISTICS
(T =
25
°
C unless otherwise stated)
J
Parameter
Symbol
Test Condition
Min
Typ
Max
Unit
OFF CHARACTERISTICS
Drain
−
to
−
Source Breakdown Voltage
V
V
GS
= 0
V
, I
= 250
m
A
20
27
22
V
(BR)DSS
D
Drain
−
to
−
Source Breakdown Voltage
T
e
mperature Coefficient
V
/T
mV/
°
C
(BR)DSS
J
Zero Gate Voltage Drain Current
Gate
−
to
−
Source Leakage Current
Gate Threshold Voltage
I
V
= 0
V
, V
= 16 V
1.0
10
m
A
m
A
DSS
GS
DS
I
V
DS
= 0
V
, V
= 12
V
GSS
GS
V
V
GS
= V
, I
= 250
m
A
0.6
0.92
1.5
V
GS(TH)
DS
D
Gate Threshold
T
e
mperature
Coefficient
V
/T
−
2.1
mV/
°
C
GS(TH)
J
Drain
−
to
−
Source On Resistance
R
V
V
V
= 4.5 V, I
= 0.63 A
0.29
0.36
2.0
0.375
0.445
W
S
DS(on)
GS
GS
DS
D
= 2.5 V, I
= 0.40 A
D
Forward Transconductance
CHARGES AND CAPACITANCES
Input Capacitance
g
FS
= 4.0 V, I
= 0.63 A
D
C
33
13
46
22
pF
ISS
V
GS
= 0
V
, f =
1
.0 MHz,
Output Capacitance
C
OSS
RSS
V
DS
= 20 V
Reverse Transfer Capacitance
T
o
tal Gate Charge
C
2.8
1.3
0.1
0.2
0.4
5.0
3.0
Q
nC
G(TOT)
Threshold Gate Charge
Gate
−
to
−
Source Charge
Gate
−
to
−
Drain Charge
Q
G(TH)
V
GS
= 4.5
V
, V
= 10 V,
DS
I
D
= 0.63 A
Q
GS
GD
Q
Turn
−
On Delay Time
Rise Time
td
0.083
0.227
0.786
0.506
m
s
(ON)
tr
V
= 4.5 V, V
= 10 V,
DD
GS
D
I
= 0.5 A, R
= 20
W
G
Turn
−
Off Delay Time
Fall Time
td
(OFF)
tf
DRAIN
−
SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
V
SD
V
S
= 0
V
,
T =
25
°
C
0.76
0.63
1.1
V
GS
J
I =0.23
A
T =
125
°
C
J
Reverse Recovery Time
t
V
GS
= 0
V
, dI
/dt = 100 A/
m
s,
0.410
m
s
RR
S
I =
0.63 A
S
2. Pulse
T
e
st: pulse width
≤
300
m
s, duty cycle
≤
2%.
3. Switching
characteristics are independent of operating junction temperatures.
2
NTJD4401N, NVJD4401N
TYPICAL PERFORMANCE CURVES
(T =
25
°
C unless otherwise noted)
J
1.4
1.2
1
1.2
V
= 4.5 V to 2.2 V
GS
T =
25
°
C
J
V
DS
≥
10 V
V
GS
= 2 V
1
0.8
0.6
0.4
1.8 V
1.6 V
0.8
0.6
0.4
T =
125
°
C
J
1.4 V
1.2 V
0.2
0
25
°
C
0.2
0
T =
−
55
°
C
J
0
2
4
6
8
10
0
0.4
0.8
1.2
1.6
2
2.4
V
GS
, GATE
−
TO
−
SOURCE VOLTAGE (VOLTS)
V
DS
, DRAIN
−
TO
−
SOURCE VOLTAGE (VOLTS)
Figure 1. On
−
Region Characteristics
Figure 2. Transfer Characteristics
0.7
0.6
0.5
0.4
0.3
0.2
0.7
0.6
0.5
0.4
0.3
0.2
V
GS
= 4.5 V
V
GS
= 2.5 V
T =
125
°
C
J
T =
125
°
C
J
T =
25
°
C
J
T =
25
°
C
J
T =
−
55
°
C
J
T =
−
55
°
C
J
0.1
0
0.1
0
0
0.2
0.4
0.6
0.8
1
1.2
1.4
0
0.2
0.4
I DRAIN
CURRENT (AMPS)
D,
0.6
0.8
1
1.2
1.4
I
DRAIN CURRENT (AMPS)
D,
Figure 4. On
−
Resistance vs. Drain Current and
Figure 3. On
−
Resistance vs. Drain Current and
Temperature
Temperature
2
80
60
40
I
V
= 0.63 A
= 4.5 V
T =
25
°
C
D
J
1.8
1.6
1.4
1.2
1
GS
V
GS
= 0 V
and 2.5 V
C
iss
20
0
C
C
oss
0.8
0.6
rss
−
50
−
25
0
25
50
75
100
125 150
0
5
10
15
20
T , JUNCTION TEMPERATURE (
°
C)
J
DRAIN
−
TO
−
SOURCE VOLTAGE (VOLTS)
Figure 5. On
−
Resistance Variation with
Figure 6. Capacitance Variation
Temperature
3
NTJD4401N, NVJD4401N
TYPICAL PERFORMANCE CURVES
(T =
25
°
C unless otherwise noted)
J
0.7
5
4
Q
V
GS
= 0 V
G(TOT)
0.6
0.5
0.4
0.3
0.2
V
GS
3
2
Q
Q
GD
GS
1
0
T =
150
°
C
J
I
= 0.63 A
0.1
0
D
T =
25
°
C
T =
25
°
C
J
J
0
0.2
0.4
0.6
0.8
1
1.2
1.4
0
0.2
0.4
0.6
0.8
1
Q ,
TOTAL GATE CHARGE (nC)
g
V
SD
, SOURCE
−
TO
−
DRAIN VOLTAGE (VOLTS)
Figure 7. Gate
−
to
−
Source and
Drain
−
to
−
Source Voltage vs. Total Charge
Figure 8. Diode Forward Voltage vs. Current
1000
100
D = 0.5
0.2
0.1
0.05
0.02
0.01
10
1
SINGLE PULSE
0.000001 0.00001
0.0001
0.001
0.01
PULSE TIME t,(s)
0.1
1
10
100
1000
Figure 9. Thermal Response
ORDERING INFORMATION
Device
†
Package
Shipping
NTJD4401NT1G
SC
−
88
3000 /
T
a
pe & Reel
3000 /
T
a
pe & Reel
(Pb
−
Free)
NVJD4401NT1G
SC
−
88
(Pb
−
Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our
T
a
pe and Reel Packaging
Specifications Brochure, BRD8011/D.
4
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SC
−
88/SC70
−
6/SOT
−
363
CASE 419B
−
02
ISSUE Y
1
DATE 11 DEC 2012
SCALE 2:1
2X
aaa H
D
NOTES:
D
H
1. DIMENSIONING
AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING
DIMENSION: MILLIMETERS.
A
3. DIMENSIONS
D AND E1 DO NOT INCLUDE MOLD FLASH,
PROTRUSIONS, OR GATE BURRS. MOLD FLASH, PROTRU-
SIONS, OR GATE BURRS SHALL NOT EXCEED 0.20 PER END.
4. DIMENSIONS
D AND E1 AT THE OUTERMOST EXTREMES OF
THE PLASTIC BODY AND DATUM H.
5. DATUMS
A AND B ARE DETERMINED AT DATUM H.
6. DIMENSIONS
b AND c APPLY TO THE FLAT SECTION OF THE
LEAD BETWEEN 0.08 AND 0.15 FROM THE TI
P
.
7. DIMENSION
b DOES NOT INCLUDE DAMBAR PROTRUSION.
ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 TOTAL IN
EXCESS OF DIMENSION b AT MAXIMUM
MATERIAL CONDI-
TION. THE DAMBAR CANNOT BE LOCATED ON THE LOWER
RADIUS OF THE FOO
T
.
D
GAGE
PLANE
6
1
5
2
4
3
L
L2
E1
E
DETAIL A
aaa
C
2X
2X 3 TIPS
bbb H
D
e
MILLIMETERS
DIM MIN
NOM MAX
−−−
INCHES
MIN
−−−
NOM MAX
−−−
0.043
−−−
0.004
6X
b
B
TOP VIEW
A
−−−
−−−
1.10
A1
0.00
A2
0.70
0.10 0.000
M
ddd
C A-B D
0.90
0.20
0.15
2.00
2.10
1.25
0.65 BSC
0.36
1.00 0.027 0.035 0.039
0.25 0.006 0.008 0.010
0.22 0.003 0.006 0.009
2.20 0.070 0.078 0.086
2.20 0.078 0.082 0.086
1.35 0.045 0.049 0.053
0.026 BSC
b
C
D
E
0.15
0.08
1.80
2.00
A2
DETAIL A
A
E1
1.15
e
L
0.26
0.46 0.010 0.014 0.018
0.006 BSC
L2
0.15 BSC
0.15
aaa
bbb
ccc
ddd
0.006
0.012
0.004
0.004
0.30
0.10
0.10
6X
ccc C
A1
SEATING
PLANE
c
C
SIDE VIEW
END VIEW
GENERIC
MARKING DIAGRAM*
RECOMMENDED
SOLDERING FOOTPRINT*
6
6X
0.30
XXXM
G
6X
0.66
G
1
2.50
XXX =
Specific Device Code
M
= Date Code*
G
= Pb
−
Free Package
0.65
(Note: Microdot may be in either location)
PITCH
*Date Code orientation and/or position may
vary depending upon manufacturing location.
DIMENSIONS: MILLIMETERS
*For additional information on our Pb
−
Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting
T
e
chniques Reference Manual, SOLDERRM/D.
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb
−
Free indicator, “G” or microdot “
G
”, may
or may not be present. Some products may
not follow the Generic Marking.
STYLES ON PAGE 2
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions
are uncontrolled
except when stamped
“CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98ASB42985B
SC
−
88/SC70
−
6/SOT
−
363
PAGE 1 OF 2
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
©
Semiconductor Components Industries, LLC, 2019
SC
−
88/SC70
−
6/SOT
−
363
CASE 419B
−
02
ISSUE Y
DATE 11 DEC 2012
STYLE 1:
PIN 1.
EMITTER 2
2. BASE
2
STYLE 2:
CANCELLED
STYLE 3:
CANCELLED
STYLE 4:
STYLE 5:
STYLE 6:
PIN 1.
ANODE 2
2. N/C
PIN 1.
CATHODE
2. CATHODE
3. COLLECTOR
4. EMITTER
5. BASE
PIN 1.
ANODE
2. ANODE
3. COLLECTOR
1
4. EMITTER
1
5. BASE
1
3. COLLECTOR
3. CATHODE
1
4. ANODE
1
5. N/C
4. EMITTER
5. BASE
6. COLLECTOR
2
6. ANODE
6. CATHODE
6. CATHODE
2
STYLE 7:
STYLE 8:
CANCELLED
STYLE 9:
STYLE 10:
STYLE 11:
STYLE 12:
PIN 1.
SOURCE 2
2. DRAIN
2
3. GATE
1
PIN 1.
EMITTER 2
2. EMITTER
1
3. COLLECTOR
1
4. BASE
1
PIN 1.
SOURCE 2
2. SOURCE
1
3. GATE
1
PIN 1.
CATHODE 2
2. CATHODE
2
3. ANODE
1
PIN 1.
ANODE 2
2. ANODE
2
3. CATHODE
1
4. ANODE
1
5. ANODE
1
6. CATHODE
2
4. SOURCE
1
5. DRAIN
1
6. GATE
2
4. DRAIN
1
5. DRAIN
2
6. GATE
2
4. CATHODE
1
5. CATHODE
1
6. ANODE
2
5. BASE
2
6. COLLECTOR
2
STYLE 13:
PIN 1.
ANODE
2. N/C
STYLE 14:
PIN 1.
VREF
2. GND
STYLE 15:
STYLE 16:
STYLE 17:
STYLE 18:
PIN 1.
VIN1
2. VCC
PIN 1.
ANODE 1
2. ANODE
2
PIN 1.
BASE 1
2. EMITTER
2
3. COLLECTOR
2
4. BASE
2
PIN 1.
BASE 1
2. EMITTER
1
3. COLLECTOR
2
4. BASE
2
3. COLLECTOR
4. EMITTER
5. BASE
3. GND
3. ANODE
3
3. VOUT2
4. VIN2
5. GND
6. VOUT1
4. IOUT
5. VEN
6. VCC
4. CATHODE
3
5. CATHODE
2
6. CATHODE
1
5. EMITTER
1
6. COLLECTOR
1
5. EMITTER
2
6. COLLECTOR
1
6. CATHODE
STYLE 19:
PIN 1.
I OUT
2. GND
STYLE 20:
STYLE 21:
PIN 1.
ANODE 1
2. N/C
STYLE 22:
PIN 1.
D1 (i)
2. GND
STYLE 23:
PIN 1.
Vn
2. CH1
3. Vp
STYLE 24:
PIN 1.
CATHODE
2. ANODE
PIN 1.
COLLECTOR
2. COLLECTOR
3. BASE
3. GND
3. ANODE
2
4. CATHODE
2
5. N/C
3. D2
(i)
3. CATHODE
4. CATHODE
5. CATHODE
6. CATHODE
4. V
CC
4. EMITTER
5. COLLECTOR
6. COLLECTOR
4. D2
(c)
5. VBUS
6. D1
(c)
4. N/C
5. V
EN
5. CH2
6. N/C
6. V
REF
6. CATHODE
1
STYLE 30:
STYLE 25:
STYLE 26:
PIN 1.
SOURCE 1
2. GATE
1
STYLE 27:
PIN 1.
BASE 2
2. BASE
1
STYLE 28:
PIN 1.
DRAIN
2. DRAIN
3. GATE
STYLE 29:
PIN 1.
ANODE
2. ANODE
PIN 1.
SOURCE 1
2. DRAIN
2
3. DRAIN
2
4. SOURCE
2
5. GATE
1
PIN 1.
BASE 1
2. CATHODE
3. COLLECTOR
2
4. BASE
2
3. DRAIN
2
4. SOURCE
2
5. GATE
2
3. COLLECTOR
1
4. EMITTER
1
5. EMITTER
2
6. COLLECTOR
2
3. COLLECTOR
4. EMITTER
5. BASE/ANODE
6. CATHODE
4. SOURCE
5. DRAIN
6. DRAIN
5. EMITTER
6. COLLECTOR
1
6. DRAIN
1
6. DRAIN
1
Note: Please refer to datasheet for
style callout. If style type is not called
out in the datasheet refer to the device
datasheet pinout or pin assignment.
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions
are uncontrolled
except when stamped
“CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98ASB42985B
SC
−
88/SC70
−
6/SOT
−
363
PAGE 2 OF 2
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
©
Semiconductor Components Industries, LLC, 2019
onsemi
,
, and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “
onsemi
” or its affiliates
and/or subsidiaries in the United States and/or other countries.
onsemi
owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property.
A listing of
onsemi
’s product/patent coverage may be accessed at
www.onsemi.com/site/pdf/Patent
−
Marking.pdf
.
onsemi
reserves the right to make changes at any time to any
products or information herein, without notice. The information herein is provided “as
−
is” and
onsemi
makes no warranty, representation or guarantee regarding the accuracy of the
information, product features, availability, functionality, or suitability of its products for any particular purpose, nor does
onsemi
assume any liability arising out of the application or use
of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products
and applications using
onsemi
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provided by
onsemi
. “Typical” parameters which may be provided in
onsemi
data sheets and/or specifications can and do vary in different applications and actual performance may
vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts.
onsemi
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onsemi
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onsemi
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