onsemi-NVLJD4007NZTAG
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NVLJD4007NZ
Small Signal MOSFET
30
V
,
2
45 mA, Dual, N
−
Channel, Gate ESD
Protection, 2×2 WDFN Package
Features
•
Optimized Layout for Excellent High Speed Signal Integrity
•
Low Gate Charge for Fast Switching
•
Small 2 x 2 mm Footprint
R
I MAX
D
DS(on)
V
Typ @ V
(BR)DSS
GS
1.4
W
@ 4.5 V
2.3
W
@ 2.5 V
30 V
245 mA
•
ESD Protected Gate
•
AEC
−
Q101 Qualified and P
P
A
P Capable
•
These Devices are Pb
−
Free and are RoHS Compliant
D (6)
D (4)
MAXIMUM RATINGS
(T =
25
°
C unless otherwise noted)
J
G (2)
G (5)
Parameter
Drain
−
to
−
Source Voltage
Symbol Value
Unit
V
30
V
V
DSS
S (1)
N
−
Channel
S (3)
N
−
Channel
Gate
−
to
−
Source Voltage
V
“
10
245
GS
Continuous Drain
Steady State = 25
°
C
Steady State = 25
°
C
I
D
mA
MARKING
DIAGRAM
Power Dissipation
P
755
1.2
mW
D
1
2
3
6
5
4
WDFN6
CASE 506AN
JG
G
Pulsed Drain Current
t
P
v
10
m
s
I
A
DM
G
1
Operating Junction and Storage
T
e
mperature
T ,
STG
−
55 to
150
°
C
J
T
JG =
Specific Device Code
M
G
= Date Code
= Pb
−
Free Package
Continuous Source Current (Body Diode)
I
245
260
mA
SD
Lead
T
e
mperature for Soldering Purposes
(1/8
″
from case for 10 s)
T
°
C
L
(Note: Microdot may be in either location)
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
PIN CONNECTIONS
D1
S1
G1
S2
D1
G2
D2
1
2
3
6
5
4
THERMAL RESISTANCE RATINGS
Parameter
Symbol
Max
Unit
R
166
°
C/W
D2
q
JA
1. Surface
−
mounted on FR4 board using 1 in sq pad size
(Cu area = 1.127 in sq [1 oz] including traces).
(
T
o
p View)
ORDERING INFORMATION
†
Device
Package
Shipping
NVLJD4007NZTAG
WDFN6
(Pb
−
Free)
3000/
T
a
pe &
Reel
NVLJD4007NZTBG
WDFN6
(Pb
−
Free)
3000/
T
a
pe &
Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our
T
a
pe and Reel Packaging Specification
Brochure, BRD8011/D.
©
Semiconductor Components Industries, LLC, 2013
1
Publication Order Number:
May, 2013
−
Rev. 0
NVLJD4007NZ/D
NVLJD4007NZ
ELECTRICAL CHARACTERISTICS
(T =
25
°
C unless otherwise specified)
J
Parameter
OFF CHARACTERISTICS
Symbol
Test Condition
Min
Typ
Max
Unit
Drain
−
to
−
Source Breakdown Voltage
V
V
GS
= 0
V
, I
=
1
00
m
A
30
V
(BR)DSS
D
Drain
−
to
−
Source Breakdown Voltage
T
e
mperature Coefficient
V
/T Reference
to 25
°
C, I
= 100
m
A
27
(BR)DSS
J
D
mV/
°
C
Zero Gate Voltage Drain Current
Zero Gate Voltage Drain Current
I
I
V
= 0
V
, V
=
3
0 V
1.0
1.0
m
A
m
A
DSS
GS
DS
V
GS
= 0
V
, V
=
2
0
V
,
DSS
DS
T = 85
°
C
Gate
−
to
−
Source Leakage Current
Gate
−
to
−
Source Leakage Current
Gate
−
to
−
Source Leakage Current
I
I
I
V
= 0
V
, V
=
10 V
5 V
25
1.0
1.0
m
A
m
A
m
A
GSS
GSS
GSS
DS
GS
V
= 0
V
, V
=
DS
GS
GS
V
= 0
V
, V
T = 85
°
C
=
5 V
DS
Gate Threshold Voltage
V
V
= V
, I
= 100
m
A
0.5
1.0
−
2.5
1.4
2.3
80
1.5
V
GS(TH)
DS
GS
D
Threshold
T
e
mperature Coefficient
Drain
−
to
−
Source On Resistance
V
/T
Reference to 25
°
C, I
= 100
m
A
mV/
°
C
GS(TH)
J
D
R
V
= 4.5
V
, I
=
1
25 mA
7.0
7.5
DS(on)
GS
GS
D
W
V
= 2.5
V
, I
=
1
25 mA
D
Forward Transconductance
CAPACITANCES & GATE CHARGE
Input Capacitance
g
FS
V
= 3
V
, I
=
1
25 mA
mS
DS
D
C
12.2
10
20
15
ISS
V
= 5.0
V
, f = 1
M
Hz,
DS
Output Capacitance
C
C
pF
OSS
RSS
V
GS
= 0 V
Reverse Transfer Capacitance
T
o
tal Gate Charge
3.3
6.0
Q
0.75
0.20
0.20
1.57
g
Gate
−
to
−
Source Charge
Gate
−
to
−
Drain Charge
Q
nC
V
gs
gd
V
DS
= 24
V
, I
=
1
00 mA,
D
V
GS
= 4.5 V
Q
Plateau Voltage
V
GP
Turn
−
On Delay Time
t
9
ns
d(ON)
Rise Time
t
41
96
72
r
V
D
= 4.5
V
, V
=
2
4
V
,
DS
GS
I
= 125 mA, R
= 10
W
G
Turn
−
Off Delay Time
t
d(OFF)
ns
V
Fall Time
t
f
DRAIN
−
SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
V
SD
V
GS
= 0
V
, I
=
1
25 mA
0.79
0.9
S
2. Pulse
T
e
st: pulse width
v
300
m
s, duty cycle
v
2%.
3. Switching
characteristics are independent of operating junction temperatures.
2
NVLJD4007NZ
TYPICAL PERFORMANCE CURVES
1.2
1.2
1.1
1.0
0.9
0.8
0.7
0.6
5.0 V
4.5 V
4.0 V
V
= 10 V
GS
1.1
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
V
DS
= 5 V
T =
25
°
C
J
3.5 V
T =
150
°
C
J
3.0 V
2.8 V
2.6 V
2.4 V
2.2 V
T =
−
55
°
C
J
0.5
0.4
0.3
0.2
2.0 V
1.8 V
0.1
0
0.1
0
0
0.5 1.0
1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
, DRAIN
−
TO
−
SOURCE VOLTAGE (V)
0
0.5 1.0
1.5
2.0 2.5 3.0 3.5 4.0
4.5
V
GS
, GATE
−
TO
−
SOURCE VOLTAGE (V)
V
DS
Figure 1. On
−
Region Characteristics
Figure 2. Transfer Characteristics
10
10
9.0
8.0
7.0
6.0
5.0
4.0
3.0
2.0
1.0
T =
−
55
°
C
J
T =
125
°
C
J
9.0
8.0
7.0
6.0
5.0
4.0
3.0
2.0
1.0
T =
25
°
C
J
I
D
= 125 mA
V
GS
V
GS
= 2.5 V
= 4.5 V
T =
25
°
C
J
T =
125
°
C
J
T =
25
°
C
J
T =
−
55
°
C
J
1.5
2.0
2.5
3.0
3.5
4.0
4.5
0
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9
1.0 1.1 1.2
V
GS,
GATE VOLTAGE (V)
I
D,
DRAIN CURRENT (A)
Figure 4. On
−
Resistance vs. Drain Current and
Figure 3. On
−
Resistance vs. Gate
−
to
−
Source
Gate Voltage
Voltage
1.9
1000
100
1.8
1.7
1.6
1.5
1.4
1.3
1.2
1.1
1.0
0.9
I
V
= 125 mA
= 4.5 V
D
GS
T =
150
°
C
J
T =
125
°
C
J
10
T =
85
°
C
J
1
0.8
0.7
0.6
0.1
−
50
−
25
0
25
50
75
100 125
150
0
5
10
15
20
25
30
T , JUNCTION TEMPERATURE (
°
C)
J
V
DS
, DRAIN
−
TO
−
SOURCE VOLTAGE (V)
Figure 5. On
−
Resistance Variation with
Figure 6. Drain
−
to
−
Source Leakage Current
Temperature
vs. Voltage
3
NVLJD4007NZ
TYPICAL PERFORMANCE CURVES
25
20
5.0
4.5
30
25
20
15
10
Q
T
V
= 0 V
GS
4.0
3.5
3.0
2.5
2.0
1.5
1.0
T =
25
°
C
J
f = 1 MHz
V
DS
15
10
V
GS
C
C
iss
Q
Q
GD
GS
V
= 24 V
= 100 mA
DS
oss
I
D
5
0
T =
25
°
C
J
5
0
C
rss
0.5
0
0
5
10
15
20
25
30
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
V
DS
, DRAIN
−
TO
−
SOURCE VOLTAGE (V)
Q ,
TOTAL GATE CHARGE (nC)
G
Figure 7. Capacitance Variation
Figure 8. Gate
−
to
−
Source and
Drain
−
to
−
Source Voltage vs. Total Charge
1000
100
10
V
V
= 4.5 V
= 24 V
= 125 mA
GS
DD
I
D
T =
85
°
C
J
T =
25
°
C
J
t
t
t
d(off)
f
T =
125
°
C
J
r
1
10
1
t
d(on)
T =
150
°
C
J
T =
−
55
°
C
J
0.1
1
10
R ,
GATE RESISTANCE (
W
)
100
0.5
0.6
0.7
0.8
0.9
1.0
1.1
V
SD
, SOURCE
−
TO
−
DRAIN VOLTAGE (V)
G
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance
Figure 10. Diode Forward Voltage vs. Current
10
V
GS
≤
10 V
Single Pulse
= 25
°
C
T
C
1
10
m
s
100
m
s
0.1
1 ms
10 ms
dc
0.01
R
Limit
DS(on)
Thermal Limit
Package Limit
0.001
0.1
1
10
100
V
DS
, DRAIN
−
TO
−
SOURCE VOLTAGE (V)
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
4
NVLJD4007NZ
TYPICAL PERFORMANCE CURVES
1000
R
Steady State = 166
°
C/W
q
JA
Duty Cycle = 0.5
0.20
100
10
1
0.10
0.05
0.02
Single Pulse
0.01
1E
−
06
1E
−
05
1E
−
04
1E
−
03
1E
−
02
1E
−
01
1E+00
1E+01
1E+02
1E+03
t, TIME (s)
Figure 12. Thermal Impedance (Junction
−
to
−
Ambient)
5
NVLJD4007NZ
PACKAGE DIMENSIONS
WDFN6 2×2, 0.65P
CASE 506AN
ISSUE F
NOTES:
1. DIMENSIONING
AND TOLERANCING PER
ASME Y14.5M, 1994.
D
A
B
EXPOSED Cu
MOLD CMPD
2. CONTROLLING
DIMENSION: MILLIMETERS.
3. DIMENSION
b APPLIES TO PLATED
TERMINAL AND IS MEASURED BETWEEN
0.15 AND 0.30 mm FROM THE TERMINAL TI
P
.
4. COPLANARITY
APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
PLATING
DETAIL B
PIN ONE
REFERENCE
OPTIONAL
MILLIMETERS
E
CONSTRUCTIONS
DIM
A
MIN
0.70
0.00
MAX
0.80
0.05
A1
A3
b
0.10
C
0.20 REF
0.25
0.35
L
L
D
2.00 BSC
0.10
C
D2
E
0.57
2.00 BSC
0.77
1.10
TOP VIEW
L1
E2
e
0.90
0.65 BSC
0.15 BSC
0.25 REF
DETAIL A
A3
DETAIL B
F
0.10
0.08
C
C
OPTIONAL
K
CONSTRUCTIONS
L
0.20
—
0.30
0.10
A
L1
STYLE 3:
PIN 1.
SOURCE 1
2. GATE
1
NOTE 4
A1
SEATING
PLANE
C
SIDE VIEW
3. SOURCE
2
4. DRAIN
2
5. GATE
2
6. DRAIN
1
0.10
D2
F
C
A
B
D2
SOLDERMASK DEFINED
MOUNTING FOOTPRINT
L
1
3
1.74
2X
0.77
DETAIL A
E2
0.10
C
A
B
1.10
6
4
6X
0.47
K
6X
b
0.10
0.05
C
C
A
B
2.30
e
NOTE 3
PACKAGE
OUTLINE
BOTTOM VIEW
1
0.65
PITCH
6X
0.35
DIMENSIONS: MILLIMETERS
ON Semiconductor
and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC).
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−
Marking.pdf
. SCILLC
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SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any
particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without
limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications
and actual performance may vary over time.
All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts.
SCILLC
does not convey any license under its patent rights nor the rights of others.
SCILLC products are not designed, intended, or authorized for use as components in systems intended for
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personal injury or death may occur.
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any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture
of the part.
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:
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NVLJD4007NZ/D
