onsemi-NVMFS4C01NT3G
| Part # | onsemi-NVMFS4C01NT3G |
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NVMFS4C01N
N-Channel, Logic Level
SO-8FL
30
V
,
0
.67 m
W
, 370 A
Features
•
Small Footprint (5×6 mm) for Compact Design
V
R
MAX
I MAX
D
(BR)DSS
DS(ON)
•
Low R
to Minimize Conduction Losses
DS(on)
0.67 m
W
@ 10 V
0.95 m
W
@ 4.5 V
•
Low Q
and Capacitance to Minimize Driver Losses
G
30 V
370 A
•
NVMFS4C01NWF
−
Wettable Flanks Option for Enhanced Optical
Inspection
D (5)
•
AEC
−
Q101 Qualified and P
P
A
P Capable
•
These Devices are Pb
−
Free, Halogen Free/BFR Free and are RoHS
Compliant
G (4)
MAXIMUM RATINGS
(T =
25
°
C unless otherwise noted)
J
Parameter
Drain
−
to
−
Source Voltage
Symbol
Value
30
Unit
V
S (1,2,3)
N
−
CHANNEL MOSFET
V
DSS
Gate
−
to
−
Source Voltage
V
GS
“
20
370
V
Continuous Drain Cur-
T
T
= 25
°
C
= 25
°
C
I
D
A
MARKING
DIAGRAM
C
rent R
q
JC
Steady
State
D
Power Dissipation
P
D
161
57
W
A
C
R
q
JC
S
S
S
G
D
D
1
4C01xx
AYWZZ
Continuous Drain Cur-
T =
25
°
C
A
I
D
SO
−
8 FLAT LEAD
CASE 488AA
STYLE 1
rent R
q
JA
Steady
State
D
Power Dissipation
T =
25
°
C
A
P
D
3.84
900
W
R
q
JA
4C01N =
Specific Device Code for
NVMFS4C01N
4C01WF= Specific Device Code of
NVMFS4C01NWF
Pulsed Drain Current
T =
25
°
C, t
= 10
m
s
A
I
DM
A
p
Operating Junction and Storage
T
e
mperature
T , T
−
55 to
175
°
C
J
stg
A
Y
W
ZZ
= Assembly Location
=
Y
e
ar
= Work Week
= Lot Traceabililty
Source Current (Body Diode)
I
S
110
862
A
Single Pulse Drain
−
to
−
Source Avalanche
E
AS
mJ
Energy (I
= 35 A)
L(pk)
Lead
T
e
mperature for Soldering Purposes
(1/8
″
from case for 10 s)
T
L
260
°
C
ORDERING INFORMATION
†
Device
Package
Shipping
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
NVMFS4C01NT1G
SO
−
8 FL
1500 /
(Pb
−
Free)
T
a
pe
& Reel
NVMFS4C01NT3G
SO
−
8 FL
5000 /
Parameter
Symbol
Value
Unit
(Pb
−
Free)
T
a
pe
& Reel
SO
−
8 FL
1500 /
(Pb
−
Free)
T
a
pe
& Reel
SO
−
8 FL
5000 /
(Pb
−
Free)
T
a
pe
& Reel
Junction
−
to
−
Case
−
Steady State
R
0.93
39
°
C/W
NVMFS4C01NWFT1G
q
JC
R
q
JA
NVMFS4C01NWFT3G
1. The
entire application environment impacts the thermal resistance values shown,
they are not constants and are only valid for the particular conditions noted.
2
2. Surface
−
mounted on FR4 board using a 650 mm
, 2 oz. Cu pad.
3. Maximum
current for pulses as long as 1 second is higher but is dependent
on pulse duration and duty cycle.
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our
T
a
pe and Reel Packaging Specifications
Brochure, BRD8011/D.
©
Semiconductor Components Industries, LLC, 2016
1
Publication Order Number:
July, 2019
−
Rev. 2
NVMFS4C01N/D
NVMFS4C01N
ELECTRICAL CHARACTERISTICS
(T =
25
°
C unless otherwise specified)
J
Parameter
OFF CHARACTERISTICS
Symbol
Test Condition
Min
Typ
Max
Unit
Drain
−
to
−
Source Breakdown Voltage
V
V
GS
= 0
V
, I
=
2
50
m
A
30
V
(BR)DSS
D
Drain
−
to
−
Source Breakdown Voltage
T
e
mperature Coefficient
V
/
16.3
(BR)DSS
mV/
°
C
T
J
Zero Gate Voltage Drain Current
I
V
= 0
V
,
T =
25
°
C
1
DSS
GS
DS
J
V
= 24 V
m
A
T =
125
°
C
J
100
100
Gate
−
to
−
Source Leakage Current
Gate Threshold Voltage
I
V
= 0
V
, V
=
2
0 V
nA
GSS
DS
GS
GS
V
V
= V
, I
= 250
m
A
1.3
2.2
V
GS(TH)
DS
D
Negative Threshold
T
e
mperature Coefficient
Drain
−
to
−
Source On Resistance
V
/T
5.8
0.56
0.76
183
1.0
mV/
°
C
GS(TH)
J
R
V
= 10 V
I
I
= 30 A
= 30 A
0.67
0.95
DS(on)
GS
D
m
W
V
GS
= 4.5 V
D
Forward Transconductance
Gate Resistance
g
FS
V
= 3
V
, I
=
3
0 A
S
DS
D
R
T =
25
°
C
A
W
G
CHARGES AND CAPACITANCES
Input Capacitance
C
10144
5073
148
63
ISS
Output Capacitance
C
V
GS
= 0
V
, f = 1
M
Hz, V
= 15 V
pF
OSS
RSS
DS
Reverse Transfer Capacitance
T
o
tal Gate Charge
C
Q
G(TOT)
Threshold Gate Charge
Gate
−
to
−
Source Charge
Gate
−
to
−
Drain Charge
T
o
tal Gate Charge
Q
18
G(TH)
V
GS
= 4.5
V
, V
=
1
5 V; I
= 30 A
nC
nC
DS
D
Q
29
GS
GD
Q
13
Q
V
GS
= 10
V
, V
=
1
5
V
,
139
G(TOT)
DS
I
= 30 A
D
Turn
−
On Delay Time
t
29
68
53
36
d(ON)
Rise Time
t
r
V
GS
= 4.5
V
, V
=
1
5
V
, I
=
1
5 A,
DS D
ns
V
R
= 3.0
W
G
Turn
−
Off Delay Time
t
d(OFF)
Fall Time
t
f
DRAIN
−
SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
V
T =
25
°
C
0.73
0.55
87
1.1
SD
J
V
S
= 0
V
,
GS
I
= 10 A
T =
125
°
C
J
Reverse Recovery Time
Charge Time
t
RR
t
43
ns
a
V
= 0
V
,
d
I
/dt = 100 A/
m
s,
S
GS
I
S
= 30 A
Discharge Time
t
44
b
Reverse Recovery Charge
Q
147
nC
RR
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. Pulse
T
e
st: pulse width
v
300
m
s, duty cycle
v
2%.
5. Switching
characteristics are independent of operating junction temperatures.
2
NVMFS4C01N
TYPICAL CHARACTERISTICS
400
350
300
250
200
150
100
50
400
10 V
V
DS
= 3 V
3.4 V
350
300
250
200
150
100
50
3.6 V
3.2 V
3.0 V
4.5 V
T =
25
°
C
J
2.8 V
= 2.6 V
2.5
T =
150
°
C
J
V
GS
T =
−
55
°
C
J
0
0
0.0
0.5
1.0
1.5
2.0
3.0
1.5
2
2.5
3
3.5
4
V
DS
, DRAIN
−
TO
−
SOURCE VOLTAGE (V)
V
GS
, GATE
−
TO
−
SOURCE VOLTAGE (V)
Figure 1. On
−
Region Characteristics
Figure 2. Transfer Characteristics
1.5
1.4
1.3
1.2
1.1
1.0
0.9
0.8
0.7
0.6
0.5
1.5
1.4
1.3
1.2
1.1
1.0
0.9
0.8
0.7
0.6
0.5
T =
25
°
C
I
= 30 A
J
D
T =
25
°
C
J
V
= 4.5 V
GS
V
= 10 V
200
GS
3
4
5
6
7
8
9
10
0
50
100
150
250
300
350 400
V
GS
, GATE VOLTAGE (V)
I ,
DRAIN CURRENT (A)
D
Figure 3. On
−
Resistance vs. Gate
−
to
−
Source
Figure 4. On
−
Resistance vs. Drain Current and
Voltage
Gate Voltage
100000
10000
1000
100
1.8
V
= 10 V
= 30 A
GS
I
D
1.6
1.4
1.2
1.0
T =
125
°
C
J
T =
100
°
C
J
T =
85
°
C
J
0.8
0.6
10
0
5
10
15
20
25
30
−
50
−
25
0
25
50
75 100
125 150 175
T , JUNCTION TEMPERATURE (
°
C)
J
V
DS
, DRAIN
−
TO
−
SOURCE VOLTAGE (V)
Figure 5. On
−
Resistance Variation with
Figure 6. Drain
−
to
−
Source Leakage Current
Temperature
vs. Voltage
3
NVMFS4C01N
TYPICAL CHARACTERISTICS
18
15
12
9
100k
10k
12
11
10
Q
T
C
ISS
V
V
V
9
8
7
6
5
4
3
2
DS
GS
C
OSS
1k
Q
GD
Q
GS
6
V
= 0 V
GS
= 15 V
DS
= 30 A
100
10
T =
25
°
C
J
C
RSS
I
D
f = 1 MHz
3
0
T =
25
°
C
J
1
0
0.1
1
10
100
0
20
40
60
80
100
120
140
V
DS
, DRAIN
−
TO
−
SOURCE VOLTAGE (V)
Q ,
TOTAL GATE CHARGE (nC)
G
Figure 7. Capacitance Variation
Figure 8. Gate
−
to
−
Source and
Drain
−
to
−
Source Voltage vs. Total Charge
1000
1000
100
10
t
d(off)
V
V
I
= 4.5 V
= 15 V
= 15 A
GS
DD
t
D
r
t
f
t
d(on)
100
10
1
T =
150
°
C
J
T =
−
55
°
C
J
T =
25
°
C
J
0.1
0.1
1
10
100
0.3
0.4
V
0.5
0.6
0.7
0.8
0.9
1.0
R ,
GATE RESISTANCE (
W
)
G
, SOURCE
−
TO
−
DRAIN VOLTAGE (V)
SD
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance
Figure 10. Diode Forward Voltage vs. Current
1000
10
m
s
100
100
m
s
V
T
≤
10 V
= 25
°
C
GS
10
1
C
R
Limit
DS(on)
1 ms
Thermal Limit
Package Limit
10 ms
0.1
1
10
100
VDS, DRAIN
−
TO
−
SOURCE VOLTAGE (V)
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
4
NVMFS4C01N
TYPICAL CHARACTERISTICS
100
10
1
R
= Steady State = 39
°
C/W
q
JA
Duty Cycle = 0.5
0.2
0.1
0.05
0.02
0.01
2
P
CB
Cu Area = 650 mm
P
CB
Cu Thk = 2 oz
0.1
0.01
Single Pulse
0.001
0.000001 0.00001
0.0001
0.001
0.01
0.1
1
10
100
1000
t, TIME (s)
Figure 12. Thermal Impedance (Junction
−
to
−
Ambient)
1000
100
10
1
T
= 25
°
C
J(initial)
T
= 100
°
C
J(initial)
1.00E
−
04
1.00E
−
03
1.00E
−
02
TIME IN AVALANCHE (s)
Figure 13. Avalanche Characteristics
5
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
DFN5 5×6, 1.27P
(SO−8FL)
CASE 488AA
ISSUE N
1
SCALE 2:1
2 X
DATE 25 JUN 2018
NOTES:
1. DIMENSIONING
AND TOLERANCING PER
ASME Y14.5M, 1994.
0.20
C
2. CONTROLLING
DIMENSION: MILLIMETER.
3. DIMENSION
D1 AND E1 DO NOT INCLUDE
MOLD FLASH PROTRUSIONS OR GATE
BURRS.
D
A
2
B
E
2 X
D1
MILLIMETERS
0.20
C
DIM
A
A1
b
c
D
D1
D2
E
E1
E2
e
G
K
L
L1
M
MIN
0.90
0.00
0.33
0.23
5.00
4.70
3.80
6.00
5.70
3.45
NOM
1.00
−−−
0.41
0.28
5.15
4.90
4.00
6.15
MAX
1.10
0.05
0.51
0.33
5.30
5.10
4.20
6.30
6.10
3.85
4 X
q
E1
2
c
A1
5.90
3.65
1
2
3
4
1.27 BSC
0.575
1.35
0.575
0.125 REF
3.40
0.51
1.20
0.51
0.71
1.50
0.71
TOP VIEW
C
SEATING
DETAIL A
PLANE
0.10
0.10
C
C
3.00
0
3.80
q
−−−
12
A
_
_
GENERIC
SIDE VIEW
MARKING DIAGRAM*
DETAIL A
1
8X
b
A B
XXXXXX
AYWZZ
0.10
0.05
C
c
e/2
e
L
1
4
XXXXXX =
Specific Device Code
A
Y
= Assembly Location
=
Y
e
ar
K
RECOMMENDED
SOLDERING FOOTPRINT*
W
ZZ
= Work Week
= Lot Traceability
E2
2X
PIN 5
M
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “
G
”,
may or may not be present. Some products
may not follow the Generic Marking.
(EXPOSED PAD)
L1
0.495
4.560
2X
1.530
D2
G
2X
BOTTOM VIEW
0.475
3.200
1.330
4.530
STYLE 1:
STYLE 2:
PIN 1.
ANODE
2. ANODE
2X
0.905
PIN 1.
SOURCE
2. SOURCE
3. SOURCE
4. GATE
1
3. ANODE
4. NO
CONNECT
5. CATHODE
0.965
5. DRAIN
4X
1.000
1.270
PITCH
4X
0.750
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting
T
e
chniques Reference Manual, SOLDERRM/D.
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions
are uncontrolled
except when stamped
“CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON14036D
DFN5 5×6, 1.27P (SO−8FL)
PAGE 1 OF 1
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©
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:
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