onsemi-NVMFS4C05NT1G
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NVMFS4C05N
N-Channel, SO-8 FL
30
V
,
1
27 A
Features
•
Low R
to Minimize Conduction Losses
•
Low Capacitance to Minimize Driver Losses
DS(on)
•
Optimized Gate Charge to Minimize Switching Losses
•
NVMFS4C05NWF
−
Wettable Flanks Option for Enhanced Optical
Inspection
V
R
MAX
I MAX
D
(BR)DSS
DS(ON)
2.8 m
W
@ 10 V
4.0 m
W
@ 4.5 V
30 V
127 A
•
AEC
−
Q101 Qualified and P
P
A
P Capable
•
These Devices are Pb
−
Free, Halogen Free/BFR Free and are RoHS
D (5
−
8)
Compliant
MAXIMUM RATINGS
(T =
25
°
C unless otherwise stated)
J
Parameter
Drain
−
to
−
Source Voltage
Gate
−
to
−
Source Voltage
Symbol
Value
30
Unit
V
G (4)
V
DSS
V
GS
20
V
S (1,2,3)
N
−
CHANNEL MOSFET
Continuous Drain
Current R
T =
25
°
C
27.2
21.6
3.61
A
A
I
q
JA
D
T =
80
°
C
A
MARKING
DIAGRAM
Power Dissipation
T =
25
°
C
A
W
R
P
q
JA
D
D
Continuous Drain
Current R
T
= 25
°
C
= 80
°
C
127
101
C
C
S
S
S
G
D
D
1
q
JC
Steady
State
4C05xx
AYWZZ
SO
−
8 FLAT LEAD
CASE 488AA
STYLE 1
I
D
A
Continuous Drain
Current R
T
D
q
JC
4C05N =
Specific Device Code for
NVMFS4C05N
4C05WF= Specific Device Code of
NVMFS4C05NWF
Power Dissipation
T
C
= 25
°
C
P
79
W
D
R
A
Y
= Assembly Location
=
Y
e
ar
q
JC
W
ZZ
= Work Week
= Lot Traceabililty
Pulsed Drain
Current
T =
25
°
C, t
= 10
m
s
I
DM
174
A
A
p
Operating Junction and Storage
T
e
mperature
T ,
STG
−
55 to
+175
°
C
J
ORDERING INFORMATION
T
†
Device
Package
Shipping
Source Current (Body Diode)
I
72
42
A
S
NVMFS4C05NT1G
SO
−
8 FL
1500 /
Single Pulse Drain
−
to
−
Source Avalanche
Energy (T
= 25
°
C, I
= 29 A
, L = 0.1 mH)
E
AS
mJ
(Pb
−
Free)
T
a
pe
& Reel
J
L
pk
NVMFS4C05NT3G
SO
−
8 FL
5000 /
Lead
T
e
mperature for Soldering Purposes
T
260
°
C
L
(1/8
″
from case for 10 s)
(Pb
−
Free)
T
a
pe
& Reel
SO
−
8 FL
1500 /
(Pb
−
Free)
T
a
pe
& Reel
SO
−
8 FL
5000 /
(Pb
−
Free)
T
a
pe
& Reel
NVMFS4C05NWFT1G
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
1. The
entire application environment impacts the thermal resistance values shown,
they are not constants and are only valid for the particular conditions noted.
2. Surface
−
mounted on FR4 board using 650 mm
, 2 oz Cu pad.
NVMFS4C05NWFT3G
2
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our
T
a
pe and Reel Packaging Specifications
Brochure, BRD8011/D.
3. Assumes
heat
−
sink sufficiently large to maintain constant case temperature
independent of device power.
4. Continuous
DC current rating. Maximum current for pulses as long as one
second is higher but dependent on pulse duration and duty cycle.
©
Semiconductor Components Industries, LLC, 2016
1
Publication Order Number:
July, 2019
−
Rev. 2
NVMFS4C05N/D
NVMFS4C05N
THERMAL RESISTANCE MAXIMUM RATINGS
Parameter
Symbol
Value
1.9
Unit
Junction
−
to
−
Case (Drain)
R
q
JC
°
C/W
R
41.6
q
JA
2
5. Surface
−
mounted on FR4 board using 650 mm
, 2 oz Cu pad.
ELECTRICAL CHARACTERISTICS
(T =
25
°
C unless otherwise specified)
J
Parameter
Symbol
Test Condition
Min
Typ
Max
Unit
OFF CHARACTERISTICS
Drain
−
to
−
Source Breakdown Voltage
V
V
GS
= 0
V
, I
=
2
50
m
A
30
V
(BR)DSS
D
Drain
−
to
−
Source Breakdown Voltage
T
e
mperature Coefficient
V
/
12
(BR)DSS
mV/
°
C
T
J
Zero Gate Voltage Drain Current
I
V
= 0
V
,
= 24 V
T =
25
°
C
1.0
10
DSS
GS
DS
J
m
A
V
T =
125
°
C
J
Gate
−
to
−
Source Leakage Current
Gate Threshold Voltage
I
V
= 0
V
, V
=
GS
20 V
100
nA
GSS
DS
V
V
= V
, I
= 250
m
A
1.3
0.3
2.2
V
GS(TH)
GS
DS
D
Threshold
T
e
mperature Coefficient
Drain
−
to
−
Source On Resistance
V
/T
J
−
5.1
2.3
3.3
68
mV/
°
C
GS(TH)
R
V
GS
= 10 V
I
I
= 30 A
= 30 A
2.8
4.0
DS(on)
D
m
W
V
GS
= 4.5 V
D
Forward Transconductance
Gate Resistance
g
FS
V
= 1.5
V
, I
=
1
5 A
S
DS
D
R
T =
25
°
C
A
1.0
2.0
W
G
CHARGES AND CAPACITANCES
Input Capacitance
C
1972
1215
59
ISS
Output Capacitance
C
OSS
C
RSS
V
= 0
V
, f = 1
M
Hz, V
= 15 V
pF
nC
GS
DS
Reverse Transfer Capacitance
Capacitance Ratio
C
/C
V
GS
= 0
V
, V
=
1
5
V
, f = 1
M
Hz
0.030
14
RSS ISS
DS
T
o
tal Gate Charge
Q
G(TOT)
Threshold Gate Charge
Gate
−
to
−
Source Charge
Gate
−
to
−
Drain Charge
Gate Plateau Voltage
T
o
tal Gate Charge
Q
3.3
G(TH)
Q
6.0
V
= 4.5
V
, V
=
1
5 V; I
= 30 A
GS
GD
GP
GS
DS
D
Q
V
5.0
V
3.1
Q
V
= 10
V
, V
=
1
5 V; I
= 30 A
30
nC
G(TOT)
GS
DS
D
Turn
−
On Delay Time
Rise Time
t
11
32
d(ON)
t
r
V
= 4.5
V
, V
=
1
5
V
,
GS DS
D
ns
ns
V
I
= 15 A, R
= 3.0
W
G
Turn
−
Off Delay Time
Fall Time
t
21
d(OFF)
t
f
7.0
8.0
26
Turn
−
On Delay Time
Rise Time
t
d(ON)
t
r
V
= 10
V
, V
=
1
5
V
,
GS DS
I
D
= 15 A, R
= 3.0
W
G
Turn
−
Off Delay Time
Fall Time
t
26
d(OFF)
t
f
5.0
DRAIN
−
SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
V
SD
T =
25
°
C
0.77
0.62
40.2
20.3
19.9
30.2
1.1
V
S
= 0
V
,
= 10 A
J
GS
I
T =
125
°
C
J
Reverse Recovery Time
Charge Time
t
RR
t
a
ns
V
= 0
V
,
d
I
/dt = 100 A/
m
s,
GS S
I =
30 A
S
Discharge Time
t
b
nC
Reverse Recovery Charge
Q
RR
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
6. Pulse
T
e
st: pulse width
v
300
m
s, duty cycle
v
2%.
7. Switching
characteristics are independent of operating junction temperatures.
2
NVMFS4C05N
TYPICAL CHARACTERISTICS
140
130
120
110
100
90
140
T =
25
°
C
J
10 V
V
DS
= 5 V
130
120
110
100
90
3.8 V
3.6 V
4.5 V
4.2 V
4 V
3.4 V
3.2 V
80
70
80
70
60
60
50
40
50
40
3.0 V
T =
125
°
C
J
30
20
10
0
30
20
10
0
T =
25
°
C
2.8 V
2.6 V
J
T =
−
55
°
C
J
0
1
2
3
4
5
0
0.5 1.0 1.5
2.0 2.5 3.0 3.5 4.0
4.5
V
DS
, DRAIN
−
TO
−
SOURCE VOLTAGE (V)
V
GS
, GATE
−
TO
−
SOURCE VOLTAGE (V)
Figure 1. On
−
Region Characteristics
Figure 2. Transfer Characteristics
12
11
10
9
12
11
10
9
I
= 30 A
T =
25
°
C
J
D
T =
25
°
C
J
8
8
7
7
6
6
5
5
V
= 4.5 V
= 10 V
GS
4
4
3
3
V
GS
2
1
2
1
3.0
4.0
5.0
6.0
7.0
8.0
9.0
10
0
20
40
60
80
100
120
140
V
GS
, GATE
−
TO
−
SOURCE VOLTAGE (V)
I ,
DRAIN CURRENT (A)
D
Figure 3. On
−
Resistance vs. V
GS
Figure 4. On
−
Resistance vs. Drain Current and
Gate Voltage
1.8
10000
1000
V
GS
= 0 V
I
V
= 30 A
1.7
1.6
1.5
1.4
1.3
1.2
1.1
1.0
0.9
0.8
0.7
D
= 10 V
GS
T =
150
°
C
J
T =
125
°
C
J
100
10
T =
85
°
C
J
−
50
−
25
0
25
50
75
100 125 150 175
5
10
V ,
DRAIN
−
TO
−
SOURCE VOLTAGE (V)
DS
15
20
25
30
T , JUNCTION TEMPERATURE (
°
C)
J
Figure 5. On
−
Resistance Variation with
Figure 6. Drain
−
to
−
Source Leakage Current
Temperature
vs. Voltage
3
NVMFS4C05N
TYPICAL CHARACTERISTICS
3000
2750
2500
10
Q
V
= 0 V
T
GS
T =
25
°
C
J
8
6
4
2
0
2250
2000
1750
1500
1250
1000
750
C
C
iss
oss
Q
8
Q
gd
gs
T =
25
°
C
J
V
DD
V
GS
= 15 V
= 10 V
500
250
0
C
rss
I
D
= 30 A
0
5
10
15
20
25
30
0
4
12
16
20
24
28
32
V
DS
, DRAIN
−
TO
−
SOURCE VOLTAGE (V)
Q ,
TOTAL GATE CHARGE (nC)
g
Figure 7. Capacitance Variation
Figure 8. Gate
−
to
−
Source and
Drain
−
to
−
Source Voltage vs. Total Charge
20
18
16
14
12
10
8
1000
100
V
GS
= 0 V
V
= 15 V
= 15 A
= 10 V
DD
I
D
t
V
GS
d(off)
t
d(on)
t
r
t
f
10
1
6
T =
125
°
C
J
4
T =
25
°
C
J
2
0
1
10
R ,
GATE RESISTANCE (
W
)
100
0.4
0.5
0.6
0.7
0.8
0.9
1.0
V
SD
, SOURCE
−
TO
−
DRAIN VOLTAGE (V)
G
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance
Figure 10. Diode Forward Voltage vs. Current
1000
100
10
10
m
s
100
m
s
1 ms
1
10 ms
0.1
0 V < V
< 10 V
GS
Single Pulse
0.01
0.001
T
C
= 25
°
C
R
Limit
DS(on)
Thermal Limit
Package Limit
dc
0.0001
0.1
1
10
100
V
DS
, DRAIN
−
TO
−
SOURCE VOLTAGE (V)
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
4
NVMFS4C05N
TYPICAL CHARACTERISTICS
100
10
Duty Cycle = 50%
20%
10%
5%
2%
1
1%
0.1
0.01
Single Pulse
0.000001
0.00001
0.0001
0.001
0.01
0.1
1
10
100
1000
PULSE TIME (sec)
Figure 12. Thermal Response
1000
120
100
80
60
40
20
0
100
10
1
T =
25
°
C
A
T =
85
°
C
A
0
10
20
30
40
(A)
50
60
70
80
1.E
−
06
1.E
−
05
1.E
−
04
1.E
−
03
I
PULSE WIDTH (SECONDS)
D
Figure 13. G
FS
vs. I
D
Figure 14. Avalanche Characteristics
5
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
DFN5 5×6, 1.27P
(SO−8FL)
CASE 488AA
ISSUE N
1
SCALE 2:1
2 X
DATE 25 JUN 2018
NOTES:
1. DIMENSIONING
AND TOLERANCING PER
ASME Y14.5M, 1994.
0.20
C
2. CONTROLLING
DIMENSION: MILLIMETER.
3. DIMENSION
D1 AND E1 DO NOT INCLUDE
MOLD FLASH PROTRUSIONS OR GATE
BURRS.
D
A
2
B
E
2 X
D1
MILLIMETERS
0.20
C
DIM
A
A1
b
c
D
D1
D2
E
E1
E2
e
G
K
L
L1
M
MIN
0.90
0.00
0.33
0.23
5.00
4.70
3.80
6.00
5.70
3.45
NOM
1.00
−−−
0.41
0.28
5.15
4.90
4.00
6.15
MAX
1.10
0.05
0.51
0.33
5.30
5.10
4.20
6.30
6.10
3.85
4 X
q
E1
2
c
A1
5.90
3.65
1
2
3
4
1.27 BSC
0.575
1.35
0.575
0.125 REF
3.40
0.51
1.20
0.51
0.71
1.50
0.71
TOP VIEW
C
SEATING
DETAIL A
PLANE
0.10
0.10
C
C
3.00
0
3.80
q
−−−
12
A
_
_
GENERIC
SIDE VIEW
MARKING DIAGRAM*
DETAIL A
1
8X
b
A B
XXXXXX
AYWZZ
0.10
0.05
C
c
e/2
e
L
1
4
XXXXXX =
Specific Device Code
A
Y
= Assembly Location
=
Y
e
ar
K
RECOMMENDED
SOLDERING FOOTPRINT*
W
ZZ
= Work Week
= Lot Traceability
E2
2X
PIN 5
M
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “
G
”,
may or may not be present. Some products
may not follow the Generic Marking.
(EXPOSED PAD)
L1
0.495
4.560
2X
1.530
D2
G
2X
BOTTOM VIEW
0.475
3.200
1.330
4.530
STYLE 1:
STYLE 2:
PIN 1.
ANODE
2. ANODE
2X
0.905
PIN 1.
SOURCE
2. SOURCE
3. SOURCE
4. GATE
1
3. ANODE
4. NO
CONNECT
5. CATHODE
0.965
5. DRAIN
4X
1.000
1.270
PITCH
4X
0.750
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting
T
e
chniques Reference Manual, SOLDERRM/D.
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions
are uncontrolled
except when stamped
“CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON14036D
DFN5 5×6, 1.27P (SO−8FL)
PAGE 1 OF 1
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