onsemi-NVMFS5844NLT1G
| Part # | onsemi-NVMFS5844NLT1G |
Download  | onsemi-NVMFS5844NLT1G |
NTMFS5844NL,
NVMFS5844NL
N-Channel
60
V
,
6
1 A, 12 m
W
Features
•
Small Footprint (5×6 mm) for Compact Design
•
Low R
to Minimize Conduction Losses
DS(on)
•
Low Q
and Capacitance to Minimize Driver Losses
V
R
MAX
I MAX
D
G
(BR)DSS
DS(ON)
•
NVMFS5844NLWF
−
Wettable Flanks Product
12 m
W
@ 10 V
16 m
W
@ 4.5 V
60 V
61 A
•
NVMFS Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC
−
Q101
Qualified and PPAP Capable
D (5)
•
These Devices are Pb
−
Free and are RoHS Compliant
MAXIMUM RATINGS
(T =
25
°
C unless otherwise noted)
J
Parameter
Drain
−
to
−
Source Voltage
Symbol
Value
60
Unit
V
V
DSS
G (4)
Gate
−
to
−
Source Voltage
V
“
20
61
V
GS
Continuous Drain Cur-
T
= 25
°
C
I
A
mb
D
S (1,2,3)
N
−
CHANNEL MOSFET
rent R
Y
J
−
mb
T =
100
°
C
mb
43
Steady
State
Power Dissipation
T
mb
= 25
°
C
P
107
54
W
A
D
R
Y
J
−
mb
T
mb
= 100
°
C
MARKING
DIAGRAM
Continuous Drain Cur-
T =
25
°
C
I
11.2
A
D
rent R
q
JA
D
T =
100
°
C
A
8.0
Steady
State
1
S
S
S
G
D
D
Power Dissipation
T =
25
°
C
P
3.7
1.8
247
80
W
A
D
DFN5
XXXXXX
AYWZZ
R
q
JA
T =
100
°
C
A
(SO
−
8FL)
CASE 488AA
STYLE 1
Pulsed Drain Current
T =
25
°
C, t
= 10
m
s
I
A
A
A
p
DM
I
DmaxPkg
D
Current Limited by Package
T =
25
°
C
A
A
Y
= Assembly Location
=
Y
e
ar
Operating Junction and Storage
T
e
mperature
T , T
−
55 to
°
C
J
stg
175
W
ZZ
= Work Week
= Lot Traceability
Source Current (Body Diode)
I
S
60
48
A
Single Pulse Drain
−
to
−
Source Avalanche
E
AS
mJ
Energy (T
= 25
°
C, V
= 50
V
, V
=
1
0
V
,
J
DD
GS
I
= 31 A, L = 0.1 mH, R
= 25
W
)
ORDERING INFORMATION
L(pk)
G
See detailed ordering, marking and shipping information in the
Lead
T
e
mperature for Soldering Purposes
(1/8
″
from case for 10 s)
T
L
260
°
C
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
THERMAL RESISTANCE MAXIMUM RATINGS
Parameter
Symbol
Value
Unit
Junction
−
to
−
Mounting Board (top)
−
Steady
R
1.4
°
C/W
Y
J
−
mb
R
41
q
JA
1. The
entire application environment impacts the thermal resistance values shown,
they are not constants and are only valid for the particular conditions noted.
2. Psi
(
Y
) is used as required per JESD51
−
12 for packages in which
substantially less than 100% of the heat flows to single case surface.
©
Semiconductor Components Industries, LLC, 2013
1
Publication Order Number:
May, 2019
−
Rev. 5
NTMFS5844NL/D
NTMFS5844NL, NVMFS5844NL
2
3. Surface
−
mounted on FR4 board using a 650 mm
, 2 oz. Cu pad.
4. Maximum
current for pulses as long as 1 second is higher but is dependent
on pulse duration and duty cycle.
ELECTRICAL CHARACTERISTICS
(T =
25
°
C unless otherwise specified)
J
Parameter
Symbol
Test Condition
Min
Typ
Max
Unit
OFF CHARACTERISTICS
Drain
−
to
−
Source Breakdown Voltage
V
V
GS
= 0
V
, I
=
2
50
m
A
60
V
(BR)DSS
D
Drain
−
to
−
Source Breakdown Voltage
T
e
mperature Coefficient
V
/
57
(BR)DSS
mV/
°
C
T
J
Zero Gate Voltage Drain Current
I
V
= 0
V
,
T =
25
°
C
1
DSS
GS
DS
J
V
= 60 V
m
A
T =
125
°
C
J
100
100
Gate
−
to
−
Source Leakage Current
Gate Threshold Voltage
I
V
= 0
V
, V
=
GS
20 V
nA
GSS
DS
V
V
= V
, I
= 250
m
A
1.5
2.3
V
GS(TH)
GS
DS
D
Negative Threshold
T
e
mperature Coefficient
Drain
−
to
−
Source On Resistance
V
/T
6.2
10.2
13
mV/
°
C
GS(TH)
J
R
V
= 10 V
I
I
= 10 A
= 10 A
12
16
DS(on)
GS
D
m
W
V
GS
= 4.5 V
D
Forward Transconductance
g
FS
V
DS
= 5
V
, I
=
1
0 A
27
S
D
CHARGES, CAPACITANCES & GATE RESISTANCE
Input Capacitance
C
1460
150
96
ISS
Output Capacitance
C
OSS
C
RSS
V
= 0
V
, f = 1
M
Hz, V
= 25 V
pF
nC
GS
DS
Reverse Transfer Capacitance
T
o
tal Gate Charge
Q
G(TOT)
G(TOT)
V
GS
= 10
V
, V
=
4
8 V; I
= 10 A
30
DS
D
T
o
tal Gate Charge
Q
15
Threshold Gate Charge
Gate
−
to
−
Source Charge
Gate
−
to
−
Drain Charge
Plateau Voltage
Q
1.0
4.0
8.0
3.0
0.62
G(TH)
Q
V
GS
= 4.5
V
, V
=
4
8 V; I
= 10 A
GS
GD
GP
DS
D
Q
V
V
Gate Resistance
R
W
G
Turn
−
On Delay Time
Rise Time
t
12
25
20
10
d(ON)
t
r
V
= 4.5
V
, V
=
4
8
V
,
DS
GS
D
ns
V
I
= 10 A, R
= 2.5
W
G
Turn
−
Off Delay Time
Fall Time
t
d(OFF)
t
f
DRAIN
−
SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
V
T =
25
°
C
0.79
0.65
19
1.2
SD
RR
J
V
S
= 0
V
,
= 10 A
GS
I
T =
125
°
C
J
Reverse Recovery Time
Charge Time
t
t
a
13
ns
V
= 0
V
,
d
IS/dt = 100 A/
m
s,
GS
I
S
= 10 A
Discharge Time
t
b
6.0
15
Reverse Recovery Charge
Q
nC
RR
5. Pulse
T
e
st: pulse width
v
300
m
s, duty cycle
v
2%.
6. Switching
characteristics are independent of operating junction temperatures.
2
NTMFS5844NL, NVMFS5844NL
TYPICAL CHARACTERISTICS
80
70
60
50
40
30
20
10
0
80
V
GS
= 5 V
4.0 V
3.8 V
V
DS
≥
10 V
10 V
T =
25
°
C
J
70
60
50
40
30
20
10
0
3.6 V
3.4 V
3.2 V
T =
25
°
C
J
3.0 V
2.8 V
T =
125
°
C
J
T =
−
55
°
C
J
0
1
2
3
4
5
1
2
3
4
5
V
DS
, DRAIN
−
TO
−
SOURCE VOLTAGE (V)
V
GS
, GATE
−
TO
−
SOURCE VOLTAGE (V)
Figure 1. On
−
Region Characteristics
Figure 2. Transfer Characteristics
0.030
0.025
0.020
0.015
0.010
0.005
0.016
0.014
0.012
0.010
0.008
I
= 10 A
D
T =
25
°
C
T =
25
°
C
J
J
V
= 4.5 V
GS
V
GS
= 10 V
2
4
6
8
10
12
5
10
15
20
25
30
35
40
V
GS
, GATE
−
TO
−
SOURCE VOLTAGE (V)
I ,
DRAIN CURRENT (A)
D
Figure 3. On
−
Resistance vs. Gate
−
to
−
Source
Figure 4. On
−
Resistance vs. Drain Current and
Voltage
Gate Voltage
2.5
2
100,000
10,000
1,000
100
V
= 0 V
GS
V
I
= 10 V
= 10 A
GS
D
T =
150
°
C
J
1.5
1
T =
125
°
C
J
0.5
−
50
−
25
0
25
50
75
100 125 150 175
10
20
V ,
DRAIN
−
TO
−
SOURCE VOLTAGE (V)
DS
30
40
50
60
T , JUNCTION TEMPERATURE (
°
C)
J
Figure 5. On
−
Resistance Variation with
Figure 6. Drain
−
to
−
Source Leakage Current
Temperature
vs. Voltage
3
NTMFS5844NL, NVMFS5844NL
TYPICAL CHARACTERISTICS
10
1800
1600
1400
1200
1000
800
600
400
200
0
Q
T
V
= 0 V
GS
T =
25
°
C
J
8
6
4
2
0
C
iss
Q
gd
Q
gs
V
DS
= 48 V
C
oss
I
D
= 10 A
T =
25
°
C
J
C
rss
0
10
20
30
40
50
60
0
5
10
15
20
25
30
DRAIN
−
TO
−
SOURCE VOLTAGE (V)
Q ,
TOTAL GATE CHARGE (nC)
g
Figure 7. Capacitance Variation
Figure 8. Gate
−
to
−
Source Voltage vs. Total
Charge
40
30
20
10
0
1000
100
10
V
= 48 V
= 10 A
= 4.5 V
DD
V
= 0 V
GS
I
D
T =
25
°
C
J
V
GS
t
d(off)
t
f
t
r
t
d(on)
1
1
10
R ,
GATE RESISTANCE (
W
)
100
0.5
0.6
, SOURCE
−
TO
−
DRAIN VOLTAGE (V)
SD
0.7
0.8
0.9
1.0
V
G
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance
Figure 10. Diode Forward Voltage vs. Current
1000
100
10
50
40
30
20
10
0
V
= 10 V
GS
Single Pulse
= 25
°
C
T
C
10
m
s
100
m
s
1 ms
10 ms
dc
1
R
Limit
DS(on)
Thermal Limit
Package Limit
0.1
0.1
1
10
100
25
50
75
100
125
150
175
V
DS
, DRAISN VOLTAGE (V)
T , STARTING JUNCTION TEMPERATURE (
°
C)
J
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
Figure 12. Maximum Avalanche Energy vs.
Starting Junction Temperature
4
NTMFS5844NL, NVMFS5844NL
TYPICAL CHARACTERISTICS
100
10
Duty Cycle = 0.5
0.2
0.1
0.05
1
0.02
0.01
0.1
0.01
Single Pulse
0.000001
0.00001
0.0001
0.001
0.01
0.1
1
10
100
1000
PULSE TIME (sec)
Figure 13. Thermal Response
DEVICE ORDERING INFORMATION
Device
†
Marking
Package
Shipping
NTMFS5844N
L
T
1G
5844NL
V5844L
5844LW
V5844L
5844LW
DFN5
1500 /
T
a
pe & Reel
1500 /
T
a
pe & Reel
1500 /
T
a
pe & Reel
5000 /
T
a
pe & Reel
5000 /
T
a
pe & Reel
(Pb
−
Free)
NVMFS5844N
L
T
1G
NVMFS5844N
L
W
FT1G
NVMFS5844N
L
T
3G
NVMFS5844N
L
W
FT3G
DFN5
(Pb
−
Free)
DFN5
(Pb
−
Free)
DFN5
(Pb
−
Free)
DFN5
(Pb
−
Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our
T
a
pe and Reel Packaging
Specifications Brochure, BRD8011/D.
5
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
DFN5 5×6, 1.27P
(SO−8FL)
CASE 488AA
ISSUE N
1
SCALE 2:1
2 X
DATE 25 JUN 2018
NOTES:
1. DIMENSIONING
AND TOLERANCING PER
ASME Y14.5M, 1994.
0.20
C
2. CONTROLLING
DIMENSION: MILLIMETER.
3. DIMENSION
D1 AND E1 DO NOT INCLUDE
MOLD FLASH PROTRUSIONS OR GATE
BURRS.
D
A
2
B
E
2 X
D1
MILLIMETERS
0.20
C
DIM
A
A1
b
c
D
D1
D2
E
E1
E2
e
G
K
L
L1
M
MIN
0.90
0.00
0.33
0.23
5.00
4.70
3.80
6.00
5.70
3.45
NOM
1.00
−−−
0.41
0.28
5.15
4.90
4.00
6.15
MAX
1.10
0.05
0.51
0.33
5.30
5.10
4.20
6.30
6.10
3.85
4 X
q
E1
2
c
A1
5.90
3.65
1
2
3
4
1.27 BSC
0.575
1.35
0.575
0.125 REF
3.40
0.51
1.20
0.51
0.71
1.50
0.71
TOP VIEW
C
SEATING
DETAIL A
PLANE
0.10
0.10
C
C
3.00
0
3.80
q
−−−
12
A
_
_
GENERIC
SIDE VIEW
MARKING DIAGRAM*
DETAIL A
1
8X
b
A B
XXXXXX
AYWZZ
0.10
0.05
C
c
e/2
e
L
1
4
XXXXXX =
Specific Device Code
A
Y
= Assembly Location
=
Y
e
ar
K
RECOMMENDED
SOLDERING FOOTPRINT*
W
ZZ
= Work Week
= Lot Traceability
E2
2X
PIN 5
M
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “
G
”,
may or may not be present. Some products
may not follow the Generic Marking.
(EXPOSED PAD)
L1
0.495
4.560
2X
1.530
D2
G
2X
BOTTOM VIEW
0.475
3.200
1.330
4.530
STYLE 1:
STYLE 2:
PIN 1.
ANODE
2. ANODE
2X
0.905
PIN 1.
SOURCE
2. SOURCE
3. SOURCE
4. GATE
1
3. ANODE
4. NO
CONNECT
5. CATHODE
0.965
5. DRAIN
4X
1.000
1.270
PITCH
4X
0.750
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting
T
e
chniques Reference Manual, SOLDERRM/D.
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions
are uncontrolled
except when stamped
“CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON14036D
DFN5 5×6, 1.27P (SO−8FL)
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
©
Semiconductor Components Industries, LLC, 2018
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent
coverage may be accessed at
www.onsemi.com/site/pdf/Patent
−
Marking.pdf
. ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such
claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This
literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMEN
T
:
TECHNICAL SUPPORT
North American Technical Support:
Voice Mail: 1 800
−
282
−
9855
T
o
ll Free USA/Canada
Phone: 011 421 33 790 2910
Europe, Middle East and Africa Technical Support:
Phone: 00421 33 790 2910
For additional information, please contact your local Sales Representative
◊
