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ypical” parameters which may be provided in
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MOSFET

– Powe
r
,
S
ingle  
N-Channel  
40
V
,
1
.1 m
W
, 277 A  
NVMTS1D1N04C  
Features  
•
Small Footprint (8×8 mm) for Compact Design  
•
Low R  
to Minimize Conduction Losses  
DS(on)  
•
Low Q
 
and Capacitance to Minimize Driver Losses  
G
•
New Power 88 Package  
V
R
MAX  
I MAX  
D
(BR)DSS  
DS(ON)  
•
AEC
−
Q101 Qualified and P
P
A
P Capable  
•
These Devices are Pb
−
Free and are RoHS Compliant  
40 V  
1.1 m
W
@ 10 V  
277 A  
MAXIMUM RATINGS
(T =
 
25
°
C unless otherwise noted)  
J
D (5
−
8)  
Parameter  
Drain
−
to
−
Source Voltage  
Symbol  
Value  
40  
Unit  
V
V
DSS  
Gate
−
to
−
Source Voltage  
V
20  
V
GS  
G (1)  
Continuous Drain  
Current R  
T
= 25
°
C  
= 100
°
C  
= 25
°
C  
I
277  
196  
153  
76.5  
48.8  
34.5  
4.7  
A
C
D
q
JC  
T
C
Steady  
State  
S (2
−
4)  
N
−
CHANNEL MOSFET  
Power Dissipation  
T
C
P
W
A
D
R
q
JC  
T
C
= 100
°
C  
Continuous Drain  
Current R  
T =
 
25
°
C  
A
I
D
MARKING  
DIAGRAM  
q
JA  
T =
 
100
°
C  
A
Steady  
State  
Power Dissipation  
T =
 
25
°
C  
A
P
W
D
R
q
JA  
T =
 
100
°
C  
A
2.4  
XXXXXXXX  
XXXXXXXX  
AWLYWW  
DFNW8  
CASE 507AP  
Pulsed Drain Current  
T =
 
25
°
C, t
 
= 10
m
s  
I
DM  
900  
A
A
p
Operating Junction and Storage
T
e
mperature  
Range  
T , T  
−
55 to  
+175  
°
C  
J
stg  
Source Current (Body Diode)  
I
128  
721  
A
S
XXXX = Specific Device Code  
= Assembly Location  
WL =
 
Wafer Lot Code  
=
Y
ear Code  
A
Single Pulse Drain
−
to
−
Source Avalanche  
E
AS  
mJ  
Energy (I  
= 22 A)  
L(pk)  
Y
Lead
T
e
mperature for Soldering Purposes  
(1/8
″
from case for 10 s)  
T
260  
°
C  
L
WW =
 
Work Week Code  
Stresses exceeding those listed in the Maximum Ratings table may damage the  
device. If any of these limits are exceeded, device functionality should not be  
assumed, damage may occur and reliability may be affected.  
ORDERING INFORMATION  
See detailed ordering, marking and shipping information in the  
package dimensions section on p

THERMAL RESISTANCE MAXIMUM RATINGS  
Parameter  
Symbol  
Value  
0.98  
Unit  
Junction
−
to
−
Case
−
Steady State  
Junction
−
to
−
Ambient
−

R
°
C/W  
q
JC  
R
31.6  
q
JA  
1. The
 
entire application environment impacts the thermal resistance values shown,  
they are not constants and are only valid for the particular conditions noted.  
2
2. Surface
−
mounted on FR4 board using a 650 mm
 
, 2 oz. Cu pad.  
3. Maximum
 
current for pulses as long as 1 second is higher but is dependent  
on pulse duration and duty cycle.  
©
Semiconductor Components Industries, LLC, 2018  
1
Publication Order Number:  
October, 2020
−
Rev. 0  
NVMTS1D1N04C/D  
 

NVMTS1D1N04C  
ELECTRICAL CHARACTERISTICS
(T =
 
25
°
C unless otherwise specified)  
J
Parameter  
Symbol  
Test Condition  
Min  
Typ  
Max  
Unit  
OFF CHARACTERISTICS  
Drain
−
to
−
Source Breakdown Voltage  
V
V
GS  
= 0
V
, I
 
=
2
50
m
A  
40  
V
(BR)DSS  
D
Drain
−
to
−
Source Breakdown Voltage  
T
e
mperature Coefficient  
V
/
21  
(BR)DSS  
mV/
°
C  
T
J
Zero Gate Voltage Drain Current  
I
V
= 0
V
,  
T =
 
25
°
C  
10  
DSS  
GS  
DS  
J
V
= 40 V  
m
A  
T =
 
125
°
C  
J
250  
100  
Gate
−
to
−
Source Leakage Current  
ON CHARACTERISTICS

Gate Threshold Voltage  
I
V
= 0
V
, V  
=
GS  
20 V  
nA  
GSS  
DS  
V
V
= V
 
, I
 
= 210
m
A  
2.0  
2.8  
−
7.4  
0.87  
136  
4.0  
1.1  
V
mV/
°
C  
m
W  
S
GS(TH)  
GS  
DS  
D
Threshold
T
e
mperature Coefficient  
Drain
−
to
−
Source On Resistance  
Forward Transconductance  
V
/T  
GS(TH) J  
R
V
GS  
= 10 V  
I =
 
50 A  
D
DS(on)  
g
FS  
V
= 5
V
, I
 
=
5
0 A  
DS D  
CHARGES, CAPACITANCES & GATE RESISTANCE  
Input Capacitance  
C
5410  
3145  
82  
ISS  
Output Capacitance  
C
OSS  
C
RSS  
V
V
= 0
V
, f = 1
M
Hz, V
 
= 25 V  
pF  
GS  
DS  
Reverse Transfer Capacitance  
T
o
tal Gate Charge  
Q
86  
G(TOT)  
Threshold Gate Charge  
Gate
−
to
−
Source Charge  
Gate
−
to
−
Drain Charge  
Plateau Voltage  
Q
10  
G(TH)  
nC  
V
Q
24  
= 10
V
, V
 
=
2
0 V; I
 
= 50 A  
GS  
GD  
GP  
GS  
DS  
D
Q
V
24  
4.8  
SWITCHING CHARACTERISTICS

Turn
−
On Delay Time  
t
23  
27  
60  
32  
d(ON)  
Rise Time  
t
r
V
= 10
V
, V
 
=
2
0
V
,  
DS  
GS  
D
ns  
V
I
= 50 A, R
 
= 6
W  
G
Turn
−
Off Delay Time  
t
d(OFF)  
Fall Time  
t
f
DRAIN
−
SOURCE DIODE CHARACTERISTICS  
Forward Diode Voltage  
V
T =
 
25
°
C  
0.79  
0.65  
81  
1.2  
SD  
J
V
S
= 0
V
,  
GS  
I
= 50 A  
T =
 
125
°
C  
J
Reverse Recovery Time  
Charge Time  
t
RR  
t
43  
ns  
a
V
= 0
V
,
d
IS/dt = 100 A/
m
s,  
GS  
I
S
= 50 A  
Discharge Time  
t
38  
b
Reverse Recovery Charge  
Q
100  
nC  
RR  
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product  
performance may not be indicated by the Electrical Characteristics if operated under different conditions.  
4. Pulse
 
T
e
st: pulse width
v
300
m
s, duty cycle
v
2%.  
5. Switching
 
characteristics are independent of operating junction temperatures.  
DEVICE ORDERING INFORMATION  
†
Device  
Marking  
Package  
Shipping  
NVMTS1D1N04CTXG  
1D1N04C  
POWER 88  
(Pb
−
Free)  
3000 /
T
a
pe & Reel  
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our
T
a
pe and Reel Packaging  
Specifications Brochure, BRD8011/D.  
2
 

NVMTS1D1N04C  
TYPICAL CHARACTERISTICS  
600  
500  
400  
300  
200  
600  
V
GS  
= 10 V to 8 V  
V
DS  
= 5 V  
T =
 
25
°
C  
J
500  
7.0 V  
400  
300  
200  
6.0 V  
5.0 V  
100  
0
100  
0
T =
 
175
°
C  
J
T =
 
−
55
°
C  
J
0
0.5  
1.0  
1.5  
2.0  
2.5  
3.0  
3
4
5
6
7
8
V
DS  
, DRAIN
−
TO
−
SOURCE VOLTAGE (V)  
V
GS  
, GATE
−
TO
−
SOURCE VOLTAGE (V)  
Figure 1. On
−
Region Characteristics  
Figure 2. Transfer Characteristics  
12  
10  
8
2.0  
1.6  
1.2  
0.8  
I
D
= 50 A  
T =
 
25
°
C  
J
T =
 
25
°
C  
J
6
V
GS  
= 10 V  
T =
 
175
°
C  
J
4
0.4  
0
2
0
3
4
5
6
7
8
9
10  
10 20  
30  
40  
50  
60  
70  
80  
90 100  
V
GS  
, GATE
−
TO
−
SOURCE VOLTAGE (V)  
I ,
 
DRAIN CURRENT (A)  
D
Figure 3. On
−
Resistance vs. Gate
−
to
−
Source  
Figure 4. On
−
Resistance vs. Drain Current and  
Voltage  
Gate Voltage  
2.0  
1000  
100  
10  
V
= 10 V  
= 50 A  
GS  
1.8  
1.6  
1.4  
I
D
T =
 
175
°
C  
J
T =
 
150
°
C  
J
T =
 
125
°
C  
J
1.2  
1.0  
T =
 
85
°
C  
J
1
0.8  
0.6  
0.1  
−
75
−
50
−
25  
0
25 50 75
 
100 125 150 175 200  
5
10  
15  
20  
25  
30  
35  
40  
T , JUNCTION TEMPERATURE (
°
C)  
J
V
, DRAIN
−
TO
−
SOURCE VOLTAGE (V)  
DS  
Figure 5. On
−
Resistance Variation with  
Figure 6. Drain
−
to
−
Source Leakage Current  
Temperature  
vs. Voltage  
3

NVMTS1D1N04C  
TYPICAL CHARACTERISTICS  
10,000  
10  
C
ISS  
Q
G(TOT)  
9
8
7
C
OSS  
1000  
100  
10  
6
5
4
3
Q
Q
GD  
GS  
C
RSS  
V
= 20 V  
DS  
2
V
= 0 V  
T =
 
25
°
C  
GS  
J
1
0
f = 1 MHz  
I
D
= 50 A  
0
10  
20  
30  
40  
0
25  
50  
75  
100  
V
DS  
, DRAIN
−
TO
−
SOURCE VOLTAGE (V)  
Q ,
 
TOTAL GATE CHARGE (nC)  
G
Figure 7. Capacitance Variation  
Figure 8. Gate
−
to
−
Source Voltage vs. Total  
Charge  
300  
100  
1000  
100  
10  
V
= 0 V  
t
t
GS  
d(off)  
t
f
10  
1
t
r
d(on)  
0.1  
T =
 
175
°
C  
J
V
V
= 10 V  
= 20 V  
GS  
0.01  
DS  
= 50 A  
I
D
T =
 
25
°
C  
T =
 
−
55
°
C  
J
J
0.001  
1
10  
R ,
 
GATE RESISTANCE (
W
)  
100  
0
0.2  
0.4  
0.6  
0.8  
1.0  
1.2  
V
, SOURCE
−
TO
−
DRAIN VOLTAGE (V)  
G
SD  
Figure 9. Resistive Switching Time Variation  
vs. Gate Resistance  
Figure 10. Diode Forward Voltage vs. Current  
1000  
100  
400  
100  
10
m
s  
T
= 25
°
C  
J(initial)  
T
C
= 25
°
C  
Single Pulse  
≤
10 V  
V
GS  
10  
1
T
= 150
°
C  
J(initial)  
10  
1
R
Limit  
DS(on)  
0.5 ms  
1 ms  
Thermal Limit  
Package Limit  
10 ms  
0.1  
1
10  
100  
0.001 0.01  
0.1  
1
10  
100  
1000  
V
DS  
, DRAIN
−
TO
−
SOURCE VOLTAGE (V)  
t ,
 
TIME IN AVALANCHE (mS)  
AV  
Figure 11. Maximum Rated Forward Biased  
Safe Operating Area  
Figure 12. I

PEAK

vs. Time in Avalanche  
4

NVMTS1D1N04C  
TYPICAL CHARACTERISTICS  
100  
Duty Cycle = 0.5  
10 0.2  
0.1  
0.05  
0.02  
0.01  
1
0.1  
0.01  
0.001  
Single Pulse  
0.0001  
0.0000001 0.000001  
0.00001  
0.0001  
0.001  
0.01  
0.1  
1
10  
100  
1000  
t, RECTANGULAR PULSE DURATION (s)  
Figure 13. Thermal Characteristics  
5

NVMTS1D1N04C  
PACKAGE DIMENSIONS  
DFNW8 8.3×8.4, 2P  
CASE 507AP  
ISSUE C  
6

NVMTS1D1N04C  
ON Semiconductor and  
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.  
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent  
coverage may be accessed at

. ON Semiconductor reserves the right to make changes without further notice to any products herein.  
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability  
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.  
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,  
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or  
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer  
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not  
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification  
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized  
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and  
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such  
claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This  
literature is subject to all applicable copyright laws and is not for resale in any manner.  
PUBLICATION ORDERING INFORMATION  
LITERATURE FULFILLMEN
T
:  
Email Requests to:

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−
282
−
9855
T
o
ll Free USA/Canada  
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