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. “
T
ypical” parameters which may be provided in
onsemi
data sheets and/
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does not convey any license under any of its intellectual property rights nor the rights of others.
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products are not designed, intended, or authorized
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N-Channel, DFNW8
150
V
,
6
.4 m
W
, 128 A
NVMTS6D0N15MC
Features
•
Small Footprint (8×8 mm) for Compact Design
•
Low R
to Minimize Conduction Losses
DS(on)
V
R
MAX
I MAX
D
(BR)DSS
DS(ON)
•
Low Q
and Capacitance to Minimize Driver Losses
G
150 V
6.4 m
W
@ 10 V
128 A
•
AEC
−
Q101 Qualified and P
P
A
P Capable
•
These Devices are Pb
−
Free, Halogen Free/BFR Free and are RoHS
Compliant
D (5, 6, 7, 8)
MAXIMUM RATINGS
(T =
25
°
C unless otherwise noted)
J
Symbol
Parameter
Drain
−
to
−
Source Voltage
Value
150
20
Unit
V
G (1)
V
DSS
V
GS
Gate
−
to
−
Source Voltage
V
S (2, 3, 4)
I
D
Continuous Drain
Steady
State
T
C
= 25
°
C
128
A
N
−
CHANNEL MOSFET
Current R
(Note 2)
q
JC
P
Power Dissipation
237
90
W
A
D
R
q
JC
I
D
Continuous Drain
Current R
(Note 2)
Steady
State
T
C
= 100
°
C
q
JC
P
I
Power Dissipation
119
18
W
A
D
T
o
p
Bottom
R
q
JC
DFNW8 8.3×8.4, 2P
PQFN88
Continuous Drain
Steady
State
T =
25
°
C
A
D
Current R
q
CASE 507AP
JA
P
Power Dissipation
5
W
A
D
MARKING DIAGRAM
R
q
JA
I
D
Continuous Drain
Current R
Steady T
= 100
°
C
13
A
State
q
JA
6D0N15MC
AWLYWW
P
D
Power Dissipation
2.4
W
R
q
JA
I
Pulsed Drain Current
T =
25
°
C, t
= 10
m
s
900
A
6D0N15MC = Specific Device Code
= Assembly Location
WL =
Wafer Lot Code
DM
A
p
A
T , T
J
Operating Junction and Storage
T
e
mperature
Range
−
55 to
175
°
C
stg
Y
=
Y
ear Code
W
= Work Week Code
I
S
Source Current (Body Diode)
198
A
E
AS
Single Pulse Drain
−
to
−
Source Avalanche
2376
mJ
Energy (I
= 10.2 A
)
L
pk
ORDERING INFORMATION
T
Lead
T
e
mperature Soldering Reflow for
260
°
C
†
L
Device
NVMTS6D0N15MC
Package
Shipping
Soldering Purposes (1/8
″
from case for 10 s)
DFNW8
PQFN88
(Pb
−
Free)
3000 /
T
a
pe &
Reel
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
1. Surface
−
mounted on FR4 board using 1 in
pad size, 1 oz Cu pad.
2. The
entire application environment impacts the thermal resistance values shown,
they are not constants and are only valid for the particular conditions noted
2
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our
T
a
pe and Reel Packaging Specifications
Brochure, BRD8011/D.
©
Semiconductor Components Industries, LLC, 2020
1
Publication Order Number:
January, 2021
−
Rev. 0
NVMTS6D0N15MC/D
NVMTS6D0N15MC
THERMAL RESISTANCE RATINGS
Symbol
Parameter
Max
0.63
31.6
Unit
°
C/W
R
q
JC
JA
R
q
ELECTRICAL CHARACTERISTICS
(T =
25
°
C unless otherwise noted)
J
Symbol
Parameter
Test Condition
Min
Typ
Max
Unit
OFF CHARACTERISTICS
V
Drain
−
to
−
Source Breakdown Voltage
V
= 0
V
, I
=
2
50
m
A
150
−
−
−
V
(BR)DSS
GS
D
V
/ T
Drain
−
to
−
Source Breakdown Voltage
T
e
mperature Coefficient
I =
250
m
A, ref to 25
°
C
D
−
58.67
mV/
°
C
(BR)DSS
J
I
Zero Gate Voltage Drain Current
V
V
= 0 V
,
T =
25
°
C
−
−
−
−
−
−
1
m
A
m
A
nA
DSS
GS
DS
J
= 120 V
T =
125
°
C
J
10
100
I
Gate
−
to
−
Source Leakage Current
V
= 0
V
, V
=
GS
20 V
GSS
DS
GS
V
Gate Threshold Voltage
V
= V
, I
= 379
m
A
2
.
5
−
3.6
−
9.14
4.6
4.5
−
V
mV/
°
C
m
W
S
GS(TH)
DS
D
V
/ T
J
Negative Threshold
T
e
mperature Coefficient
Drain
−
to
−
Source On Resistance
Forward Transconductance
Gate
−
Resistance
I =
250
m
A, ref to 25
°
C
D
GS(TH)
R
V
= 10 V, I
= 69 A
−
6.4
−
DS(on)
GS
DS
D
g
V
= 5
V
, I
= 69 A
−
127
1.1
FS
D
R
T =
25
°
C
A
−
−
W
G
CHARGES & CAPACITANCES
C
Input Capacitance
V
V
= 0
V
, f = 1
M
Hz,
= 75V
−
−
−
−
−
−
−
−
4815
1482
9.7
58
−
−
−
−
−
−
−
−
pF
nC
ISS
GS
DS
C
Output Capacitance
Reverse Transfer Capacitance
T
o
tal Gate Charge
OSS
RSS
C
Q
V
D
= 10
V
, V
=
7
5
V
,
= 69 A
G(TOT)
GS DS
I
Q
Threshold Gate Charge
Gate
−
to
−
Source Charge
Gate
−
to
−
Drain Charge
Output Charge
34
G(TH)
Q
26
GS
GD
Q
8
Q
V
V
= 0
V
, V
=
7
5 V
173
nC
ns
OSS
GS
DS
t
Turn
−
On Delay Time
Rise Time
= 10
V
, V
=
75 V
,
−
−
−
−
30
7
−
−
−
−
d(ON)
GS
DS
I
= 69 A, R
= 6
W
D
G
t
r
t
Turn
−
Off Delay Time
Fall Time
38
6
d(OFF)
t
f
DRAIN
−
SOURCE DIODE CHARACTERISTICS
V
Forward Diode Voltage
V
S
= 0
V
,
T =
25
°
C
−
−
−
−
−
−
0.87
0.70
72
1.2
−
V
SD
GS
J
I
= 69 A
T =
125
°
C
J
t
Reverse Recovery Time
Charge Time
V
S
= 0
V
,
d
I
/dt = 100 A/
m
s,
= 69 A
−
ns
RR
GS
S
I
t
t
49
−
a
Discharge Time
23
−
b
Q
Reverse Recovery Charge
125
−
nC
RR
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
3. Switching
characteristics are independent of operating junction temperatures
2
NVMTS6D0N15MC
TYPICAL CHARACTERISTICS
140
120
100
80
140
6.0 V
V
DS
= 5 V
120
100
80
V
GS
= 10 V to 6.5 V
5.5 V
5.0 V
60
60
T =
25
°
C
J
40
40
20
0
20
0
T =
175
°
C
T =
−
55
°
C
J
J
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
, DRAIN
−
TO
−
SOURCE VOLTAGE (V)
0
1
2
3
4
5
6
7
8
9
10
V
DS
V
, GATE
−
TO
−
SOURCE VOLTAGE (V)
GS
Figure 1. On
−
Region Characteristics
Figure 2. Transfer Characteristics
70
60
50
40
30
20
8
7
T =
25
°
C
J
T =
25
°
C
D
J
I
= 69 A
6
5
4
3
V
GS
= 10 V
10
0
2
1
5.0 5.5
6.0 6.5 7.0 7.5 8.0 8.5 9.0 9.5 10
, GATE
−
TO
−
SOURCE VOLTAGE (V)
0
20
40
60
80
100
120 140
V
GS
I ,
DRAIN CURRENT (A)
D
Figure 3. On
−
Resistance vs. Gate
−
to
−
Source
Figure 4. On
−
Resistance vs. Drain Current and
Voltage
Gate Voltage
2.5
1M
100K
10K
V
= 10 V
= 69 A
GS
V
GS
= 0 V
I
D
2.0
1.5
T =
175
°
C
J
T =
150
°
C
J
T =
125
°
C
J
1.0
0.5
1K
100
−
50
−
25
0
25
50
75 100
125 150 175
0
25
50
75
100
125
150
T , JUNCTION TEMPERATURE (
°
C)
J
V
, DRAIN
−
TO
−
SOURCE VOLTAGE (V)
DS
Figure 5. On
−
Resistance Variation with
Figure 6. Drain
−
to
−
Source Leakage Current
Temperature
vs. Voltage
3
NVMTS6D0N15MC
TYPICAL CHARACTERISTICS
10K
1K
10
9
Q
G(TOT)
C
ISS
8
7
6
5
4
3
2
Q
Q
GD
GS
C
OSS
100
10
1
V
I
= 75 V
= 69 A
V
= 0 V
DS
GS
C
RSS
T =
25
°
C
D
J
1
0
T =
25
°
C
J
f = 1 MHz
0
25
50
75
100
125
150
0
10
20
30
40
50
60
V
DS
, DRAIN
−
TO
−
SOURCE VOLTAGE (V)
Q ,
TOTAL GATE CHARGE (nC)
G
Figure 7. Capacitance Variation
Figure 8. Gate
−
to
−
Source and
Drain
−
to
−
Source Voltage vs. Total Charge
1K
1K
100
10
V
V
= 10 V
= 75 V
= 69 A
GS
V
GS
= 0 V
DS
I
D
100
t
d(off)
t
d(on)
T =
175
°
C
T =
150
°
C
10
1
J
J
1
t
f
t
r
T =
25
°
C
J
T =
−
55
°
C
J
0.1
1
10
R ,
GATE RESISTANCE (
W
)
100
0.3
0.4
0.5
, SOURCE
−
TO
−
DRAIN VOLTAGE (V)
SD
0.6
0.7
0.8
0.9
1.0
V
G
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance
Figure 10. Diode Forward Voltage vs. Current
1000
100
10
1000
100
T
= 25
°
C
J(initial)
10
m
s
T
C
= 25
°
C
Single Pulse
≤
10 V
0.5 ms
1 ms
10
1
T
= 125
°
C
J(initial)
V
GS
1
R
Limit
DS(on)
10 ms
Thermal Limit
Package Limit
0.1
0.1
1
10
100
1000
0.0001
0.001
0.01
V
DS
, DRAIN
−
TO
−
SOURCE VOLTAGE (V)
TIME IN AVALANCHE (sec)
Figure 11. Safe Operating Area
Figure 12. I
PEAK
vs. Time in Avalanche
4
NVMTS6D0N15MC
TYPICAL CHARACTERISTICS
1
0.1
50% Duty Cycle
20%
10%
5%
2%
1%
0.01
0.001
Single Pulse
0.0001
0.0000001
0.000001
0.00001
0.0001
0.001
0.01
0.1
1
10
PULSE TIME (sec)
Figure 13. Thermal Characteristics
5
NVMTS6D0N15MC
PACKAGE DIMENSIONS
DFNW8 8.3×8.4, 2P
CASE 507AP
ISSUE A
DATE 14 AUG 2018
6
NVMTS6D0N15MC
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent
coverage may be accessed at
www.onsemi.com/site/pdf/Patent
−
Marking.pdf
. ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such
claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This
literature is subject to all applicable copyright laws and is not for resale in any manner.
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