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. “
T
ypical” parameters which may be provided in
onsemi
data sheets and/
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products are not designed, intended, or authorized
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Single N-Channel,
TDFNW8 DUAL COOL
)
150
V
,
4
.45 m
W
, 165 A
NVMTSC4D3N15MC
Features
•
Small Footprint (8×8 mm) for Compact Design
•
Low R
to Minimize Conduction Losses
•
Low Q
and Capacitance to Minimize Driver Losses
DS(on)
V
R
MAX
I MAX
D
(BR)DSS
DS(ON)
G
150 V
4.45 m
W
@ 10 V
165 A
•
AEC
−
Q101 Qualified and P
P
A
P Capable
•
These Devices are Pb
−
Free, Halogen Free/BFR Free and are RoHS
Compliant
D (5, 6, 7, 8)
MAXIMUM RATINGS
(T =
25
°
C unless otherwise noted)
J
Symbol
Parameter
Drain
−
to
−
Source Voltage
Value
150
20
Unit
V
G (1)
V
DSS
S (2, 3, 4)
N
−
CHANNEL MOSFET
V
GS
Gate
−
to
−
Source Voltage
V
I
D
Continuous Drain
Steady
State
T
T
= 25
°
C
165
A
C
Current R
(Note 2)
q
JC
P
D
Power Dissipation
292
117
146
23
W
A
R
q
JC
I
D
Continuous Drain
Current R
(Note 2)
Steady
State
=
C
100
°
C
q
JC
P
I
Power Dissipation
W
A
T
o
p
Bottom
D
R
q
JC
TDFNW8
CASE 507AS
Continuous Drain
Current R
Steady
State
T =
25
°
C
A
D
q
JA
MARKING DIAGRAM
P
Power Dissipation
5
W
A
D
R
q
JA
I
D
Continuous Drain
Current R
Steady
State
T =
16
A
100
°
C
q
JA
P
D
Power Dissipation
3
W
R
q
JA
4D3N15M AWLYW
I
Pulsed Drain Current
T =
25
°
C, t
= 10
m
s
900
A
DM
A
p
4D3N15M = Specific Device Code
= Assembly Location
WL =
Wafer Lot Code
A
T , T
J
Operating Junction and Storage
T
e
mperature
Range
−
55 to
+175
°
C
stg
Y
W
=
Y
ear Code
= Work Week Code
I
S
Source Current (Body Diode)
243
A
E
AS
Single Pulse Drain
−
to
−
Source Avalanche
3390
mJ
Energy (I
= 14.1 A
,)
L
pk
ORDERING INFORMATION
T
Lead
T
e
mperature Soldering Reflow for
260
°
C
L
Soldering Purposes (1/8
″
from case for 10 s)
†
Device
NVMTSC4D3N15MC
Package
TDFNW8 3000
/
T
a
pe &
(Pb
−
Free) Reel
Shipping
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
1. Surface
−
mounted on FR4 board using 1 in
pad size, 1 oz Cu pad.
2. The
entire application environment impacts the thermal resistance values shown,
they are not constants and are only valid for the particular conditions noted
2
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our
T
a
pe and Reel Packaging Specifications
Brochure, BRD8011/D.
©
Semiconductor Components Industries, LLC, 2020
1
Publication Order Number:
December, 2020
−
Rev. 0
NVMTSC4D3N15MC/D
NVMTSC4D3N15MC
THERMAL RESISTANCE RATINGS
Symbol
Parameter
Max
0.5
0.8
28
Unit
°
C/W
R
q
JC
R
q
JC
R
q
JA
ELECTRICAL CHARACTERISTICS
(T =
25
°
C unless otherwise noted)
J
Symbol
Parameter
Test Condition
Min
Typ
Max
Unit
OFF CHARACTERISTICS
V
Drain
*
to
*
Source Breakdown Voltage
V
I
= 0
V
, I
=
2
50
m
A
150
−
−
−
V
(BR)DSS
GS
D
V
/ T
Drain
*
to
*
Source Breakdown Voltage
= 250
m
A, ref to 25
°
C
−
49.84
mV/
°
C
(BR)DSS
J
D
T
e
mperature Coefficient
I
Zero Gate Voltage Drain Current
V
V
= 0 V
,
T =
25
°
C
−
−
−
−
−
−
1
m
A
m
A
nA
DSS
GS
DS
J
= 120 V
T =
125
°
C
J
10
100
I
Gate
*
to
*
Source Leakage Current
V
= 0
V
, V
=
GS
20 V
GSS
DS
GS
V
Gate Threshold Voltage
V
= V
, I
= 521
m
A
2
.
5
−
3.6
−
9.93
3.4
4.5
−
V
GS(TH)
DS
D
V
/ T
J
Negative Threshold
T
e
mperature Coefficient
Drain
*
to
*
Source On Resistance
I =
250
m
A, ref to 25
°
C
D
mV/
°
C
m
W
GS(TH)
R
V
GS
= 10 V, I
= 95 A
−
4.45
DS(on)
D
g
Forward Transconductance
V
= 5
V
, I
= 95 A
−
−
177
1.1
−
−
S
FS
DS
D
R
Gate
−
Resistance
T =
25
°
C
A
W
G
CHARGES & CAPACITANCES
C
Input Capacitance
V
V
= 0
V
, f = 1
M
Hz,
= 75 V
−
−
−
−
−
−
−
−
6514
1750
12.5
79
−
−
−
−
−
−
−
−
pF
nC
ISS
GS
DS
C
Output Capacitance
Reverse Transfer Capacitance
T
o
tal Gate Charge
OSS
RSS
C
Q
V
= 10
V
, V
=
7
5
V
,
= 95 A
G(TOT)
GS DS
I
D
Q
Threshold Gate Charge
Gate
−
to
−
Source Charge
Gate
−
to
−
Drain Charge
Plateau Voltage
21
G(TH)
Q
36
GS
GD
GP
Q
V
11
5.8
GS
t
Turn
*
On Delay Time
Rise Time
V
D
= 10
V
, V
=
75 V
,
−
−
−
−
38
11
48
8
−
−
−
−
ns
d(ON)
GS
DS
I
= 95 A, R
= 6
W
G
t
r
t
Turn
*
Off Delay Time
Fall Time
d(OFF)
t
f
DRAIN
−
SOURCE DIODE CHARACTERISTICS
V
Forward Diode Voltage
V
S
= 0
V
,
T =
25
°
C
−
−
−
−
−
−
0.86
0.80
85
1.2
−
V
SD
GS
J
I
= 95 A
T =
125
°
C
J
t
Reverse Recovery Time
Charge Time
V
S
= 0
V
,
d
I
/dt = 100 A/
m
s,
= 95 A
−
ns
RR
GS
S
I
t
t
58
−
a
Discharge Time
38
−
b
Q
Reverse Recovery Charge
194
nC
RR
−
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
3. Switching
characteristics are independent of operating junction temperatures
2
NVMTSC4D3N15MC
TYPICAL CHARACTERISTICS
176
160
144
128
112
96
176
V
GS
= 10 V to 6.5 V
160
144
128
112
96
V
DS
= 5 V
6.0 V
80
80
64
64
5.5 V
5.0 V
T =
25
°
C
J
48
48
32
32
16
0
16
0
T =
175
°
C
J
T =
−
55
°
C
J
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
, DRAIN
−
TO
−
SOURCE VOLTAGE (V)
0
1
2
3
4
5
6
7
8
9
10
V
DS
V
, GATE
−
TO
−
SOURCE VOLTAGE (V)
GS
Figure 1. On
−
Region Characteristics
Figure 2. Transfer Characteristics
20
18
16
14
12
10
8
6
5
4
3
T =
25
°
C
D
J
T =
25
°
C
J
I
= 95 A
V
GS
= 10 V
6
2
1
4
2
0
5.5 6.0
6.5 7.0 7.5 8.0 8.5
9.0
9.5
10
0
30
60
90
120
150
180 210
V
GS
, GATE
−
TO
−
SOURCE VOLTAGE (V)
I ,
DRAIN CURRENT (A)
D
Figure 3. On
−
Resistance vs. Gate
−
to
−
Source
Figure 4. On
−
Resistance vs. Drain Current and
Voltage
Gate Voltage
2.5
1M
100K
10K
V
= 10 V
= 95 A
GS
I
D
2.0
1.5
T =
175
°
C
J
T =
150
°
C
J
T =
125
°
C
J
1.0
0.5
1K
100
−
50
−
25
0
25
50
75 100
125 150 175
0
30
60
90
120
150
T , JUNCTION TEMPERATURE (
°
C)
J
V
, DRAIN
−
TO
−
SOURCE VOLTAGE (V)
DS
Figure 5. On
−
Resistance Variation with
Figure 6. Drain
−
to
−
Source Leakage Current
Temperature
vs. Voltage
3
NVMTSC4D3N15MC
TYPICAL CHARACTERISTICS
10K
1K
10
C
ISS
Q
9
8
7
6
5
4
3
2
G(TOT)
C
OSS
Q
Q
GD
GS
100
10
1
C
V
I
= 75 V
= 95 A
V
= 0 V
RSS
DS
GS
T =
25
°
C
D
J
1
0
T =
25
°
C
J
f = 1 MHz
0
25
50
75
100
125
150
0
10
20
30
40
50
60
70
80
V
DS
, DRAIN
−
TO
−
SOURCE VOLTAGE (V)
Q ,
TOTAL GATE CHARGE (nC)
G
Figure 7. Capacitance Variation
Figure 8. Gate
−
to
−
Source and
Drain
−
to
−
Source Voltage vs. Total Charge
1K
1K
100
10
V
V
= 10 V
= 75 V
= 95 A
V
GS
= 0 V
GS
DS
I
D
t
r
100
t
d(off)
t
f
t
d(on)
10
1
T =
175
°
C
T =
150
°
C
J
J
1
T =
25
°
C
J
T =
−
55
°
C
J
0.1
1
10
R ,
GATE RESISTANCE (
W
)
100
0.2 0.3
0.4
, SOURCE
−
TO
−
DRAIN VOLTAGE (V)
SD
0.5
0.6
0.7
0.8
0.9
1.0
V
G
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance
Figure 10. Diode Forward Voltage vs. Current
1000
100
10
100
10
1
10
m
s
T
= 25
°
C
J(initial)
T
= 125
°
C
J(initial)
T
= 25
°
C
C
0.5 ms
1 ms
Single Pulse
≤
10 V
V
GS
1
10 ms
R
Limit
DS(on)
Thermal Limit
Package Limit
0.1
0.1
1
10
100
1000
0.0001
0.001
0.01
V
DS
, DRAIN
−
TO
−
SOURCE VOLTAGE (V)
TIME IN AVALANCHE (sec)
Figure 11. Safe Operating Area
Figure 12. I
PEAK
vs. Time in Avalanche
4
NVMTSC4D3N15MC
TYPICAL CHARACTERISTICS
100
10
1
50% Duty Cycle
20%
10%
5%
2%
1%
0.1
0.01
Single Pulse
0.001
0.000001
0.00001
0.0001
0.001
0.01
0.1
1
10
100
1000
PULSE TIME (sec)
Figure 13. Thermal Characteristics
5
NVMTSC4D3N15MC
DUAL COOL
is registered trademark of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the
United States and/or other countries.
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent
coverage may be accessed at
www.onsemi.com/site/pdf/Patent
−
Marking.pdf
. ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such
claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This
literature is subject to all applicable copyright laws and is not for resale in any manner.
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