onsemi-NVS4001NT1G
| Part # | onsemi-NVS4001NT1G |
Download  | onsemi-NVS4001NT1G |
NTS4001N, NVS4001N
MOSFET
– Single,
N-Channel, Small Signal,
SC-70
30
V
,
2
70 mA
Features
V
R
TYP
I Max
D
(BR)DSS
DS(on)
•
Low Gate Charge for Fast Switching
•
Small Footprint
−
30% Smaller than TSOP
−
6
•
ESD Protected Gate
•
AEC
−
Q101 Qualified and PPAP Capable
−
NVS4001N
•
These Devices are Pb
−
Free and are RoHS Compliant
1.0
W
@ 4.0 V
1.5
W
@ 2.5 V
270 mA
30 V
SC
−
70/SOT
−
323 (3 LEADS)
Applications
•
Low Side Load Switch
Gate
1
•
Li
−
Ion Battery Supplied Devices
−
Cell Phones, PDAs, DSC
•
Buck Converters
3
Drain
•
Level Shifts
MAXIMUM RATINGS
(T =
25
°
C unless otherwise stated)
J
Source
2
Parameter
Drain
−
to
−
Source Voltage
Symbol
Value Units
V
DSS
30
20
V
V
(
T
o
p View)
Gate
−
to
−
Source Voltage
V
GS
MARKING DIAGRAM &
Continuous Drain
Steady T
= 25
°
C
I
270
200
330
mA
A
D
3
State
PIN ASSIGNMENT
T =
85
°
C
A
D
Power Dissipation
Steady T
= 25
°
C
P
mW
3
1
A
D
State
2
TD M
G
Pulsed Drain Current
t =10
m
s
I
800
mA
DM
G
SC
−
70 / SOT
−
323
CASE 419
Operating Junction and Storage
T
e
mperature
T , T
−
55 to
150
°
C
J
STG
2
1
STYLE 8
G
S
Source Current (Body Diode)
I
270
260
mA
S
TD
M
G
= Device Code
= Date Code*
= Pb
−
Free Package
Lead
T
e
mperature for Soldering Purposes
(1/8” from case for 10 s)
°
C
T
L
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Surface
mounted on FR4 board using 1 in sq. pad size
(Note: Microdot may be in either location)
*Date Code orientation may vary depending
upon manufacturing location.
(Cu area = 1.127 in sq. [1 oz] including traces).
ORDERING INFORMATION
†
Device
Package
Shipping
SC
−
70
(Pb
−
Free)
NTS4001NT1G
3000 /
T
a
pe & Reel
SC
−
70
(Pb
−
Free)
NVS4001NT1G
3000 /
T
a
pe & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our
T
a
pe and Reel Packaging Specification
Brochure, BRD8011/D.
©
Semiconductor Components Industries, LLC, 2011
1
Publication Order Number:
June, 2019
−
Rev. 5
NTS4001N/D
NTS4001N, NVS4001N
ELECTRICAL CHARACTERISTICS
(T =
25
°
C unless otherwise stated)
J
Parameter
Symbol
Test Condition
Min
Typ
Max
Unit
OFF CHARACTERISTICS
Drain
−
to
−
Source Breakdown Voltage
V
V
GS
= 0
V
, I
= 100
m
A
30
V
(BR)DSS
D
Drain
−
to
−
Source Breakdown Voltage
V
/T
J
60
mV/
°
C
(BR)DSS
T
e
mperature Coefficient
Zero Gate Voltage Drain Current
Gate
−
to
−
Source Leakage Current
Gate Threshold Voltage
I
V
= 0
V
, V
= 30 V
1.0
1.0
m
A
m
A
DSS
GS
DS
I
V
DS
= 0
V
, V
= 10
V
GSS
GS
V
V
GS
= V
, I
= 100
m
A
0.8
1.2
1.5
V
GS(TH)
DS
D
Gate Threshold
V
/T
−
3.4
mV/
°
C
GS(TH)
J
T
e
mperature Coefficient
Drain
−
to
−
Source On Resistance
R
V
V
V
= 4.0 V, I
= 10 mA
1.0
1.5
80
1.5
2.0
W
DS(on)
GS
GS
DS
D
= 2.5 V, I
= 10 mA
D
Forward Transconductance
CHARGES AND CAPACITANCES
Input Capacitance
g
FS
= 3.0 V, I
= 10 mA
mS
pF
D
C
20
19
33
32
12
1.3
ISS
V
GS
= 0
V
, f =
1
.0 MHz,
Output Capacitance
C
OSS
RSS
V
DS
= 5.0 V
Reverse Transfer Capacitance
T
o
tal Gate Charge
C
7.25
0.9
0.2
0.3
0.2
Q
nC
ns
G(TOT)
Threshold Gate Charge
Gate
−
to
−
Source Charge
Gate
−
to
−
Drain Charge
Q
G(TH)
V
GS
= 5.0
V
, V
= 24 V,
DS
I
D
= 0.1 A
Q
GS
GD
Q
Turn
−
On Delay Time
Rise Time
td
17
23
94
82
(ON)
tr
V
= 4.5 V, V
= 5.0 V,
DD
GS
D
I
= 10 mA, R
= 50
W
G
Turn
−
Off Delay Time
Fall Time
td
(OFF)
tf
DRAIN
−
SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
V
V
S
= 0
V
,
T =
25
°
C
0.65
0.43
5.0
0.7
V
SD
GS
J
I =
10 mA
T =
125
°
C
J
Reverse Recovery Time
t
V
= 0
V
, dI
/dt = 8.0 A/
m
s,
ns
RR
GS
S
I =
10 mA
S
2. Pulse
T
e
st: pulse width
≤
300
m
s, duty cycle
≤
2%.
3. Switching
characteristics are independent of operating junction temperatures.
2
NTS4001N, NVS4001N
TYPICAL PERFORMANCE CURVES
(T =
25
°
C unless otherwise noted)
J
0.2
0.18
0.16
0.14
0.12
0.1
0.1
V
= 10 V to 3 V
T =
25
°
C
GS
J
V
DS
= 5 V
V
= 2.75 V
GS
0.08
0.06
0.04
2.5 V
2.25 V
T =
125
°
C
J
0.08
0.06
0.04
2 V
25
°
C
0.02
0
1.75 V
1.5 V
0.02
0
T =
−
55
°
C
J
0
0.4
0.8
1.2
1.6
2
1
1.2
1.4
1.6
1.8
2
2.2
V
GS
, GATE
−
TO
−
SOURCE VOLTAGE (VOLTS)
V
DS
, DRAIN
−
TO
−
SOURCE VOLTAGE (VOLTS)
Figure 1. On
−
Region Characteristics
Figure 2. Transfer Characteristics
1.25
1.0
1.25
1.0
V
GS
= 10 V
T =
25
°
C
J
T =
125
°
C
J
V
= 4.5 V
= 10 V
GS
0.75
0.75
V
T =
25
°
C
J
GS
0.5
0.5
T =
−
55
°
C
J
0.25
0.25
0.005
0.055
0.105
0.155
0.005
0.055
0.105
0.155
0.205
0.205
I
D,
DRAIN CURRENT (AMPS)
I
D,
DRAIN CURRENT (AMPS)
Figure 4. On
−
Resistance vs. Drain Current and
Figure 3. On
−
Resistance vs. Drain Current and
Gate Voltage
Temperature
10000
1000
2
I
V
= 0.01 A
D
V
GS
= 0 V
1.8
1.6
1.4
1.2
= 10 V
GS
1
0.8
0.6
0.4
T =
150
°
C
J
100
10
T =
125
°
C
J
0.2
0
−
50
10
20
−
25
0
25
50
75
100
125 150
0
5
15
25
30
T , JUNCTION TEMPERATURE (
°
C)
J
V
DS,
DRAIN
−
TO
−
SOURCE VOLTAGE (VOLTS)
Figure 5. On
−
Resistance Variation with
Figure 6. Drain
−
to
−
Source Leakage Current
Temperature
vs. Voltage
3
NTS4001N, NVS4001N
TYPICAL PERFORMANCE CURVES
(T =
25
°
C unless otherwise noted)
J
5
50
40
30
20
T =
25
°
C
V
= 0 V
V
GS
= 0 V
J
DS
Q
G
C
C
iss
4
3
2
rss
Q
Q
GD
GS
C
iss
C
oss
rss
1
0
10
0
I
= 0.1 A
C
D
T =
25
°
C
J
10
5
0
5
10
15
20
25
0
0.2
0.4
0.6
0.8
1
V
GS
V
DS
Q ,
TOTAL GATE CHARGE (nC)
G
GATE
−
TO
−
SOURCE OR DRAIN
−
TO
−
SOURCE VOLTAGE (VOLTS)
Figure 8. Gate
−
to
−
Source Voltage vs. Total
Gate Charge
Figure 7. Capacitance Variation
0.1
V
GS
= 0 V
T =
25
°
C
J
0.08
0.06
0.04
0.02
0
0.5
0.55
0.6
0.65
0.7
0.75
V
SD
, SOURCE
−
TO
−
DRAIN VOLTAGE (VOLTS)
Figure 9. Diode Forward Voltage vs. Current
4
NTS4001N, NVS4001N
PACKAGE DIMENSIONS
SC
−
70 (SOT
−
323)
CASE 419
−
04
ISSUE N
NOTES:
1. DIMENSIONING
AND TOLERANCING PER ANSI Y14.5M, 1982.
2. CONTROLLING
DIMENSION: INCH.
D
e1
MILLIMETERS
INCHES
DIM
A
A1
A2
b
c
D
E
e
e1
L
MIN
0.80
0.00
NOM
0.90
0.05
0.70 REF
0.35
0.18
2.10
1.24
1.30
0.65 BSC
0.38
MAX
1.00
0.10
MIN
0.032
0.000
NOM
0.035
0.002
0.028 REF
0.014
0.007
0.083
0.049
0.051
0.026 BSC
0.015
MAX
0.040
0.004
3
E
H
E
1
2
0.30
0.10
1.80
1.15
1.20
0.40
0.25
2.20
1.35
1.40
0.012
0.004
0.071
0.045
0.047
0.016
0.010
0.087
0.053
0.055
b
e
0.20
2.00
0.56
2.40
0.008
0.079
0.022
0.095
H
2.10
0.083
E
STYLE 8:
c
PIN 1.
GATE
2. SOURCE
3. DRAIN
A
A2
0.05 (0.002)
L
A1
SOLDERING FOOTPRINT*
0.65
0.025
0.65
0.025
1.9
0.075
0.9
0.035
0.7
0.028
mm
inches
ǒ
Ǔ
SCALE 10:1
*For additional information on our Pb
−
Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting
T
e
chniques Reference Manual, SOLDERRM/D.
ON Semiconductor
and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC).
SCILLC reserves the right to make changes without further notice
to any products herein.
SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time.
All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts.
SCILLC does not convey any license under its patent rights
nor the rights of others.
SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur.
Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part.
SCILLC is an Equal
Opportunity/Affirmative Action Employer.
This literature is subject to all applicable copyright laws and is not for resale in any manner.
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T
:
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−
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−
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o
ll Free
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−
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−
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−
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o
ll Free USA/Canada
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o
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For additional information, please contact your local
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NTS4001N/D
