onsemi-NVTFS003N04CTAG

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onsemi-NVTFS003N04CTAG
NVTFS003N04C  

MOSFET

– Powe
r
,
S
ingle  
N-Channel  
40
V
,
3
.5 m
W
, 103 A  
Features  
•
Small Footprint (3.3 x 3.3 mm) for Compact Design  
•
Low R  
to Minimize Conduction Losses  
DS(on)  
•
Low Capacitance to Minimize Driver Losses  
•
NVTFWS003N04C
−
Wettable Flanks Product  
•
AEC
−
Q101 Qualified and P
P
A
P Capable  
V
R
MAX  
I MAX  
D
(BR)DSS  
DS(on)  
40 V  
3.5 m
W
@ 10 V  
103 A  
•
These Devices are Pb
−
Free and are RoHS Compliant  
MAXIMUM RATINGS
(T =
 
25
°
C unless otherwise noted)  
J
N
−
Channel  
D (5
−
8)  
Parameter  
Drain
−
to
−
Source Voltage  
Symbol  
Value  
40  
Unit  
V
V
DSS  
Gate
−
to
−
Source Voltage  
V
GS  
20  
V
Continuous Drain  
Current R  
T
= 25
°
C  
= 100
°
C  
= 25
°
C  
I
103  
58  
A
C
D
G (4)  
q
JC  
T
C
Steady  
State  
S (1, 2, 3)  
Power Dissipation  
T
C
P
69  
W
A
D
R
q
JC  
T
C
= 100
°
C  
22  
MARKING DIAGRAM  
Continuous Drain  
Current R  
T =
 
25
°
C  
A
I
D
22  
1
q
JA  
1
T =
 
100
°
C  
A
16  
S
S
S
G
D
D
D
D
Steady  
State  
XXXX  
AYWW
G  
G
WDFN8  
(
m
8FL)  
CASE 511AB  
Power Dissipation  
T =
 
25
°
C  
A
P
3.2  
1.6  
484  
W
D
R
q
JA  
T =
 
100
°
C  
A
Pulsed Drain Current  
T =
 
25
°
C, t
 
= 10
m
s  
I
DM  
A
A
p
XXXX =
 
Specific Device Code  
Operating Junction and Storage
T
e
mperature  
Range  
T , T  
−
55 to  
°
C  
J
stg  
+175  
A
Y
= Assembly Location  
=
Y
e
ar  
Source Current (Body Diode)  
I
S
57  
A
WW  
G
= Work Week  
= Pb
−
Free Package  
(Note: Microdot may be in either location)  
Single Pulse Drain
−
to
−
Source Avalanche  
E
AS  
155  
mJ  
Energy (I  
= 7.4 A)  
L(pk)  
Lead
T
e
mperature for Soldering Purposes  
(1/8
″
from case for 10 s)  
T
L
260  
°
C  
ORDERING INFORMATION  
See detailed ordering, marking and shipping information in the  
package dimensions section on p

Stresses exceeding those listed in the Maximum Ratings table may damage the  
device. If any of these limits are exceeded, device functionality should not be  
assumed, damage may occur and reliability may be affected.  
THERMAL RESISTANCE MAXIMUM RATINGS

Parameter  
Symbol  
Value  
2.2  
Unit  
Junction
−
to
−
Case
−

Junction
−
to
−
Ambient
−

R
°
C/W  
q
JC  
R
47  
q
JA  
1. The
 
entire application environment impacts the thermal resistance values shown,  
they are not constants and are only valid for the particular conditions noted.  
2. Psi
 
(
Y
) is used as required per JESD51
−
12 for packages in which  
substantially less than 100% of the heat flows to single case surface.  
2
3. Surface
−
mounted on FR4 board using a 650 mm
 
, 2 oz. Cu pad.  
4. Continuous
 
DC current rating. Maximum current for pulses as long as 1  
second is higher but is dependent on pulse duration and duty cycle.  
©
Semiconductor Components Industries, LLC, 2019  
1
Publication Order Number:  
July, 2019
−
Rev. 0  
NVTFS003N04C/D  
 

NVTFS003N04C  
ELECTRICAL CHARACTERISTICS
(T =
 
25
°
C unless otherwise noted)  
J
Parameter  
Symbol  
Test Condition  
Min  
Typ  
Max  
Unit  
OFF CHARACTERISTICS  
Drain
−
to
−
Source Breakdown Voltage  
Zero Gate Voltage Drain Current  
V
V
= 0
V
, I
 
=
2
50
m
A  
40  
V
(BR)DSS  
GS  
D
I
T =
 
25
°
C  
10  
m
A  
DSS  
J
V
= 0
V
,  
= 40 V  
GS  
DS  
V
T =
 
125
°
C  
J
250  
100  
Gate
−
to
−
Source Leakage Current  
ON CHARACTERISTICS

Gate Threshold Voltage  
I
V
= 0
V
, V
 
=
2
0 V  
nA  
GSS  
DS  
GS  
V
V
= V
 
, I
 
= 60
m
A  
2.5  
3.5  
3.5  
V
m
W  
S
GS(TH)  
GS  
DS  
D
Drain
−
to
−
Source On Resistance  
Forward Transconductance  
CHARGES AND CAPACITANCES  
Input Capacitance  
R
V
= 10
V
, I
 
=
5
0 A  
2.9  
93  
DS(on)  
GS  
D
g
FS  
V
= 15
V
, I
 
=
5
0 A  
D
DS  
C
1600  
830  
28  
pF  
nC  
iss  
V
GS  
= 0
V
, f =
1
.0 MHz,  
Output Capacitance  
C
oss  
V
DS  
= 25 V  
Reverse Transfer Capacitance  
Threshold Gate Charge  
C
rss  
Q
5.1  
9.0  
3.5  
23  
G(TH)  
Gate
−
to
−
Source Charge  
Gate
−
to
−
Drain Charge  
Q
V
V
= 10
V
, V
 
=
2
0
V
, I
 
=
5
0 A  
DS D  
GS  
GS  
Q
GD  
T
o
tal Gate Charge  
Q
= 10
V
, V
 
=
2
0
V
, I
 
=
5
0 A  
nC  
ns  
G(TOT)  
GS  
DS  
D
SWITCHING CHARACTERISTICS

Turn
−
On Delay Time  
Rise Time  
t
10  
47  
19  
3
d(on)  
t
r
V
GS  
= 10
V
, V
 
=
2
0
V
,  
DS  
I
D
= 50 A  
Turn
−
Off Delay Time  
Fall Time  
t
d(off)  
t
f
DRAIN
−
SOURCE DIODE CHARACTERISTICS  
Forward Diode Voltage  
V
T =
 
25
°
C  
0.9  
0.78  
37  
1.2  
V
SD  
J
V
= 0
V
,  
GS  
S
I
= 50 A  
T =
 
125
°
C  
J
Reverse Recovery Time  
Charge Time  
t
ns  
RR  
t
t
18  
a
V
GS  
= 0
V
,
d
l
 
/dt = 100 A/
m
s,  
S
I
S
= 50 A  
Discharge Time  
19  
b
Reverse Recovery Charge  
Q
23  
nC  
RR  
5. Pulse
 
T
e
st: Pulse Width
≤
300
m
s, Duty Cycle
≤
2%.  
6. Switching
 
characteristics are independent of operating junction temperatures.  
2
 

NVTFS003N04C  
TYPICAL CHARACTERISTICS  
140  
140  
120  
100  
80  
V
GS  
= 10 V to 7 V  
V
DS  
= 10 V  
120  
100  
80  
6.0 V  
5.5 V  
5.0 V  
60  
60  
T =
 
25
°
C  
J
40  
40  
4.5 V  
4.0 V  
20  
0
20  
0
T =
 
125
°
C  
J
T =
 
−
55
°
C  
J
0
1
2
3
0
1
2
3
4
5
6
7
V
DS  
, DRAIN
−
TO
−
SOURCE VOLTAGE (V)  
V
GS  
, GATE
−
TO
−
SOURCE VOLTAGE (V)  
Figure 1. On
−
Region Characteristics  
Figure 2. Transfer Characteristics  
4.0  
3.8  
3.6  
3.4  
3.2  
3.0  
2.8  
2.6  
2.4  
7.0  
T =
 
25
°
C  
J
6.5  
6.0  
5.5  
5.0  
T =
 
25
°
C  
D
J
I
= 50 A  
V
GS  
= 10 V  
4.5  
4.0  
3.5  
3.0  
2.5  
2.0  
2.2  
2.0  
5.5 6.0
 
6.5 7.0 7.5 8.0 8.5 9.0 9.5
 
10.0  
, GATE
−
TO
−
SOURCE VOLTAGE (V)  
10 20  
30  
40  
50  
60  
70  
80  
90 100  
V
GS  
I ,
 
DRAIN CURRENT (A)  
D
Figure 3. On
−
Resistance vs. Gate
−
to
−
Source  
Figure 4. On
−
Resistance vs. Drain Current and  
Voltage  
Gate Voltage  
100K  
10K  
1K  
2.0  
T =
 
175
°
C  
J
V
I
= 10 V  
= 50 A  
GS  
1.8  
1.6  
1.4  
1.2  
1.0  
T =
 
150
°
C  
J
D
T =
 
125
°
C  
J
T =
 
85
°
C  
J
100  
10  
0.8  
T =
 
25
°
C  
J
1
0.6  
0.4  
0.1  
−
50
−
25  
0
25  
50  
75 100
 
125 150 175  
5
10  
15  
20  
25  
30  
35  
40  
T , JUNCTION TEMPERATURE (
°
C)  
J
V
, DRAIN
−
TO
−
SOURCE VOLTAGE (V)  
DS  
Figure 5. On
−
Resistance Variation with  
Figure 6. Drain
−
to
−
Source Leakage Current  
Temperature  
vs. Voltage  
3

NVTFS003N04C  
TYPICAL CHARACTERISTICS  
10K  
1K  
10  
9
8
7
C
ISS  
C
OSS  
Q
Q
GS  
GD  
6
5
4
3
100  
10  
V
DS  
= 20 V  
2
V
= 0 V  
GS  
T =
 
25
°
C  
J
T =
 
25
°
C  
J
C
1
0
RSS  
I
D
= 50 A  
f = 1 MHz  
0
5
10  
15  
20  
25  
30  
35  
40  
0
5
10  
15  
20  
25  
V
DS  
, DRAIN
−
TO
−
SOURCE VOLTAGE (V)  
Q ,
 
TOTAL GATE CHARGE (nC)  
G
Figure 7. Capacitance Variation  
Figure 8. Gate
−
to
−
Source Voltage vs. Total  
Charge  
100  
100  
V
GS  
= 0 V  
t
r
t
t
d(off)  
d(on)  
10  
10  
V
V
= 10 V  
= 20 V  
= 50 A  
GS  
DS  
t
f
I
D
T =
 
125
°
C T
 
= 25
°
C  
T =
 
−
55
°
C  
J
J
J
1
1
1
10  
R ,
 
GATE RESISTANCE (
W
)  
100  
0.4  
0.5  
0.6  
0.7  
0.8  
0.9  
1.0  
V
SD  
, SOURCE
−
TO
−
DRAIN VOLTAGE (V)  
G
Figure 9. Resistive Switching Time Variation  
vs. Gate Resistance  
Figure 10. Diode Forward Voltage vs. Current  
100  
1000  
100  
10  
T
= 25
°
C  
J(initial)  
10  
T
= 25
°
C  
C
10
m
s  
0.5 ms  
1 ms  
Single Pulse  
≤
10 V  
V
T
= 100
°
C  
GS  
J(initial)  
1
R
Limit  
DS(on)  
10 ms  
Thermal Limit  
Package Limit  
0.1  
1
0.1  
1
10  
100  
1000  
0.00001  
0.0001  
0.001  
0.01  
V
DS  
, DRAIN
−
TO
−
SOURCE VOLTAGE (V)  
TIME IN AVALANCHE (s)  
Figure 11. Maximum Rated Forward Biased  
Safe Operating Area  
Figure 12. I

PEAK

vs. Time in Avalanche  
4

NVTFS003N04C  
TYPICAL CHARACTERISTICS  
100  
10  
1
Duty Cycle = 0.5  
0.2  
0.1  
0.05  
0.02  
0.01  
0.1  
Single Pulse  
0.01  
0.000001 0.00001  
0.0001  
0.001  
0.01  
0.1  
1
10  
100  
1000  
PULSE TIME (sec)  
Figure 13. Thermal Characteristics  
DEVICE ORDERING INFORMATION  
Device  
†
Marking  
Package  
Shipping  
NVTFS003N04CTAG  
03NC  
WDFN8  
1500 /
T
a
pe & Reel  
1500 /
T
a
pe & Reel  
(Pb
−
Free)  
NVTFWS003N04C
T
A
G  
03NW  
WDFN8  
(Pb
−
Free, Wettable Flanks)  
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our
T
a
pe and Reel Packaging  
Specifications Brochure, BRD8011/D.  
5

MECHANICAL CASE OUTLINE  
PACKAGE DIMENSIONS  
WDFN8 3.3×3.3, 0.65P  
CASE 511AB  
ISSUE D  
1
DATE 23 APR 2012  
SCALE 2:1  
2X  
NOTES:  
0.20  
C
1. DIMENSIONING
 
AND TOLERANCING PER ASME Y14.5M, 1994.  
2. CONTROLLING
 
DIMENSION: MILLIMETERS.  
3. DIMENSION
 
D1 AND E1 DO NOT INCLUDE MOLD FLASH  
PROTRUSIONS OR GATE BURRS.  
D
A
B
E
2X  
D1  
MILLIMETERS  
INCHES  
NOM  
0.030  
−−−  
0.012  
0.20  
C
8
1
7
6
5
4
DIM  
A
A1  
b
c
MIN  
0.70  
0.00  
0.23  
0.15  
NOM  
0.75  
−−−  
0.30  
0.20  
MAX  
MIN  
MAX  
0.031  
0.002  
0.016  
0.010  
0.80  
0.05  
0.40  
0.25  
0.028  
0.000  
0.009  
0.006  
4X  
q
E1  
0.008  
D
3.30 BSC  
3.05  
2.11  
3.30 BSC  
3.05  
1.60  
0.30  
0.65 BSC  
0.41  
0.80  
0.43  
0.130 BSC  
0.120  
0.083  
0.130 BSC  
0.120  
0.063  
0.012  
0.026 BSC  
0.016  
0.032  
0.017  
0.005  
0.059  
−−−  
D1  
D2  
E
E1  
E2  
E3  
e
G
K
L
L1  
M
2.95  
1.98  
3.15  
2.24  
0.116  
0.078  
0.124  
0.088  
c
2
3
A1  
TOP VIEW  
2.95  
1.47  
0.23  
3.15  
1.73  
0.40  
0.116  
0.058  
0.009  
0.124  
0.068  
0.016  
0.10  
0.10  
C
C
A
C
6X  
e
0.012  
0.026  
0.012  
0.002  
0.055  
0
0.020  
0.037  
0.022  
0.008  
0.063  
0.30  
0.65  
0.30  
0.06  
1.40  
0
0.51  
0.95  
0.56  
0.20  
1.60  
SEATING  
PLANE  
0.13  
1.50  
−−−  
DETAIL A  
SIDE VIEW  
DETAIL A  
q
12  
12  
_
_
_
_

8X

b  
0.10  
0.05  
C
C
A
B
SOLDERING FOOTPRINT*  
8X  
e/2  
0.42  
0.65  
4X  
L
4X  
0.66  
PITCH  
1
8
4
5
PACKAGE  
OUTLINE  
K
E2  
M
E3  
3.60  
L1  
D2  
G
2.30  
BOTTOM VIEW  
0.57  
0.47  
0.75  
GENERIC  
MARKING DIAGRAM*  
2.37  
3.46  
1
XXXXX  
DIMENSION: MILLIMETERS  
AYWW
G  
*For additional information on our Pb
−
Free strategy and soldering  
details, please download the ON Semiconductor Soldering and  
Mounting
T
e
chniques Reference Manual, SOLDERRM/D.  
G
XXXXX =
 
Specific Device Code  
A
Y
= Assembly Location  
=
Y
e
ar  
WW  
G
= Work Week  
= Pb
−
Free Package  
*This information is generic. Please refer  
to device data sheet for actual part  
marking.  
Pb
−
Free indicator, “G” or microdot “
G
”,  
may or may not be present.  
Electronic versions are uncontrolled except when accessed directly from the Document Repository.  
Printed versions
 
are uncontrolled
 
except when stamped
 
“CONTROLLED COPY” in red.  
DOCUMENT NUMBER:  
DESCRIPTION:  
98AON30561E  
WDFN8 3.3X3.3, 0.65P  
PAGE 1 OF 1  
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©
Semiconductor Components Industries, LLC, 2019  

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T
:  
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−
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o
ll Free USA/Canada  
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