onsemi-NVTFWS002N04CTAG

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onsemi-NVTFWS002N04CTAG
DATA SHEET  

MOSFET

– Powe
r
,
S
ingle  
N-Channel  
40
V
,
2
.4 m
W
, 136 A  
V
R
MAX  
I MAX  
D
(BR)DSS  
DS(on)  
40 V  
2.4 m
W
@ 10 V  
136 A  
N
−
Channel  
D (5
−
8)  
NVTFS002N04C  
Features  
•
Small Footprint (3.3 x 3.3 mm) for Compact Design  
G (4)  
•
Low R  
to Minimize Conduction Losses  
DS(on)  
•
Low Capacitance to Minimize Driver Losses  
•
NVTFWS002N04C
−
Wettable Flanks Product  
•
AEC
−
Q101 Qualified and P
P
A
P Capable  
S (1, 2, 3)  
MARKING DIAGRAM  
•
These Devices are Pb
−
Free and are RoHS Compliant  
WDFN8  
(
m
8FL)  
CASE 511DY  
1
MAXIMUM RATINGS
(T =
 
25
°
C unless otherwise noted)  
J
S
S
S
G
D
D
D
D
1
XXXX  
AYWW
G  
G
Parameter  
Drain
−
to
−
Source Voltage  
Symbol  
Value  
40  
Unit  
V
V
DSS  
WDFNW8  
CASE 515AP  
Gate
−
to
−
Source Voltage  
V
GS  
20  
V
Continuous Drain  
Current R  
T
= 25
°
C  
= 100
°
C  
= 25
°
C  
I
136  
77  
A
C
D
XXXX =
 
Specific Device Code  
q
JC  
A
Y
= Assembly Location  
=
Y
e
ar  
T
C
Steady  
State  
Power Dissipation  
T
C
P
85  
W
A
D
WW  
G
= Work Week  
= Pb
−
Free Package  
(Note: Microdot may be in either location)  
R
q
JC  
T
C
= 100
°
C  
27  
Continuous Drain  
Current R  
T =
 
25
°
C  
A
I
D
27  
q
JA  
T =
 
100
°
C  
A
19  
Steady  
State  
ORDERING INFORMATION  
See detailed ordering, marking and shipping information in the  
package dimensions section on p

Power Dissipation  
T =
 
25
°
C  
A
P
3.2  
1.6  
676  
W
D
R
q
JA  
T =
 
100
°
C  
A
Pulsed Drain Current  
T =
 
25
°
C, t
 
= 10
m
s  
I
DM  
A
A
p
Operating Junction and Storage
T
e
mperature  
Range  
T , T  
−
55 to  
+175  
°
C  
J
stg  
Source Current (Body Diode)  
I
70.4  
268  
A
S
Single Pulse Drain
−
to
−
Source Avalanche  
E
AS  
mJ  
Energy (I  
= 10.2 A)  
L(pk)  
Lead
T
e
mperature for Soldering Purposes  
(1/8
″
from case for 10 s)  
T
L
260  
°
C  
Stresses exceeding those listed in the Maximum Ratings table may damage the  
device. If any of these limits are exceeded, device functionality should not be  
assumed, damage may occur and reliability may be affected.  
THERMAL RESISTANCE MAXIMUM RATINGS

Parameter  
Symbol  
Value  
1.8  
Unit  
Junction
−
to
−
Case
−

Junction
−
to
−
Ambient
−

R
°
C/W  
q
JC  
R
46.5  
q
JA  
1. The
 
entire application environment impacts the thermal resistance values shown,  
they are not constants and are only valid for the particular conditions noted.  
2. Psi
 
(
Y
) is used as required per JESD51
−
12 for packages in which  
substantially less than 100% of the heat flows to single case surface.  
2
3. Surface
−
mounted on FR4 board using a 650 mm
 
, 2 oz. Cu pad.  
4. Continuous
 
DC current rating. Maximum current for pulses as long as 1  
second is higher but is dependent on pulse duration and duty cycle.  
©
Semiconductor Components Industries, LLC, 2019  
1
Publication Order Number:  
January, 2022
−
Rev. 1  
NVTFS002N04C/D  
 

NVTFS002N04C  
ELECTRICAL CHARACTERISTICS
(T =
 
25
°
C unless otherwise noted)  
J
Parameter  
Symbol  
Test Condition  
Min  
Typ  
Max  
Unit  
OFF CHARACTERISTICS  
Drain
−
to
−
Source Breakdown Voltage  
Zero Gate Voltage Drain Current  
V
V
= 0
V
, I
 
=
2
50
m
A  
40  
V
(BR)DSS  
GS  
D
I
T =
 
25
°
C  
10  
m
A  
DSS  
J
V
V
= 0
V
,  
= 40 V  
GS  
DS  
T =
 
125
°
C  
J
250  
100  
Gate
−
to
−
Source Leakage Current  
ON CHARACTERISTICS

Gate Threshold Voltage  
I
V
= 0
V
, V
 
=
2
0 V  
nA  
GSS  
DS  
GS  
V
V
= V
 
, I
 
= 90
m
A  
2.5  
3.5  
2.4  
V
m
W  
S
GS(TH)  
GS  
DS  
D
Drain
−
to
−
Source On Resistance  
Forward Transconductance  
CHARGES AND CAPACITANCES  
Input Capacitance  
R
V
= 10
V
, I
 
=
5
0 A  
2.0  
92  
DS(on)  
GS  
D
g
FS  
V
= 15
V
, I
 
=
5
0 A  
D
DS  
C
2250  
1230  
41  
pF  
nC  
iss  
V
GS  
= 0
V
, f =
1
.0 MHz,  
Output Capacitance  
C
oss  
V
DS  
= 25 V  
Reverse Transfer Capacitance  
Threshold Gate Charge  
C
rss  
Q
6.7  
G(TH)  
Gate
−
to
−
Source Charge  
Gate
−
to
−
Drain Charge  
Q
11.4  
5.7  
V
V
= 10
V
, V
 
=
2
0
V
, I
 
=
5
0 A  
DS D  
GS  
GS  
Q
GD  
T
o
tal Gate Charge  
Q
= 10
V
, V
 
=
2
0
V
, I
 
=
5
0 A  
34  
nC  
ns  
G(TOT)  
GS  
DS  
D
SWITCHING CHARACTERISTICS

Turn
−
On Delay Time  
Rise Time  
t
11  
77  
23  
7
d(on)  
t
r
V
GS  
= 10
V
, V
 
=
3
2
V
,  
DS  
I
= 50 A  
D
Turn
−
Off Delay Time  
Fall Time  
t
d(off)  
t
f
DRAIN
−
SOURCE DIODE CHARACTERISTICS  
Forward Diode Voltage  
V
T =
 
25
°
C  
0.84  
0.72  
50  
1.2  
V
SD  
J
V
= 0
V
,  
GS  
S
I
= 50 A  
T =
 
125
°
C  
J
Reverse Recovery Time  
Charge Time  
t
ns  
RR  
t
t
25  
a
V
GS  
= 0
V
,
d
l
 
/dt = 100 A/
m
s,  
S
I
S
= 50 A  
Discharge Time  
25  
b
Reverse Recovery Charge  
Q
50  
nC  
RR  
5. Pulse
 
T
e
st: Pulse Width
≤
300
m
s, Duty Cycle
≤
2%.  
6. Switching
 
characteristics are independent of operating junction temperatures.  
2
 

NVTFS002N04C  
TYPICAL CHARACTERISTICS  
210  
210  
180  
150  
120  
90  
V
GS  
= 10 V to 6.6 V  
6.2 V  
5.8 V  
V
DS  
= 10 V  
180  
150  
120  
90  
5.6 V  
5.4 V  
5.2 V  
T =
 
25
°
C  
J
5.0 V  
4.8 V  
4.6 V  
60  
60  
30  
0
30  
0
T =
 
125
°
C  
J
T =
 
−
55
°
C  
J
4.4 V  
0
1
2
3
0
1
2
3
4
5
6
7
8
V
DS  
, DRAIN
−
TO
−
SOURCE VOLTAGE (V)  
V
GS  
, GATE
−
TO
−
SOURCE VOLTAGE (V)  
Figure 1. On
−
Region Characteristics  
Figure 2. Transfer Characteristics  
4.0  
3.5  
3.0  
2.5  
2.0  
1.5  
1.0  
4.0  
3.5  
3.0  
2.5  
2.0  
T =
 
25
°
C  
J
T =
 
25
°
C  
D
J
I
= 50 A  
V
GS  
= 10 V  
1.5  
1.0  
0.5  
0
5
6
7
8
9
10  
10  
30  
50  
70  
90  
110  
130  
150  
V
GS  
, GATE
−
TO
−
SOURCE VOLTAGE (V)  
I ,
 
DRAIN CURRENT (A)  
D
Figure 3. On
−
Resistance vs. Gate
−
to
−
Source  
Figure 4. On
−
Resistance vs. Drain Current and  
Voltage  
Gate Voltage  
100K  
10K  
1K  
2.0  
T =
 
175
°
C  
J
V
I
= 10 V  
= 50 A  
GS  
1.8  
1.6  
1.4  
1.2  
1.0  
T =
 
150
°
C  
J
D
T =
 
125
°
C  
J
T =
 
85
°
C  
J
100  
0.8  
10  
1
T =
 
25
°
C  
J
0.6  
0.4  
−
50
−
25  
0
25  
50  
75 100
 
125 150 175  
5
10  
15  
20  
25  
30  
35  
40  
T , JUNCTION TEMPERATURE (
°
C)  
J
V
, DRAIN
−
TO
−
SOURCE VOLTAGE (V)  
DS  
Figure 5. On
−
Resistance Variation with  
Figure 6. Drain
−
to
−
Source Leakage Current  
Temperature  
vs. Voltage  
3

NVTFS002N04C  
TYPICAL CHARACTERISTICS  
10K  
10  
9
8
7
C
ISS  
C
OSS  
1K  
Q
Q
GD  
6
5
4
3
GS  
100  
C
RSS  
10  
1
V
= 20 V  
DS  
2
V
= 0 V  
GS  
T =
 
25
°
C  
J
T =
 
25
°
C  
J
1
0
I
D
= 50 A  
f = 1 MHz  
0
5
10  
15  
20  
25  
30  
35  
40  
0
5
10  
15  
20  
25  
30  
35  
V
DS  
, DRAIN
−
TO
−
SOURCE VOLTAGE (V)  
Q ,
 
TOTAL GATE CHARGE (nC)  
G
Figure 7. Capacitance Variation  
Figure 8. Gate
−
to
−
Source Voltage vs. Total  
Charge  
1000  
100  
100  
10  
V
GS  
= 0 V  
t
r
t
t
d(off)  
d(on)  
10  
1
1
t
f
V
V
= 10 V  
= 32 V  
= 50 A  
GS  
T =
 
125
°
C  
J
DS  
I
D
T =
 
−
55
°
C  
J
T =
 
25
°
C  
J
0.1  
1
10  
R ,
 
GATE RESISTANCE (
W
)  
100  
0.3  
0.4  
0.5  
, SOURCE
−
TO
−
DRAIN VOLTAGE (V)  
SD  
0.6  
0.7  
0.8  
0.9  
1.0  
V
G
Figure 9. Resistive Switching Time Variation  
vs. Gate Resistance  
Figure 10. Diode Forward Voltage vs. Current  
100  
1000  
100  
10  
T
= 25
°
C  
J(initial)  
10  
T
C
= 25
°
C  
Single Pulse  
≤
10 V  
10
m
s  
T
= 100
°
C  
J(initial)  
V
GS  
0.5 ms  
1 ms  
10 ms  
1
R
Limit  
DS(on)  
Thermal Limit  
Package Limit  
0.1  
1
0.1  
1
10  
100  
1000  
0.00001  
0.0001  
0.001  
0.01  
V
DS  
, DRAIN
−
TO
−
SOURCE VOLTAGE (V)  
TIME IN AVALANCHE (s)  
Figure 11. Maximum Rated Forward Biased  
Safe Operating Area  
Figure 12. I

PEAK

vs. Time in Avalanche  
4

NVTFS002N04C  
TYPICAL CHARACTERISTICS  
100  
10  
1
Duty Cycle = 0.5  
0.2  
0.1  
0.05  
0.02  
0.01  
0.1  
Single Pulse  
0.01  
0.000001 0.00001  
0.0001  
0.001  
0.01  
0.1  
1
10  
100  
1000  
PULSE TIME (sec)  
Figure 13. Thermal Characteristics  
DEVICE ORDERING INFORMATION  
Device  
†
Marking  
Package  
Shipping  
NVTFS002N04CTAG  
02NC  
WDFN8  
1500 /
T
a
pe & Reel  
1500 /
T
a
pe & Reel  
(Pb
−
Free)  
NVTFWS002N04C
T
A
G  
02NW  
WDFNW8  
(Pb
−
Free, Wettable Flanks)  
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our
T
a
pe and Reel Packaging  
Specifications Brochure, BRD8011/D.  
5

MECHANICAL CASE OUTLINE  
PACKAGE DIMENSIONS  
WDFN8 3.3×3.3, 0.65P  
CASE 511DY  
ISSUE A  
DATE 21 AUG 2018  
GENERIC  
MARKING DIAGRAM*  
XXXX  
AYWW  
XXXX = Specific Device Code  
A
Y
= Assembly Location  
=
Y
ear Code  
WW =
 
Work Week Code  
*This information is generic. Please refer to  
device data sheet for actual part marking.  
Pb−Free indicator, “G” or microdot “
G
”,  
may or may not be present. Some products  
may not follow the Generic Marking.  
Electronic versions are uncontrolled except when accessed directly from the Document Repository.  
Printed versions
 
are uncontrolled
 
except when stamped
 
“CONTROLLED COPY” in red.  
DOCUMENT NUMBER:  
DESCRIPTION:  
98AON90827G  
WDFN8 3.3×3.3, 0.65P  
PAGE 1 OF 1  
ON Semiconductor and  
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.  
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding  
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically  
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the  
rights of others.  
©
Semiconductor Components Industries, LLC, 2018  

MECHANICAL CASE OUTLINE  
PACKAGE DIMENSIONS  
WDFNW8 3.3×3.3, 0.65P (Full
−
Cut
m
8FL Fused WF)  
CASE 515AP  
ISSUE O  
DATE 25 AUG 2020  
GENERIC  
MARKING DIAGRAM*  
XXXX = Specific Device Code  
*This information is generic. Please refer to  
A
Y
= Assembly Location  
=
Y
e
ar  
device data sheet for actual part marking.  
Pb
−
Free indicator, “G” or microdot “
G
”, may  
or may not be present. Some products may  
not follow the Generic Marking.  
XXXX  
AYWW
G  
G
WW =
 
Work Week  
G
= Pb
−
Free Package  
(Note: Microdot may be in either location)  
Electronic versions are uncontrolled except when accessed directly from the Document Repository.  
Printed versions
 
are uncontrolled
 
except when stamped
 
“CONTROLLED COPY” in red.  
DOCUMENT NUMBER:  
DESCRIPTION:  
98AON24557H  
WDFNW8 3.3×3.3, 0.65P (Full
−
Cut
m
8FL Fused WF)  
PAGE 1 OF 1  
ON Semiconductor and  
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.  
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding  
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically  
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the  
rights of others.  
©
Semiconductor Components Industries, LLC, 2018  

onsemi
,  
, and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “
onsemi
” or its affiliates  
and/or subsidiaries in the United States and/or other countries.
onsemi
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onsemi
’s product/patent coverage may be accessed at

.
onsemi
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−
is” and
onsemi
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onsemi
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onsemi
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T
:  
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