onsemi-NVTFWS004N04CTAG
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DATA SHEET
N-Channel
V
R
MAX
I MAX
D
(BR)DSS
DS(on)
40 V
4.9 m
W
@ 10 V
77 A
40
V
,
4
.9 m
W
, 77 A
N−Channel
NVTFS004N04C
D (5 − 8)
Features
•
Small Footprint (3.3 x 3.3 mm) for Compact Design
G (4)
•
Low R
to Minimize Conduction Losses
DS(on)
•
Low Capacitance to Minimize Driver Losses
•
NVTFWS004N04C − Wettable Flanks Product
•
AEC−Q101 Qualified and P
P
A
P Capable
S (1, 2, 3)
•
These Devices are Pb−Free and are RoHS Compliant
MAXIMUM RATINGS
(T =
25
°
C unless otherwise noted)
J
1
Parameter
Drain−to−Source Voltage
Symbol
Value
40
Unit
V
WDFN8 3.3×3.3, 0.65P
CASE 511AB
V
DSS
Gate−to−Source Voltage
V
GS
20
V
Continuous Drain
Current R
Steady
State
T
T
= 25
°
C
I
D
77
A
C
q
JC
= 100
°
C
43
C
WDFNW8 3.3×3.3, 0.65P (Full−Cut
m
8FL WF)
Power Dissipation
T
T
= 25
°
C
P
55
18
18
W
A
CASE 515AN
C
D
R
q
JC
= 100
°
C
C
Continuous Drain
Current R
Steady T
= 25
°
C
I
D
A
State
q
JA
MARKING DIAGRAM
T =
100
°
C
A
13
1
S
S
S
G
D
D
D
D
Power Dissipation
T =
25
°
C
P
3.2
1.6
338
W
A
D
XXXX
AYWW
G
G
R
q
JA
T =
100
°
C
A
Pulsed Drain Current
T =
25
°
C, t
= 10
m
s
I
DM
A
A
p
Operating Junction and Storage
T
e
mperature
Range
T , T
−55 to
+175
°
C
J
stg
XXXX =
Specific Device Code
A
Y
= Assembly Location
=
Y
e
ar
= Work Week
Source Current (Body Diode)
I
45.5
122
A
S
Single Pulse Drain−to−Source Avalanche
E
AS
mJ
WW
G
Energy (I
= 5.2 A)
= Pb−Free Package
L(pk)
(Note: Microdot may be in either location)
Lead
T
e
mperature for Soldering Purposes
(1/8
″
from Case for 10 s)
T
260
°
C
L
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
ORDERING INFORMATION
See detailed ordering, marking and shipping information in the
Parameter
Symbol
Value
2.7
Unit
R
°
C/W
q
q
JC
R
47.4
JA
1. The
entire application environment impacts the thermal resistance values shown,
they are not constants and are only valid for the particular conditions noted.
2. Psi
(
Y
) is used as required per JESD51−12 for packages in which
substantially less than 100% of the heat flows to single case surface.
2
3. Surface−mounted
on FR4 board using a 650 mm
, 2 oz. Cu pad.
4. Continuous
DC current rating. Maximum current for pulses as long as 1
second is higher but is dependent on pulse duration and duty cycle.
©
Semiconductor Components Industries, LLC, 2019
1
Publication Order Number:
April, 2022 − Rev. 1
NVTFS004N04C/D
NVTFS004N04C
ELECTRICAL CHARACTERISTICS
(T =
25
°
C unless otherwise noted)
J
Parameter
Symbol
Test Condition
Min
Typ
Max
Unit
OFF CHARACTERISTICS
Drain−to−Source Breakdown Voltage
Zero Gate Voltage Drain Current
V
V
= 0
V
, I
=
2
50
m
A
40
−
−
−
−
−
−
V
(BR)DSS
GS
D
I
V
GS
V
DS
= 0
V
,
= 40 V
T =
25
°
C
10
m
A
DSS
J
T =
125
°
C
−
250
100
J
Gate−to−Source Leakage Current
Gate Threshold Voltage
I
V
DS
= 0
V
, V
=
2
0 V
−
nA
GSS
GS
V
V
GS
V
GS
V
DS
= V
, I
= 50
m
A
2.5
−
−
3.5
4.9
−
V
m
W
S
GS(TH)
DS
D
Drain−to−Source On Resistance
Forward Transconductance
CHARGES AND CAPACITANCES
Input Capacitance
R
= 10
V
, I
=
3
5 A
4.1
57
DS(on)
D
g
FS
= 15
V
, I
=
3
5 A
−
D
C
V
GS
V
DS
= 0
V
, f =
1
.0 MHz,
= 25 V
−
−
−
−
−
−
−
1150
600
25
−
−
−
−
−
−
−
pF
nC
iss
Output Capacitance
C
oss
Reverse Transfer Capacitance
Threshold Gate Charge
C
rss
Q
V
GS
= 10
V
, V
=
3
2
V
, I
=
3
5 A
3.7
5.7
3.0
18
G(TH)
DS
D
Gate−to−Source Charge
Gate−to−Drain Charge
Q
GS
Q
GD
T
o
tal Gate Charge
Q
V
V
= 10
V
, V
=
3
2
V
, I
=
3
5 A
nC
ns
G(TOT)
GS
DS
D
Turn−On Delay Time
Rise Time
t
= 10
V
, V
=
3
2
V
,
−
−
−
−
12
80
26
8
−
−
−
−
d(on)
GS
DS
I
D
= 35 A
t
r
Turn−Off Delay Time
Fall Time
t
d(off)
t
f
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
V
V
= 0
V
,
= 35 A
T =
25
°
C
−
−
−
−
−
−
0.82
0.69
33
1.2
−
V
SD
GS
J
I
S
T =
125
°
C
J
Reverse Recovery Time
Charge Time
t
V
GS
= 0
V
,
d
l
/dt = 100 A/
m
s,
= 35 A
−
ns
RR
S
I
S
t
t
16
−
a
Discharge Time
17
−
b
Reverse Recovery Charge
Q
18
−
nC
RR
5. Pulse
T
e
st: Pulse Width
≤
300
m
s, Duty Cycle
≤
2%.
6. Switching
characteristics are independent of operating junction temperatures.
2
NVTFS004N04C
TYPICAL CHARACTERISTICS
120
200
180
160
140
120
100
80
V
= 10 V to 8 V
GS
V
DS
= 10 V
7.0 V
100
80
4.0 V
6.0 V
60
5.6 V
5.2 V
40
T =
25
°
C
J
60
40
20
0
4.8 V
4.4 V
20
0
T =
125
°
C
J
T =
−55
°
C
J
0
1
2
3
3.0
3.5
4.0
4.5
5.0
5.5
6.0
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
V
GS
, GATE−TO−SOURCE VOLTAGE (V)
Figure 1. On−Region Characteristics
Figure 2. Transfer Characteristics
6
5
4
3
2
28
24
20
16
12
8
T =
25
°
C
J
T =
25
°
C
D
J
I
= 35 A
V
GS
= 10 V
1
0
4
0
4
5
6
7
8
9
10
5
15
25
35
45
55
65
75
V
GS
, GATE−TO−SOURCE VOLTAGE (V)
I ,
DRAIN CURRENT (A)
D
Figure 3. On−Resistance vs. Gate−to−Source
Voltage
Figure 4. On−Resistance vs. Drain Current and
Gate Voltage
2.0
100K
10K
1K
T =
175
°
C
J
V
I
= 10 V
= 35 A
GS
1.8
1.6
1.4
1.2
D
T =
150
°
C
J
T =
125
°
C
J
T =
85
°
C
J
100
10
1.0
0.8
T =
25
°
C
J
1
0.6
0.4
0.1
−50 −25
0
25
50
75 100
125 150 175
5
10
V
15
20
25
30
35
40
T , JUNCTION TEMPERATURE (
°
C)
, DRAIN−TO−SOURCE VOLTAGE (V)
J
DS
Figure 5. On−Resistance Variation with
Temperature
Figure 6. Drain−to−Source Leakage Current
vs. Voltage
3
NVTFS004N04C
TYPICAL CHARACTERISTICS
10K
10
9
C
C
ISS
8
7
1K
OSS
6
5
4
3
Q
Q
GD
GS
100
C
RSS
10
1
V
DS
= 32 V
2
V
= 0 V
GS
T =
25
°
C
J
T =
25
°
C
J
1
0
I
D
= 35 A
f = 1 MHz
0
5
10
15
20
25
30
35
40
0
2
4
6
8
10 12 14
16 18
20
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
Q ,
TOTAL GATE CHARGE (nC)
G
Figure 7. Capacitance Variation
Figure 8. Gate−to−Source Voltage vs. Total
Charge
1000
100
100
10
V
GS
= 0 V
t
r
t
t
d(off)
d(on)
T =
125
°
C
J
T =
25
°
C T
= −55
°
C
J J
10
1
1
t
f
V
= 10 V
= 32 V
= 35 A
GS
V
DS
I
D
0.1
1
10
R ,
GATE RESISTANCE (
W
)
100
0.3
0.4
0.5
, SOURCE−TO−DRAIN VOLTAGE (V)
SD
0.6
0.7
0.8
0.9
1.0
V
G
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance
Figure 10. Diode Forward Voltage vs. Current
100
10
1000
100
10
T
= 25
°
C
C
Single Pulse
≤
10 V
T
= 25
°
C
J(initial)
V
GS
T
= 100
°
C
J(initial)
10
m
s
0.5 ms
1 ms
1
1
R
Limit
DS(on)
10 ms
Thermal Limit
Package Limit
0.1
0.1
0.1
1
10
100
1000
0.00001
0.0001
0.001
0.01
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
TIME IN AVALANCHE (s)
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
Figure 12. I
PEAK
vs. Time in Avalanche
4
NVTFS004N04C
TYPICAL CHARACTERISTICS
100
10
1
Duty Cycle = 0.5
0.2
0.1
0.05
0.02
0.01
0.1
Single Pulse
0.01
0.000001 0.00001
0.0001
0.001
0.01
0.1
1
10
100
1000
PULSE TIME (sec)
Figure 13. Thermal Characteristics
DEVICE ORDERING INFORMATION
Device
†
Marking
Package
Shipping
NVTFS004N04CTAG
04NC
WDFN8 3.3×3.3, 0.65P
(Pb−Free)
1500 /
T
a
pe & Reel
1500 /
T
a
pe & Reel
NVTFWS004N04C
T
A
G
04NW
WDFNW8 3.3×3.3, 0.65P
(Full−Cut
m
8FL WF)
(Pb−Free, Wettable Flanks)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our
T
a
pe and Reel Packaging
Specifications Brochure, BRD8011/D.
5
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
WDFN8 3.3×3.3, 0.65P
CASE 511AB
ISSUE D
1
DATE 23 APR 2012
SCALE 2:1
2X
NOTES:
0.20
C
1. DIMENSIONING
AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING
DIMENSION: MILLIMETERS.
3. DIMENSION
D1 AND E1 DO NOT INCLUDE MOLD FLASH
PROTRUSIONS OR GATE BURRS.
D
A
B
E
2X
D1
MILLIMETERS
INCHES
NOM
0.030
−−−
0.012
0.20
C
8
1
7
6
5
4
DIM
A
A1
b
c
MIN
0.70
0.00
0.23
0.15
NOM
0.75
−−−
0.30
0.20
MAX
MIN
MAX
0.031
0.002
0.016
0.010
0.80
0.05
0.40
0.25
0.028
0.000
0.009
0.006
4X
q
E1
0.008
D
3.30 BSC
3.05
2.11
3.30 BSC
3.05
1.60
0.30
0.65 BSC
0.41
0.80
0.43
0.130 BSC
0.120
0.083
0.130 BSC
0.120
0.063
0.012
0.026 BSC
0.016
0.032
0.017
0.005
0.059
−−−
D1
D2
E
E1
E2
E3
e
G
K
L
L1
M
2.95
1.98
3.15
2.24
0.116
0.078
0.124
0.088
c
2
3
A1
TOP VIEW
2.95
1.47
0.23
3.15
1.73
0.40
0.116
0.058
0.009
0.124
0.068
0.016
0.10
0.10
C
C
A
C
6X
e
0.012
0.026
0.012
0.002
0.055
0
0.020
0.037
0.022
0.008
0.063
0.30
0.65
0.30
0.06
1.40
0
0.51
0.95
0.56
0.20
1.60
SEATING
PLANE
0.13
1.50
−−−
DETAIL A
SIDE VIEW
DETAIL A
q
12
12
_
_
_
_
8X
b
0.10
0.05
C
C
A
B
SOLDERING FOOTPRINT*
8X
e/2
0.42
0.65
4X
L
4X
0.66
PITCH
1
8
4
5
PACKAGE
OUTLINE
K
E2
M
E3
3.60
L1
D2
G
2.30
BOTTOM VIEW
0.57
0.47
0.75
GENERIC
MARKING DIAGRAM*
2.37
3.46
1
XXXXX
DIMENSION: MILLIMETERS
AYWW
G
*For additional information on our Pb
−
Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting
T
e
chniques Reference Manual, SOLDERRM/D.
G
XXXXX =
Specific Device Code
A
Y
= Assembly Location
=
Y
e
ar
WW
G
= Work Week
= Pb
−
Free Package
*This information is generic. Please refer
to device data sheet for actual part
marking.
Pb
−
Free indicator, “G” or microdot “
G
”,
may or may not be present.
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions
are uncontrolled
except when stamped
“CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON30561E
WDFN8 3.3X3.3, 0.65P
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
©
Semiconductor Components Industries, LLC, 2019
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
WDFNW8 3.3×3.3, 0.65P (Full
−
Cut
m
8FL WF)
CASE 515AN
ISSUE O
DATE 25 AUG 2020
GENERIC
MARKING DIAGRAM*
XXXX = Specific Device Code
*This information is generic. Please refer to
A
Y
= Assembly Location
=
Y
e
ar
device data sheet for actual part marking.
Pb
−
Free indicator, “G” or microdot “
G
”, may
or may not be present. Some products may
not follow the Generic Marking.
XXXX
AYWW
G
G
WW =
Work Week
G
= Pb
−
Free Package
(Note: Microdot may be in either location)
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions
are uncontrolled
except when stamped
“CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON24556H
WDFNW8 3.3×3.3, 0.65P (Full
−
Cut
m
8FL WF)
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
©
Semiconductor Components Industries, LLC, 2018
onsemi
,
, and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “
onsemi
” or its affiliates
and/or subsidiaries in the United States and/or other countries.
onsemi
owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property.
A listing of
onsemi
’s product/patent coverage may be accessed at
www.onsemi.com/site/pdf/Patent
−
Marking.pdf
.
onsemi
reserves the right to make changes at any time to any
products or information herein, without notice. The information herein is provided “as
−
is” and
onsemi
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onsemi
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onsemi
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onsemi
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T
:
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o
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