onsemi-RFP8P05
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RFD8P05, RFD8P05SM, RFP8P05
Data Sheet
January 2002
8A, 50
V
,
0
.300 Ohm, P-Channel Power
MOSFETs
Features
• 8A,
50V
These products are P-Channel power MOSFETs
manufactured using the MegaFET process. This process,
which uses feature sizes approaching those of LSI circuits,
gives optimum utilization of silicon, resulting in outstanding
performance. They were designed for use in applications
such as switching regulators, switching converters, motor
drivers, and relay drivers. These transistors can be operated
directly from integrated circuits.
• r
DS(ON)
= 0.300
Ω
• UIS
SOA Rating Curve
• SOA
is Power Dissipation Limited
• Nanosecond
Switching Speeds
• Linear
T
r
ansfer Characteristics
• High
Input Impedance
Formerly developmental type
T
A
09832.
• Related
Literature
– TB334
“Guidelines for Soldering Surface Mount
Components to PC Boards”
Ordering Information
PART NUMBER
PACKAGE
BRAND
Symbol
RFD8P05
TO-251AA
D8P05
D8P05
D
RFD8P05SM
RFP8P05
TO-252AA
TO-220AB
RFP8P05
G
NOTE: When
ordering, use the entire part number. Add the suffix 9A
to obtain the TO-252AA variant in tape and reel, i.e.,
RFD8P05SM9A.
S
Packaging
JEDEC TO-220AB
JEDEC TO-251AA
SOURCE
DRAIN
GATE
SOURCE
DRAIN
GATE
DRAIN (FLANGE)
DRAIN (FLANGE)
JEDEC TO-252AA
DRAIN (FLANGE)
GATE
SOURCE
©2002 Fairchild Semiconductor Corporation
RFD8P05, RFD8P05SM, RFP8P05 Rev. B
RFD8P05, RFD8P05SM, RFP8P05
o
Absolute Maximum Ratings
T
= 25
C Unless Otherwise Specified
C
RFD8P05,
RFD8P05SM, RFP8P05
UNITS
Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
-50
V
V
DSS
Drain to Gate Voltage (R
= 20K
Ω)
(Note 1
)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
.
V
-50
GS
DGR
Continuous Drain Current
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .I
-8
-20
A
D
Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I
A
DM
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
GS
20
V
Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P
48
W
D
o
Dissipation Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
0.27
W/ C
Single Pulse Avalanche Energy Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . E
See Figure 6
-55 to 175
AS
o
Operating and Storage
T
e
mperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
, T
J
C
STG
Maximum
T
e
mperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10
s
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
T
Package Body for 10s, See
T
e
chbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .T
o
o
300
260
C
C
L
pkg
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
o
o
1. T
= 25
C to 150
C.
J
o
Electrical Specifications
T
= 25
C Unless Otherwise Specified
C
PARAMETER
SYMBOL
TEST CONDITIONS
= 250
µ
A, V
= 0V (Figure 9)
GS
MIN
TYP MAX
UNITS
Drain to Source Breakdown Voltage
Gate Threshold Voltage
BV
I
-50
–
–
–
-4
V
DSS
D
V
V
V
V
V
= V
, I
= 250
µ
A (Figure 8)
-2
–
V
GS(TH)
GS
DS
DS
GS
DS
D
Zero Gate Voltage Drain Current
I
= Rated BV
, V
DSS GS
= 0V
–
1
µ
A
µ
A
nA
Ω
DSS
GSS
o
= 0.8 x Rated BV
, T
= 150
C
–
–
25
100
0.300
60
–
DSS
J
Gate to Source Leakage Current
I
=
20V
–
–
Drain to Source On Resistance (Note 2)
Turn-On Time
r
I
= 8A, V
= -10V (Figure 7)
–
–
DS(ON)
D
GS
= -25V, I
≈
4A, R
= 9.1
Ω
, R
= 6.25
Ω,
t
V
V
–
–
ns
ON
DD
GS
D
G
L
= -10V
Turn-On Delay Time
Rise Time
t
–
16
30
42
20
–
ns
d(ON)
t
–
–
ns
r
Turn-Off Delay Time
Fall Time
t
–
–
ns
d(OFF)
t
–
–
ns
f
Turn-Off Time
t
–
100
80
40
2
ns
OFF
Total Gate Charge
Q
V
V
V
= 0 to -20V
= 0 to -10V
= 0 to -2V
V
= -40V, I
= 8A,R
= 5
Ω,
–
–
nC
nC
nC
C/W
C/W
C/W
g(TOT)
GS
GS
GS
DD
D
L
I
= -0.3mA
G(REF)
Gate Charge at -5V
Q
–
–
g(-10)
Threshold Gate Charge
Thermal Resistance Junction to Case
Thermal Resistance Junction to Ambient
Q
–
–
g(TH)
o
o
o
R
–
–
3.125
100
62.5
θ
JC
θ
JA
R
TO-251AA, TO-252AA
TO-220AB
–
–
o
Source to Drain Diode Specifications
T =
25 C
Unless Otherwise Specified
C
PARAMETER
Source to Drain Diode Voltage (Note 2)
Reverse Recovery Time
NOTE:
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
V
V
I
I
= -8A
–
–
–
–
-1.5
125
SD
SD
SD
t
= -8A, dI
/dt = 100A/
µ
s
SD
ns
rr
2. Pulse
test: pulse
width
≤
300
µ
s, Duty Cycle
≤
2%.
3. Repetitive
rating: pulse width is limited by maximum junction temperature.
©2002 Fairchild Semiconductor Corporation
RFD8P05, RFD8P05SM, RFP8P05 Rev. B
RFD8P05, RFD8P05SM, RFP8P05
Typical Performance Curves
Unless Otherwise Specified
1.2
1.0
0.8
0.6
0.4
0.2
0
-10
-8
-6
-4
-2
0
150
125
175
25
50
75
100
125
o
0
25
50
75
100
175
150
o
T ,
CASE TEMPERATURE (
C)
C
T
, CASE TEMPERATURE (
C)
C
FIGURE 1.
NORMALIZED POWER DISSI
P
A
T
ION vs CASE
TEMPERATURE
FIGURE 2.
MAXIMUM CONTINUOUS DRAIN CURRENT vs
CASE TEMPERATURE
10
100
If R = 0
t
= (L) (I
) / (1.3 RATED BV
– V
DD
)
AV
AS DSS
If R
≠
0
DC OPERATION
t
= (L/R) ln [(I
*R) / (1.3 RATED BV
AS
– V
) + 1]
DD
AV
DSS
OPERATION IN THIS
AREA IS LIMITED BY r
I
DM
o
STARTING T
= 25
C
J
DS(ON)
o
STARTING T
= 150
C
J
1
10
o
T
T
= 25
C
C
J
o
= 175
C
1
0.1
-100
-1
-10
, DRAIN TO SOURCE VOLTAGE (V)
0.1
1
10
100
V
t
,
T
IME IN AVALANCHE (ms)
DS
AV
FIGURE 3.
FORWARD BIAS SAFE OPERATING AREA
FIGURE 4.
UNCLAMPED INDUCTIVE SWITCHING CA
P
A
BILITY
20
-20
PULSE DURATION = 80
µ
s
PULSE DURATION = 80
µ
s
V
= -10V
GS
o
V
= -9V
25 C
DUTY CYCLE = 0.5% MAX
= 15V
DUTY CYCLE = 0.5% MAX
GS
o
V
T
= 25
C
DD
C
o
16
12
8
-16
-12
-8
175 C
V
= -8V
= -7V
GS
o
-55 C
V
GS
V
= -6V
= -5V
GS
-4
4
V
GS
V
= -4V
GS
0
0
0
-2
V
-4
-6
-8
-10
0
-3
-6
-9
-12
-15
, DRAIN TO SOURCE VOLTAGE (V)
V
, GATE TO SOURCE VOLTAGE (V)
DS
GS
FIGURE 5.
SATURATION CHARACTERISTICS
FIGURE 6.
TRANSFER CHARACTERISTICS
©2002 Fairchild Semiconductor Corporation
RFD8P05, RFD8P05SM, RFP8P05 Rev. B
RFD8P05, RFD8P05SM, RFP8P05
Typical Performance Curves
Unless Otherwise Specified
3.0
1.50
1.25
1.00
0.75
0.50
0.25
0
PULSE DURATION = 80
µ
s
DUTY CYCLE =0.5% MAX
V
= V
, I
= -250
µ
A
DS
GS
D
2.5
2.0
1.5
1.0
V
= -10
V
, I
=
–
8A
GS
D
0.5
0
-50
0
50
100
150
200
-50
0
50
100
150
200
o
o
T ,
JUNCTION TEMPERATURE (
C)
J
T ,
JUNCTION TEMPERATURE (
C)
J
FIGURE 7.
NORMALIZED DRAIN TO SOURCE ON
RESISTANCE vs JUNCTION TEMPERATURE
FIGURE 8.
NORMALIZED GAT
E
T
HRESHOL
D
V
OLTAGE vs
JUNCTION TEMPERATURE
1000
2.0
V
= 0
V
, f =
1
MHz
GS
ISS
I
= -250
µ
A
D
C
C
C
= C
+ C
GS
GD
= C
GD
RSS
OSS
800
600
400
200
0
≈
C +
C
DS
GS
1.5
1.0
0.5
0
C
ISS
C
OSS
C
RSS
0
-5
-10
-15
-20
-25
-50
0
50
100
150
200
o
T ,
JUNCTION TEMPERATURE (
C)
V
, DRAIN TO SOURCE VOLTAGE (V)
J
DS
FIGURE 9.
NORMALIZED DRAI
N
T
O SOURCE BREAKDOWN
VOLTAGE vs JUNCTION TEMPERATURE
FIGURE 10.
CA
P
ACITANCE vs DRAIN TO SOURCE VOLTAGE
-50
-10
GATE
SOURCE
VOLTAGE
V
= BV
DSS
V
= BV
DSS
DD
DD
-37.5
-25
-8
-6
R
= 6.25
Ω
L
I
= 0.3mA
G(REF)
V
= 10V
GS
0.75BV
0.50BV
0.25BV
DSS
DSS
DSS
-12.5
-4
-2
0
DRAIN TO SOURCE
VOLTAGE
0
I
I
I
I
G(REF)
G(ACT)
G(REF)
20
80
TIME (
µ
s)
G(ACT)
NOTE: Refer
to Application Notes AN7254 and AN7260.
FIGURE 11.
NORMALIZED SWITCHING WAVEFORMS FOR CONSTANT GATE CURRENT
©2002 Fairchild Semiconductor Corporation
RFD8P05, RFD8P05SM, RFP8P05 Rev. B
RFD8P05, RFD8P05SM, RFP8P05
Test Circuits and Waveforms
V
DS
t
AV
L
0
VARY t
TO OBTAIN
P
–
R
REQUIRED PEAK I
G
AS
V
DD
+
DUT
0V
V
DD
t
P
I
AS
V
GS
V
DS
I
AS
t
P
0.01
Ω
BV
DSS
FIGURE 12.
UNCLAMPED ENERGY TEST CIRCUIT
FIGURE 13.
UNCLAMPED ENERGY WAVEFORMS
t
t
ON
OFF
t
t
d(OFF)
d(ON)
t
t
f
r
0
10%
10%
R
L
DUT
–
V
DS
90%
90%
V
DD
R
G
+
V
0
V
GS
GS
10%
50%
50%
90%
PULSE WIDTH
FIGURE 14.
SWITCHING TIME TEST CIRCUIT
FIGURE 15.
RESISTIVE SWITCHING WAVEFORMS
V
DS
V
DS
Q
R
g(TH)
L
0
V
= -1V
-V
GS
V
GS
–
V
= -5V
GS
GS
V
DD
Q
+
g(-5)
V
= -10V
GS
DUT
V
DD
I
g(REF)
Q
g(TOT)
0
I
g(REF)
FIGURE 16.
GATE CHARGE TEST CIRCUIT
FIGURE 17.
GATE CHARGE WAVEFORMS
©2002 Fairchild Semiconductor Corporation
RFD8P05, RFD8P05SM, RFP8P05 Rev. B
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
â
SMART START™
STAR*POWER™
Stealth™
VCX™
FAST
ACEx™
Bottomless™
CoolFET™
OPTOLOGIC™
OPTOPLANAR™
PACMAN™
FASTr™
FRFET™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
SyncFET™
GlobalOptoisolator™
GTO™
HiSeC™
ISOPLANAR™
LittleFET™
MicroFET™
MicroPak™
MICROWIRE™
CROSSVOL
T
™
DenseTrench™
DOME™
POP™
Power247™
PowerTrenc
h
â
QFET™
EcoSPARK™
E
2
CMOS
TM
TinyLogic™
QS™
EnSigna
TM
TruTranslation™
UHC™
QT Optoelectronics™
Quiet Series™
SILEN
T
S
WITCHE
R
â
FACT™
FACT Quiet Series™
UltraFE
T
â
STAR*POWER is used under license
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER
NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILIT
Y
,
F
UNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILIT
Y
A
RISING OUT OF THE APPLICATION OR USE O
F
A
NY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICE
S
O
R
S
YSTEM
S
W
ITHOU
T
T
H
E
E
XPRES
S
W
RITTE
N
A
PPROVA
L
O
F
F
AIRCHIL
D
S
EMICONDUCTO
R
C
ORPORATION.
As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant into
the body, or (b) support or sustain life, or (c) whose
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
reasonably expected to result in significant injury to the
user.
2. A critical component is any component of a life
support device or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or
In Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed
Obsolete
Full Production
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Rev. H4
