PIP-PTA26N65

PTA26N65  

650V N-Channel MOSFET  

General Features  

BV

DSS  

650V  

R

DS(ON),typ.  

280mΩ  

I

D  

‹

‹

‹

‹

Advanced Planar Process  

26A  

R

DS(ON),typ.

=280 mΩ@V

GS

=10V  

Low Gate Charge Minimize Switching Loss  

Rugged Poly silicon Gate Structure  

Applications  

‹

‹

‹

BLDC Motor Driver  

Electric Welder  

High Efficiency SMPS  

G

D

S

Ordering Information  

Part Number  

Package  

Brand  

TO-220F Package  

PTA26N65  

TO-220F  

Absolute Maximum Ratings  

T

C

=25  

unless otherwise specified  

Symbol  

V

DSS  

V

GSS  

Parameter  

PTA26N65  

Unit  

Drain-to-Source Voltage  

Gate-to-Source Voltage  

Continuous Drain Current  

650  

±30  

26  

V

A

I

D  

Continuous Drain Current @ Tc=100  

Pulsed Drain Current at V

GS

=10V

[2,4]  

Single Pulse Avalanche Energy  

Peak Diode Recovery dv/dt

[3]  

Power Dissipation  

17  

I

DM  

104  

1000  

5.0  

E

AS  

dv/dt  

mJ  

V/ns  

W

82  

P

D  

Derating Factor above 25  

0.66  

W/  

Maximum Temperature for Soldering  

Leads at 0.063in (1.6mm) from Case for 10  

seconds, Package Body for 10 seconds  

T

L  

T

PAK  

300  

260  

T

J

& T

STG  

Operating and Storage Temperature Range  

-55 to 150  

Caution: Stresses greater than those listed in the “Absolute Maximum Ratings” may cause permanent damage to the device.  

Thermal Characteristics  

Symbol  

Parameter  

PTA26N65  

Unit  

R

θJC  

Thermal Resistance, Junction-to-Case  

1.52  

/W  

R

θJA  

Thermal Resistance, Junction-to-Ambient  

100  

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Semiconductors and may not be edited, reproduced, or redistributed in any way without written consent from PI

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PTA26N65  

Electrical Characteristics  

OFF Characteristics

 

T

J

=25 unless

 

otherwise specified  

Symbol  

Parameter  

Min. Typ. Max. Unit  

Test Conditions  

BV

DSS  

Drain-to-Source Breakdown Voltage  

650  

—  

—  

V

V

GS

=0V, I

D

=250uA  

—  

—  

—  

—  

—  

—  

—  

—  

1

V

DS

=650V, V

GS

=0V  

I

DSS  

Drain-to-Source Leakage Current  

Gate-to-Source Leakage Current  

uA  

V

DS

=520V, V

GS

=0V,  

T

J

=125  

125  

+100  

-100  

V

GS

=+30V, V

DS

=0V  

V

GS

=-30V, V

DS

=0V  

I

GSS  

nA  

ON Characteristics  

Symbol  

T

J

=25  

unless otherwise specified  

Parameter  

Min. Typ. Max. Unit  

Test Conditions  

Static Drain-to-Source  

On-Resistance  

R

DS(ON)  

V

GS(TH)  

—  

2.0  

—  

280  

—  

380  

4.0  

—  

mΩ  

V

V

GS

=10V, I

D

=13A  

Gate Threshold Voltage  

V

DS

=V

GS

, I

D

=250uA  

g

FS  

Forward Transconductance  

32  

S

V

DS

=25V, I

 

=13A  

D

Dynamic Characteristics  

Essentially independent of operating temperature  

Symbol  

Parameter  

Min. Typ. Max. Unit  

Test Conditions  

C

iss  

Input Capacitance  

—  

—  

—  

—  

—  

—  

4.20  

0.20  

1.40  

78  

—  

—  

—  

—  

—  

—  

V

GS

=0V,  

V

DS

=25V,  

f=1.0MH

Z  

C

rss  

C

oss  

Q

g  

Reverse Transfer Capacitance  

Output Capacitance  

nF  

nC  

Total Gate Charge  

V

DD

=325V,  

I

D

=26A, V

GS

=0 to 10V  

Q

gs  

Q

gd  

Gate-to-Source Charge  

Gate-to-Drain (Miller) Charge  

21  

20  

Resistive Switching Characteristics  

Essentially independent of operating temperature  

Symbol  

Parameter  

Min. Typ. Max. Unit  

Test Conditions  

t

d(ON)  

Turn-on Delay Time  

—  

—  

—  

—  

30  

60  

55  

65  

—  

—  

—  

—  

V

DD

=325V,  

I

D

=13A,  

V

GS

= 10V  

t

t

t

rise  

Rise Time  

nS  

d(OFF)  

fall  

Turn-Off Delay Time  

Fall Time  

R

G

=10Ω  

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Semiconductors and may not be edited, reproduced, or redistributed in any way without written consent from PI

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Rev. A.2019  

PTA26N65  

Source-Drain Body Diode Characteristics  

T

J

=25  

unless otherwise specified  

Symbol  

I

SD  

Parameter  

Continuous Source Current

[2]  

Pulsed Source Current

[2]  

Min  

Typ. Max. Unit  

Test Conditions  

—  

—  

—  

—  

26  

Integral PN-diode in  

MOSFET  

A

I

SM  

104  

V

SD  

trr  

Diode Forward Voltage  

Reverse recovery time  

Reverse recovery charge  

—  

—  

—  

—  

1.5  

—  

V

I

S

=26A, V

GS

=0V  

600  

5.5  

ns  

uC  

V

GS

=0V ,I

F

=26A,  

di

F

/dt=100A/µs  

Qrr  

—  

Note:  

[1] T

J

=+25 to

 

+150  

[2] Silicon limited current only.  

[3] Package limited current.  

[4] Repetitive rating; pulse width limited by maximum junction temperature.  

[5] Pulse width≤380ꢀs; duty cycle≤2%.  

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Semiconductors and may not be edited, reproduced, or redistributed in any way without written consent from PI

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Rev. A.2019  

PTA26N65  

Typical Characteristics  

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Rev. A.2019  

PTA26N65  

Typical Characteristics

(Cont.)  

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PTA26N65  

Typical Characteristics

(Cont.)  

Vdd=325

V

,

I

d=26A  

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PTA26N65  

Test Circuits and

Waveforms  

Fig. 1.1 Peak Diode Recovery dv/dt Test Circuit  

Fig. 1.2 Peak Diode Recovery dv/dt Waveforms  

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Rev. A.2019  

PTA26N65  

Test Circuits and

Waveforms

(Cont.)  

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Semiconductors and may not be edited, reproduced, or redistributed in any way without written consent from PI

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PTA26N65  

Disclaimers:  

Perfect Intelligent Power Semiconductor Co., Ltd (PIP) reserves the right to make changes without notice in order to improve  

reliability, function or design and to discontinue any product or service without notice. Customers should obtain the latest  

relevant information before orders and should verify that such information is current and complete. All products are sold subject  

to PIP’s terms and conditions supplied at the time of order acknowledgement.  

Perfect Intelligent Power Semiconductor Co., Ltd warrants performance of its hardware products to the specifications at the time  

of sale, Testing, reliability and quality control are used to the extent PIP deems necessary to support this warrantee. Except where  

agreed upon by contractual agreement, testing of all parameters of each product is not necessarily performed.  

Perfect Intelligent Power Semiconductor Co., Ltd does not assume any liability arising from the use of any product or circuit  

designs described herein. Customers are responsible for their products and applications using PIP’s components. To minimize  

risk, customers must provide adequate design and operating safeguards.  

Perfect Intelligent Power Semiconductor Co., Ltd does not warrant or convey any license either expressed or implied under its  

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for any such statements.  

Life Support

Policy:  

Perfect Intelligent Power Semiconductor Co., Ltd’s products are not authorized for use as critical components in life support  

devices or systems without the expressed written approval of Perfect Intelligent Power Semiconductor Co., Ltd.  

As used herein:  

1. Life support devices or systems are devices or systems which:  

a. are intended for surgical implant into the human body,  

b. support or sustain life,  

c. whose failure to perform when properly used in accordance with instructions  

for used provided in the labeling, can be reasonably expected to result in significant  

injury to the user.  

2. A critical component is any component of a life support device or system whose failure to perform can be reasonably  

expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.  

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Rev. A.2019