RENESAS-F1200NBGI
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IDTF1200
Intermediate Frequency Digital Variable Gain Amplifier
G
ENERAL
D
ESCRIPTION
F
EATURES
The IDTF1200 is a Digitally Controlled Intermediate
Frequency Differential Variable Gain Amplifier for
BaseStation and other commercial applications with a
low IF frequency.
The device offers extremely low
Noise Figure over the entire gain control range.
The
device is packaged in compact 5×5 Thin QFNs with 200
ohm differential input and output impedances for ease
of integration into the receiver lineup.
Versions
covering IF frequencies up to 300 MHz with low
distortion are available.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
Ideal for high SNR systems
22 dB typ Maximum Gain
23 dB gain control range
7 bit parallel control
0.25 dB Gain Steps
Excellent
Noise Figure < 3.0 dB
5mm x 5mm 28 pin package
200
Ω Differential Input
2
00 Ω
Differential Output
C
OMPETITIVE
A
DVANTAGE
NF degrades < 2dB @ 12dB reduced gain
50 MHz – 160 MHz frequency range
Ultra-Linear:
IP3
O
+48 dBm typical
External current setting resistor
Fast Gain Step Settling < 20 nsec
The F1200 acts to enhance system SNR when VGA gain
is reduced.
The F1200 noise figure (NF) degrades only
slightly (NF slope ~ -0.16
dB
/
dB
) over a 13 dB control
range while holding the Output IP3 approximately
constant. The
resultant improvement in noise can
enhance the system SNR up to 2 decibels at low gain
settings relative to a standard VGA.
D
EVICE
B
LOCK
D
IAGRAM
The device has excellent DNL and INL simplifying digital
compensation. The
device also offers the extremely low
Harmonic, IM2, and IM3 distortion necessary to drive an
ADC directly in an IF sub-sampling application.
`
ATTN
Out
AMP
In
AMP
out
ATTN
In
A
PPLICATIONS
.
.
.
.
BaseStation Diversity Receivers
Digital Pre-Distortion
Wave Point-to-Point Radios
Public Safety Receivers
7
Bias
Control
Decode
Logic
Gain
Control
V
CC
STBY
I
SET
V
CC
V
MODE
P
ART
# M
ATRIX
`
O
RDERING
I
NFORMATION
Gain
Range
IF freq
range
Part#
IP3
O
48
NF
2.6
Omit IDT
prefix
Tape &
Reel
0.75 mm height
age
F1200
F1206*
F1207*
22 to -1
50 – 160
150 – 250
230 – 300
20 to -11
20 to -11
47
46
3.6
3.7
IDT
F120
NBGI8
Industrial
Temp range
Green
RF product
ne
*Future Product
RevO
Page 1 of 13
April, 2011
DATASHEET
IDTF1200
Intermediate Frequency Digital Variable Gain Amplifier
A
BSOLUTE
M
AXIMUM
R
ATINGS
V
CC
to GND
All other Pins to GND
I
SET
to GND
RF Input Power (ATTN_IN+, ATTN_IN-) @G
MAX
Continuous Power Dissipation
θ
JA
(Junction – Ambient)
-0.3V to +5.5V
-0.3V to (V
CC
+0.25V)
-0.3V to +2.2V
+10 dBm
1.5W
+41°C/W
θ
JC
(Junction – Case)
The Case is defined as the exposed paddle
Operating Temperature Range (Case Temperature)
Maximum Junction Temperature
Storage Temperature Range
+4°C/W
T
C
= -40°C to +85°C
150°C
-65°C to +150°C
+260°C
Lead Temperature (soldering, 10s) .
K
EY
F
EATURE
– N
OISE
F
IGURE
S
LOPE
Standard Variable Gain amplifiers exhibit a [NF/Gain] slope of -1 dB/dB.
Practically speaking, as gain is
reduced, Noise Figure degrades dB for dB.
The F1200 utilizes new technology that flattens the Noise Figure
response (~ -0.16 dB/dB) for most of the gain control range while keeping distortion (Output IP3) constant.
The result is that NF is improved up to 16 dB vs. a standard VGA at low gain settings.
The graph below
illustrates this by showing the IDTF1200 NF and IP3O vs. Gain setting contours.
50
45
Output IP3
40
35
30
25
20
15
10
Noise Figure
5
0
-2
0
2
4
6
8
10
12
14
1
18
20
22
Gain (dB)
RevO
Page 2 of 13
April, 2011
DATASHEET
IDTF1200
Intermediate Frequency Digital Variable Gain Amplifier
IDTF1200 S
PECIFICATION
V
CC
= +5.0V,
f
RF
= 100MHz
, T
C
= +25°C, STBY = GND, R6 =
2.87K +/-1%,
P
OUT
= +3 dBm, unless otherwise noted in the condition column.
EVkit trace, transformer & matching losses are de-embedded for specification purposes (note:
de-embedded losses = 0.4dB input and
0.4dB output at 100MHz).
Parameter
Condition
Symbol
min
typ
max
units
Operating Temp.
Range
Case Temperature Measured
at the exposed paddle
T
C
-40 to +85
C
Logic Input High
Logic Input Low
Logic Current
V
IH
V
IL
2.0
1
-1
V
V
0.8
+1
I
IH,
I
IL
μA
Operating voltage
range
Analog & Digital Supplies
V
CC
4.75 to 5.25
V
Total, All V
CC;
R6= 2.87K +/-1%
Total, All V
CC
Supply Current
I
SUPP
103
110
117
2.5
mA
Standby Current
.
.
All digital inputs at 2.0VDC
I
STBY
mA
VCC=5.25VDC
Output IP3 > +40 dBm
Differential
Frequency Range
Input Resistance
Output Resistance
Maximum Gain
Minimum Gain
Gain Step
f
RF
R
IN
50 to 160
200
MHz
Ω
Differential
R
OUT
G
MAX
G
MIN
LSB
Φ
SLOPE
DNL
INL
200
Ω
GC = [0000000]
GC = [1011101]
20.7
-2.8
21.7
-1.7
22.6
-0.7
dB
dB
0.25
0.3
dB
ΔΦ due to change in gain
Between adjacent 1dB steps
Error vs. straight line
At Maximum Gain
Phase Slope
deg/dB
dB
Differential Gain Error
Integral Gain Error
Noise Figure
.05
+/-0.20
2.6
dB
NF
dB
GC = [0110100] (gain = 9dB)
Noise Figure
NF
BACK
4.55
dB
.
.
.
Set code = 0000000, (G
MAX
Pout = +3 dBm per tone
800 KHz Tone Separation
)
Output IP3
IP3
O1
IP3
O2
48
44
dBm
dBm
.
.
.
Set code
=
0110100
,
,
(Gain = 9dB)
Pout = +3 dBm per tone
Output IP3 –
at Gback
800 KHz Tone Separation
.
.
Gain Step from 22 to 21 dB setting
Settles to within 0.1 dB of final
value
Settling Time
2
nd
Harmonic
T
1dB
15
2
nsec
.
F
RF
= 100 MHz
.
.
Set code = 0000000, (G
MAX
Pout = +3 dBm
)
H2
CB
-82
dBc
#
Parallel
# Control Bits
1 dB Compression
.
.
Set code = 0000000, (G
MAX
Single Tone Test
)
P1dB
O
+16.7
+19.4
dBm
1 –Items in
bold italics
are Guaranteed by Test
2 – See Graph on Page 8
RevO
Page 3 of 13
April, 2011
DATASHEET
IDTF1200
Intermediate Frequency Digital Variable Gain Amplifier
T
YPICAL
O
PERATING
P
ARAMETRIC
C
URVES
(G
MAX
, 5.00V, 25C, P
OUT
+3 dBm, 100MHz unless otherwise noted)
Gain vs. Temperature
Gain vs. Voltage
25
25
20
15
10
20
15
10
5
5
-40C
25C
85C
4.75V
5.00V
5.25V
0
0
0
50
100
150
200
250
250
250
300
300
300
0
50
100
150
200
250
300
Frequency (MHz)
Frequency (MHz)
S11 vs. Temperature
S22 vs. Temperature
0
0
-10
-20
-30
-10
-20
-30
-40
-40
-40C
25C
85C
-40C
25C
85C
-50
-50
0
50
100
150
200
0
50
100
150
200
250
300
Frequency (MHz)
Frequency (MHz)
S12 vs. Temperature
Gain and NF vs. Frequency
(measured w/NF meter)
0
24
22
20
18
16
14
-10
-20
-30
-40
Gain
Noise Figure
12
10
8
6
4
-40C
25C
85C
2
0
-50
30
50
0
90
110
130
150
170
0
50
100
150
200
Frequency (MHz)
Frequency (MHz)
RevO
Page 4 of 13
April, 2011
DATASHEET
IDTF1200
Intermediate Frequency Digital Variable Gain Amplifier
TOC
S CONTINUED
S22 vs. Gain Setting
S11 vs. Gain Setting
0
0
-5
-5
-10
-15
-20
-25
-30
-35
-40
-45
-50
-10
-15
-20
-25
-30
-35
-40
-45
-50
50 MHz
50 MHz
100 MHz
150 MHz
100 MHz
150 MHz
-1
3
7
11
15
19
23
-1
3
7
11
15
19
23
Gain Setting (dB)
Gain Setting (dB)
S21 Phase vs. Gain Setting
S21 vs. Gain Setting
40
35
30
25
20
15
10
5
22
20
18
16
14
12
10
8
50 MHz
100 MHz
150 MHz
6
50 MHz
4
100 MHz
150 MHz
0
2
-5
0
-10
-2
-1
3
7
11
15
19
23
-1
3
7
11
15
19
23
Gain Setting (dB)
Gain Setting (dB)
EVKit Gain Correction
EVKit NF & Output IP3 Correction
2.0
1.8
1.6
1.6
NF correction
IP3 correction
Correct EVkit measured
Output
IP3 by
this amount to account for
trace & transformer losses
1.2
Correct EVkit measured
Gain
by this amount to account for
trace & transformer losses
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
0.8
0.4
0.0
-0.4
-0.8
Correct EVkit measured Noise
Figure by
this amount to account
for trace & transformer losses
-1.2
-1.6
0
50
100
150
200
250
300
0
50
100
150
200
250
300
Frequency (MHz)
Frequency (MHz)
RevO
Page 5 of 13
April, 2011
DATASHEET
IDTF1200
Intermediate Frequency Digital Variable Gain Amplifier
TOC
S CONTINUED
DNL vs. Voltage (100 MHz, 1dB Steps)
DNL vs. Frequency (1dB Steps)
0.20
0.15
0.10
0.05
0.00
-0.05
-0.10
-0.15
-0.20
0.20
0.15
100 MHz
0.10
5.25V
80 MHz
120 MHz
0.05
0.00
-0.05
5.00V
4.75V
50 MHz
30 MHz
-0.10
-0.15
-0.20
-1
1
3
5
7
9
11
13
15
17
19
21
-1
1
3
5
7
9
11
13
15
17
19
21
Gain Setting (dB)
Gain Setting (dB)
DNL vs. Temperature (100 MHz, 0.5dB Steps)
DNL vs. Temperature (100 MHz, 1dB Steps)
0.20
0.20
0.15
0.15
-40C
-40C
0.10
0.05
0.00
0.10
0.05
0.00
-0.05
-0.05
85C
25C
25C
85C
-0.10
-0.10
-0.15
-0.20
-0.15
-0.20
-1
1
3
5
7
9
11
13
15
17
19
21
-1
1
3
5
7
9
11
13
15
17
19
21
Gain Setting (dB)
Gain Setting (dB)
INL vs. Frequency
DNL vs. Temperature (100 MHz, 0.25dB Steps)
0.40
0.20
0.30
0.15
120 MHz
-40C
0.20
0.10
0.10
0.05
0.00
-0.05
0.00
100 MHz
-0.10
-0.20
-0.30
-0.40
25C
85C
-0.10
-0.15
-0.20
50 MHz
-1
1
3
5
7
9
11
13
15
17
19
21
-1
1
3
5
7
9
11
13
15
17
19
21
Gain Setting (dB)
Gain Setting (dB)
RevO
Page 6 of 13
April, 2011
DATASHEET
IDTF1200
Intermediate Frequency Digital Variable Gain Amplifier
TOC
S CONTINUED
INL vs. Voltage (100 MHz)
INL vs. Temperature (100 MHz)
0.40
0.30
0.20
0.10
0.00
-0.10
-0.20
-0.30
-0.40
0.40
-40C
5.00V
0.30
0.20
25C
5.25V
0.10
0.00
4.75V
-0.10
-0.20
-0.30
-0.40
85C
-1
1
3
5
7
9
11
13
15
17
19
21
-1
1
3
5
7
9
11
13
15
17
19
21
Gain Setting (dB)
Gain Setting (dB)
Noise Figure vs. Voltage (100 MHz)
Noise Figure vs. Frequency
20
18
16
14
20
18
16
14
12
10
8
12
5.00V
100 MHz
10
8
4.75V
150 MHz
6
6
4
4
5.25V
50 MHz
2
2
0
0
-1
1
3
5
7
9
11
13
15
17
19
21
-1
1
3
5
7
9
11
13
15
17
19
21
Gain Setting (dB)
Gain Setting (dB)
Output P1dB vs. Voltage
Noise Figure vs. Temperature (100 MHz)
20
18
16
14
24
23
22
5.00V
5.25V
21
12
25C
20
19
10
85C
8
6
18
4.75
17
16
15
14
4
-40C
2
0
-1
1
3
5
7
9
11
13
15
17
19
21
80 MH
100 MHz
Frequency (MHz)
120 MHz
Gain Setting (dB)
RevO
Page 7 of 13
April, 2011
DATASHEET
IDTF1200
Intermediate Frequency Digital Variable Gain Amplifier
TOC
S
C
ONTINUED
Output IP3 vs. Voltage (100 MHz)
Output IP3 vs. Frequency
60
55
50
45
40
35
30
25
60
55
50
45
40
4.75V
5.00V
5.25V
IP3-
IP3+
35
30
25
4.0E+07
6.0E+07
8.0E+07
1.0E+08
Frequency (Hz)
1.2E+08
1.4E+08
1.6E+08
-1.25
10
Gain Setting (dB)
22
2
nd
Harmonic vs. Temperature (100 MHz)
Output IP3 vs. Temperature (100 MHz)
-50
60
55
-60
-40C
25C
50
-70
45
25C
40
-80
85C
85C
35
30
25
-90
-40C
-100
-1.25
10
22
-1.25
10
22
Gain Setting (dB)
Gain Setting (dB)
Settling Time (1 dB Step, 100 MHz)
Settling Time (16dB Step, 100 MHz)
RevO
Page 8 of 13
April, 2011
DATASHEET
IDTF1200
Intermediate Frequency Digital Variable Gain Amplifier
P
IN
D
IAGRAM
TOP View
(looking through the top of the package)
28
27
26
25
24
23
22
Exposed Pad
1
2
3
4
5
6
7
21
20
19
18
17
16
15
I
SET
GND
V
CC
ATTN
ATTN_IN +
ATTN_IN –
GND
Package Drawing
STBY
5 mm
x 5 mm package dimension
3.25 mm
x 3.25 mm exposed pad
0.5 mm pitch
AMP_OUT –
AMP_OUT +
V
MODE
28 pins
0.75 mm height
0.25 mm pad width
0.40 mm pad length
GND
DIG_GND
V
CC
DIG
GND
8
9
10
11
12
13
14
RevO
Page 9 of 13
April, 2011
DATASHEET
IDTF1200
Intermediate Frequency Digital Variable Gain Amplifier
P
ACKAGE
D
RAWING
RevO
Page 10 of 13
April, 2011
DATASHEET
IDTF1200
Intermediate Frequency Digital Variable Gain Amplifier
P
IN
D
ESCRIPTIONS
Pin #
1
Pin Name
GND
Function
2
3
4
5
6
7
8
9
V
CC
_ATTN
ATTN_IN+
ATTN_IN-
Ground
Ground
Ground
GC6
Attenuator Power Supply
Attenuator_0 Differential Input P
Attenuator_0 Differential Input M
Untested – SPI Chip Select Input
Untested – SPI Data Input
Untested – SPI Clock Input
Parallel Gain Control Input – MSB (16 dB step)
Parallel Gain Control Input
GC5
10
11
12
13
14
15
16
17
GC4
GC3
GC2
GC1
Parallel Gain Control Input
Parallel Gain Control Input
Parallel Gain Control Input
Parallel Gain Control Input
Parallel Gain Control Input – LSB (0.25 dB step)
Digital Circuit Power Supply
Connect directly to Ground
GC0
V
CC
_DIG
DIG_GND
V
MODE
Untested – SPI Enable
Connect to PCB GND for normal parallel operation
Amplifier Differential Output P
Amplifier Differential Output M
Amplifier Power Down.
Ground for Normal operation
Current Setting Resistor.
Connect recommended
value (2.87K) to ground.
Use 1% tolerance
Amplifier and Bias Circuit Power Supply
Amplifier Bias External Pin for Decoupling Capacitor
Amplifier Differential Input P
Amplifier Common Emitter
Amplifier Differential Input M
Attenuator_0 Differential Output M
Attenuator_0 Differential Output P
18
19
20
21
AMP_OUT+
AMP_OUT-
STBY
I
SET
22
23
24
25
26
27
28
V
CC
_Amp_Bias
Bias_Amp
AMP_IN+
E_Amp
AMP_IN-
ATTN_OUT-
ATTN_OUT+
Exposed Paddle
RevO
Page 11 of 13
April, 2011
DATASHEET
IDTF1200
Intermediate Frequency Digital Variable Gain Amplifier
EV
KIT
/ A
PPLICATIONS
C
IRCUIT
S
CHEMATIC
The diagram below describes the recommended applications / EVkit circuit:
Vcc
C4
C1
C9
C2
Vcc
C8
Vcc
C10
JP1
R4
28
27
26
25
24
23
22
C11
I
SET
R6
GND
V
CC
ATTN
ATTN_IN +
ATTN_IN –
1
2
3
4
5
6
7
21
20
19
18
17
16
15
Bias
Control
STBY
L1
T2
AMP_OUT –
AMP_OUT +
V
MODE
C13
C17
Vcc
C24
C23
T1
L2
GND [CS]
GND [DATA]
GND [CLK]
DIG_GND
V
CC
DIG
Coilcraft
1008CS
Decode
Logic
SPI
(Untested)
C20
R13
C19
R11
R14
JP3
R15
R16
R20
8
9
10
11
12
13
14
GC6
GC5
GC4
Vcc
R17
R18
R19
Vcc
GC3
GC2
GC1
GC0
C21
C22
Vcc
1
2
13
14
11
9
7
8
5
6
3
4
JP5
12
10
Vcc
RevO
Page 12 of 13
April, 2011
DATASHEET
IDTF1200
Intermediate Frequency Digital Variable Gain Amplifier
The picture and table below describes the recommended EVkit operation and BOM
*
Serial Mode Untested,
Not Guaranteed to Work
Power Up:
•Closed = On
•Open = Off
DC Power
I
SET
5×5 QFN
Device
EVB Serial #
Pullup
Inductors
Output 4:1 Balun
Transformer
Input 4:1 Balun
Transformer
AMP_OUT
ATTN_IN
50
Ω
50
Ω
SPI*
V
MODE
•Closed = Parallel Control
•Open = Serial Control*
GC [0-6]
V
CC
REF / MONITOR
Desc
Item #
Value
Size
Mfr. Part #
Mfr.
Ref Des
4:1 Center Tap Balun
1
2
3
4
5
6
7
8
9
4:1 Balun
SM-22
0402
0402
0402
1008
0402
0402
0402
.062
TC4-1TG2+
Mini Circuits
Panasonic
Yageo
T1,T2
RES 2.87K OHM 1/10W 1% 0402 SMD
Pullup resistors for STBY and VMODE jumpers
RES 0.0 OHM 1/10W 0402 SMD
RF inductor, ceramic core, 5% tol, SMT, RoHS
CAP CER 10000PF 16V 10% X7R 0402
CAP CER 1000PF 50V C0G 0402
CAP CER .1UF 10V 10% X5R 0402
SMA_END_LAUNCH
2.87k
47k
ERJ-2RKF2871X
RC0402FR-0747KL
ERJ-2GE0R00X
1008CS-681XJLC
GRM155R71C103KA01D
GRM1555C1H102JA01D
GRM155R61A104KA01D
142-0711-821
R6
R4, R13
0
Panasonic
Coilcraft
MURATA
MURATA
MURATA
R11
680 nH
10 nF
1000 pF
0.1uF
SMA
L1,L2
1,C2,C8,C23,C24
C4,C10,C13,C19
C9,C11,C17,C20
Emer
ohnson J1,J2,J3
CONN HEADER VERT SGL 2POS GOLD
CONN HEADER 14 POS STRGHT GOLD
IF VGA
10 Header_2Pin
TH_2
961102-6404-AR
N2514-6002-RB
3M
3M
IDT
JP1,JP3
JP5
11 Header_14Pin
TH_7x2
12 F1200ZD
13 PCB
QFN-28
Q01B005M
U1
F1200 E
Kit Rev 1
Resistors to ground on Gain ctrl lines
14 DNP
0402
R14 thru R20
RevO
Page 13 of 13
April, 2011
IMPORTANT NOTICE AND DISCLAIMER
RENESAS ELECTRONICS CORPORATION AND ITS SUBSIDIARIES (“RENESAS”) PROVIDES TECHNICAL
SPECIFICATIONS AND RELIABILITY DATA (INCLUDING DATASHEETS), DESIGN RESOURCES (INCLUDING
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ITNESS FOR A
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(Rev.1.0 Mar
2020)
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