Shikues-2N7002G
| Part # | Shikues-2N7002G |
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2N7002G
N-Channel Enhancement Mode Field Effect Transistor
Features
● Trench Power MV MOSFET technology
● Voltage controlled small signal switch
● Low input Capacitance
3
● Fast Switching Speed
● Low Input / Output Leakage
Applications
● Battery operated systems
● Solid-state relays
● Direct logic-level interface
:
TTL/CMOS
2
1
Quick reference
● V
DS
60V
● I
D
340mA
● R
DS(ON)
( at V
GS
=10V)
● R
DS(ON)
( at V
GS
=4.5V)
<
2.5ohm
<
3.0ohm
Pin Description
Pin Description
Simplified Outline
Symbol
D
1 Gate(G)
2 Source(S)
3 Drain(D)
G
S
Absolute Maximum Ratings
(T =25
℃
unless otherwise noted)
■
A
Parameter
Symbol
Limit
60
Unit
V
Drain-source Voltage
Gate-source Voltage
Drain Current
V
DS
V
GS
±
30
V
T
A
=25
℃
@ Steady State
T
A
=70
℃
@ Steady State
340
272
I
D
mA
A
Pulsed Drain Current
A
Total Power Dissipation @ T
A
=25
℃
I
DM
1.5
350
357
P
D
mW
℃
/
W
℃
Thermal Resistance Junction-to-Ambient @ Steady State
B
Junction and Storage Temperature Range
R
θJA
T
J
,T
STG
-55
~
+150
REV.08
1 of
5
2N7002G
Electrical Characteristics ( TA = 25
°
C Unless Otherwise Noted )
Parameter
Static Parameter
Symbol
Conditions
Min
Typ
Max
Units
Drain-Source Breakdown Voltage
Zero Gate Voltage Drain Current
BV
DSS
I
DSS
V
GS
= 0V, I
D
=250μA
V
DS
=60V,V
GS
=0V
60
V
1
μA
nA
nA
V
I
GSS1
I
GSS2
V
GS(th)
V
GS
=
±
30V, V
DS
=0V
V
GS
=
±
20V, V
DS
=0V
V
DS
= V
GS
, I
D
=250μA
V
GS
= 10V, I
D
=300mA
V
GS
= 4.5V, I
D
=200mA
V
DS
=10 V, I
D
=200mA
I
S
=300mA,V
GS
=0V
±
100
±
50
2.5
Gate-Body Leakage Current
Gate Threshold Voltage
1
1.6
1.2
1.3
2.5
Static Drain-Source On-Resistance
R
DS(ON)
Ω
3.0
Forward Transconductance
Diode Forward Voltage
Maximum Body-Diode Continuous Current
Dynamic Parameters
Input Capacitance
gfs
V
SD
I
S
80
ms
V
1.2
340
mA
C
iss
C
oss
C
rss
27.5
2.75
1.9
Output Capacitance
V
DS
=30V,V
GS
=0V,f=1MHZ
pF
nC
ns
Reverse Transfer Capacitance
Switching Parameters
T
o
tal Gate Charge
Q
g
Q
gs
Q
gd
Q
rr
t
rr
1.6
0.47
0.25
2.5
Gate-Source Charge
V
GS
=10V,V
DS
=30V,I
D
=0.3A
I
F
=0.3A, di/dt=-100A/us
Gate-Drain Charge
Reverse Recovery Charge
Reverse Recovery Time
Turn-on Delay Time
11.5
3.3
t
D(on)
t
r
t
D(off)
t
f
Turn-on Rise Time
19
V
GS
=10V,V
DD
=30V, I
D
=300mA,
R
GEN
=6Ω
Turn-off Delay Time
9.6
Turn-off fall Time
49
A. Pulse Test: Pulse Width
≤
300us,Duty cycle
≤
2%.
B. Device mounted on FR-4 PCB, 1 inch x 0.85 inch x 0.062 inch.
REV.08
2 of
5
2N7002G
■ Typical Performance Characteristics
Figure1. Output
Characteristics
Figure2. Transfer
Characteristics
Figure3. Capacitance
Characteristics
Figure4. Gate Charge
Figure5. Drain-Source on Resistance
Figure6. Drain-Source on Resistance
REV.08
3 of
5
2N7002G
Figure7. Safe Operation Area
Figure8. Switching wave
REV.08
4 of
5
2N7002G
Package Dimensions
SOT-23
REV.08
5
of
5
