STANSON-Tech–ST3422A

ST3422A  

N Channel Enhancement Mode MOSFET  

6.0A  

DESCRIPTION  

The ST3422A is the N-Channel logic enhancement mode power field effect transistor is  

produced using high cell density, DMOS trench technology.  

This high-density process is especially tailored to minimize on-state resistance. These  

devices are particularly suited for low voltage application such as cellular phone and  

notebook computer power management and other battery powered circuits where high  

side switching

.  

FEATURE  

PIN CONFIGURATION  

SOT-23-3L  

l

l

l

l

l

60V/6.0A, R

DS(ON)

= 28m

Ω

(Typ.)  

@V

GS

= 10V  

60V/2.5A, R

DS(ON)

= 38m

Ω  

@V

GS

= 4.5V  

Super high density cell design for  

extremely low R

DS(ON)  

Exceptional on-resistance and maximum  

DC current capability  

3

D

G

S

2

1

SOT-23-3L package design  

1.Gate 2.Source 3.Drain  

PART MARKING  

SOT-23-3L  

3

22YA  

1

2

Y: Year Code

 

A: Week Code  

1

120 Bentley Square, Mountain View, Ca 94040 USA  

STN3422A 2009.

 

V1  

ST3422A  

N Channel Enhancement Mode MOSFET  

6.0A  

℃

ABSOULTE MAXIMUM RATINGS

(Ta = 25

 

Unless otherwise noted )  

Parameter  

Symbol  

V

DSS  

V

GSS  

I

D  

Typical  

Unit  

Drain-Source Voltage  

60  

V

V

±

20  

Gate-Source Voltage  

T

A

=25

℃  

6.0  

4.6  

℃

Continuous Drain CurrentTJ=150

 

)  

A

℃

T

A

=70  

Pulsed Drain Current  

I

DM  

20  

A

Continuous Source Current (Diode Conduction)  

I

S  

1.7  

A

T

A

=25

℃  

2.0  

1.3  

Power Dissipation  

P

D  

W

℃

℃

℃

T

A

=70  

Operation Junction Temperature  

Storgae Temperature Range  

T

J  

-55/150  

-55/150  

75  

T

STG  

℃

θ

/W  

R

Thermal Resistance-Junction to Ambient  

JA  

2

120 Bentley Square, Mountain View, Ca 94040 USA  

STN3422A 2009.

 

V1  

ST3422A  

N Channel Enhancement Mode MOSFET  

6.0A  

℃

ELECTRICAL CHARACTERISTICS

( Ta = 25

 

Unless otherwise noted )  

Parameter  

Symbol  

Condition  

Min Typ Max  

Unit  

Static  

Drain-Source Breakdown  

Voltage  

V

(BR)DSS  

V

GS(th)  

I

GSS  

V

GS

=0V,I

D

=250uA  

V

DS

=VGS,I

D

=250uA  

60  

V

V

Gate Threshold Voltage  

Gate Leakage Current  

1

3

±

±

V

DS

=0V,V

GS

= 20V  

100  

1

nA  

V

DS

=48V,V

GS

=0V  

V

DS

=48V,V

GS

=0V  

Zero Gate Voltage Drain  

Current  

I

DSS  

uA  

10  

℃

T

J

=55  

V

GS

=10V,I

D

=6.0A  

V

GS

=4.5V,I

D

=2.5A  

28  

38  

35  

45  

Ω

m

Drain-source On-Resistance  

R

DS(on)  

Forward Transconductance  

Diode Forward Voltage  

Dynamic  

g

fs  

V

DS

=4.5V,I

D

=5.8A  

I

S

=1.7A,V

GS

=0V  

11  

S

V

SD  

1.2  

22  

V

Total Gate Charge  

Gate-Source Charge  

Gate-Drain Charge  

Q

g  

Q

gs  

Q

gd  

10  

1.8  

3.8  

V

DS

=15V  

V

GS

=10V  

nC  

pF  

≡

I

D

6.7A  

Input Capacitance  

C

iss  

C

oss  

C

rss  

455  

243  

38  

V

DS

=15V  

V

GS

=0V  

F=1MH

z  

Output Capacitance  

Reverse Transfer Capacitance  

8

15  

V

DD

=15V  

t

d(on)  

Turn-On Time  

Turn-Off Time  

Ω

R

L

=15  

tr  

10  

20  

11  

20  

40  

20  

I

D

=1.0A  

V

GEN

=10V  

nS  

t

d(off)  

tf  

Ω

R

G

=6  

3

120 Bentley Square, Mountain View, Ca 94040 USA  

STN3422A 2009.

 

V1  

ST3422A  

N Channel Enhancement Mode MOSFET  

6.0A  

℃

TYPICAL CHARACTERICTICS

(25 Unless

 

noted)  

4

120 Bentley Square, Mountain View, Ca 94040 USA  

STN3422A 2009.

 

V1  

ST3422A  

N Channel Enhancement Mode MOSFET  

6.0A  

℃

TYPICAL CHARACTERICTICS

(25 Unless

 

noted)  

5

120 Bentley Square, Mountain View, Ca 94040 USA  

STN3422A 2009.

 

V1  

ST3422A  

N Channel Enhancement Mode MOSFET  

6.0A  

SOT-23-3L PACKAGE OUTLINE  

6

120 Bentley Square, Mountain View, Ca 94040 USA  

STN3422A 2009.

 

V1