STANSON-Tech–STN1810
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STN1810
N Channel Enhancement Mode MOSFET
8.0A
DESCRIPTION
STN1810 is the N-Channel logic enhancement mode power field effect transistor which
is produced using high cell density, DMOS trench technology. This high density
process is especially tailored to minimize on-state resistance and provide superior
switching performance. These applications such as notebook computer power
management and other battery powered circuits where high-side switching, low in-
line power loss and resistance to transients are melded.
FEATURE
PIN CONFIGURATION
SOP-8
ò
ò
ò
ò
ò
100V/8.0A, R
DS(ON)
= 140mΩ (Typ.)
@V
GS
= 10V
100V/6.5.0A, R
DS(ON)
= 150mΩ
@V
GS
= 7.0V
Super high density cell design for
extremely low R
DS(ON)
Exceptional on-resistance and maximum
DC current capability
SOP-8 package design
PART MARKING
Y: Year Code
A: Process Code
STANSON TECHNOLOGY
120 Bentley Square, Mountain View, Ca 94040 USA
Copyright © 2007, Stanson Corp.
STN1810 2009.
V1
STN1810
N Channel Enhancement Mode MOSFET
8.0A
℃
ABSOULTE MAXIMUM RATINGS
(Ta = 25
Unless otherwise noted )
Parameter
Drain-Source Voltage
Symbol
Typical
100
Unit
VDSS
V
V
Gate-Source Voltage
VGSS
ID
±20
TA=25
℃
Continuous Drain Current
8.0
6.0
A
℃
(TJ=150 )
℃
TA=70
Pulsed Drain Current
IDM
IS
12
A
Continuous Source Current (Diode Conduction)
2.3
A
TA=25
℃
2.8
1.8
Power Dissipation
PD
W
℃
℃
℃
TA=70
Operation Junction Temperature
Storgae Temperature Range
TJ
150
-55/150
80
TSTG
RθJA
℃
/W
Thermal Resistance-Junction to Ambient
STANSON TECHNOLOGY
120 Bentley Square, Mountain View, Ca 94040 USA
Copyright © 2007, Stanson Corp.
STN1810 2009.
V1
STN1810
N Channel Enhancement Mode MOSFET
8.0A
℃
ELECTRICAL CHARACTERISTICS
( Ta = 25
Unless otherwise noted )
Parameter
Static
Symbol
Condition
Min
Typ
Max
Unit
Drain-Source
Breakdown Voltage
Gate Threshold
Voltage
V
(BR)DSS
V
GS(th)
I
GSS
V
GS
=0V,ID=250uA
V
DS
=V
GS
,ID=250uA
100
1.0
V
V
3.0
±100
250
Gate Leakage Current
V
DS
=0V,V
GS
=±20V
V
DS
=80V,V
GS
=0V
V
DS
=80V,V
GS
=0V
nA
Zero Gate Voltage
Drain Current
I
DSS
uA
A
5
℃
T
J
=5
On-State Drain
Current
V
DS
≧
5V,V
GS
=10V
I
D(on)
8
V
GS
=10V,I
D
=10A
140
155
Drain-source On-
Resistance
R
DS(on)
mΩ
V
GS
=7.0V,I
D
=6.5A
V
DS
=5V,I
D
=6.2AV
150 170
5.6
Forward
Transconductance
gfs
S
V
Diode Forward Voltage
V
SD
I
S
=1A,V
GS
=0V
1.3
Dynamic
Total Gate Charge
Q
g
Q
gs
Q
gd
20
3.5
5.2
V
DS
=80V,V
GS
=5V
Gate-Source Charge
≡
I
D
5A
nC
pF
Gate-Drain Charge
Input Capacitance
C
iss
630
68
Output Capacitance
V
DS
=25V,VGS=0V
F=1MHz
C
oss
Reverse
TransferCapacitance
C
rss
43
6.5
t
d(on)
tr
Turn-On Time
Turn-Off Time
10
13
3.4
V
DD
=50V,R
D
=10Ω
V
DS
=30V,R
G
=3.3Ω
nS
t
d(off)
tf
≡
I
D
5A
STANSON TECHNOLOGY
120 Bentley Square, Mountain View, Ca 94040 USA
Copyright © 2007, Stanson Corp.
STN1810 2009.
V1
STN1810
N Channel Enhancement Mode MOSFET
8.0A
TYPICAL CHARACTERICTICS
STANSON TECHNOLOGY
120 Bentley Square, Mountain View, Ca 94040 USA
Copyright © 2007, Stanson Corp.
STN1810 2009.
V1
STN1810
N Channel Enhancement Mode MOSFET
8.0A
TYPICAL CHARACTERICTICS
STANSON TECHNOLOGY
120 Bentley Square, Mountain View, Ca 94040 USA
Copyright © 2007, Stanson Corp.
STN1810 2009.
V1
STN1810
N Channel Enhancement Mode MOSFET
8.0A
TYPICAL CHARACTERICTICS
STANSON TECHNOLOGY
120 Bentley Square, Mountain View, Ca 94040 USA
Copyright © 2007, Stanson Corp.
STN1810 2009.
V1
STN1810
N Channel Enhancement Mode MOSFET
8.0A
PACKAGE OUTLINE SOP-8P
STANSON TECHNOLOGY
120 Bentley Square, Mountain View, Ca 94040 USA
Copyright © 2007, Stanson Corp.
STN1810 2009.
V1
