STANSON-Tech–STN4480
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STN4480
N Channel Enhancement Mode MOSFET
14.0A
DESCRIPTION
STN4480 is the NꢀChannel logic enhancement mode power field effect transistor which
is produced using high cell density, DMOS trench technology. This high density
process is especially tailored to minimize onꢀstate resistance. These devices are
particularly suited for low voltage application such as power management and other
battery powered circuits where highꢀside switching.
FEATURE
PIN CONFIGURATION
SOP-8
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
40V/14.0A, R
DS(ON)
= 13mꢁ (Typ.)
@V
GS
= 10V
40V/5.0A, R
DS(ON)
= 15mꢁ
@V
GS
= 4.5V
Super high density cell design for
extremely low R
DS(ON)
Exceptional onꢀresistance and maximum
DC current capability
SOPꢀ8 package design
PART MARKING
Y: Year Code
A: week Code
Q: Process Code
STANSON TECHNOLOGY
120 Bentley Square, Mountain View, Ca 94040 USA
Copyright © 2007, Stanson Corp.
STN4480 2010.
V1
STN4480
N Channel Enhancement Mode MOSFET
14.0A
℃
ABSOULTE MAXIMUM RATINGS
(Ta = 25
Unless otherwise noted )
Parameter
DrainꢀSource Voltage
Symbol
Typical
40
Unit
VDSS
V
V
GateꢀSource Voltage
VGSS
ID
±20
TA=25
℃
Continuous Drain Current
14.0
10.0
A
℃
(TJ=150 )
℃
TA=70
Pulsed Drain Current
IDM
IS
70
A
Continuous Source Current (Diode Conduction)
4.0
A
TA=25
℃
3.1
2.0
Power Dissipation
PD
W
℃
℃
℃
TA=70
Operation Junction Temperature
Storgae Temperature Range
TJ
150
ꢀ55/150
59
TSTG
RθJA
℃
/W
Thermal ResistanceꢀJunction to Ambient
STANSON TECHNOLOGY
120 Bentley Square, Mountain View, Ca 94040 USA
Copyright © 2007, Stanson Corp.
STN4480 2010.
V1
STN4480
N Channel Enhancement Mode MOSFET
14.0A
℃
ELECTRICAL CHARACTERISTICS
( Ta = 25
Unless otherwise noted )
Parameter
Static
Symbol
Condition
Min
Typ
Max
Unit
DrainꢀSource
Breakdown Voltage
Gate Threshold
Voltage
V
(BR)DSS
V
GS(th)
I
GSS
V
GS
=0V,ID=250uA
V
DS
=V
GS
,ID=250uA
40
V
V
1.0
3.0
±100
1
Gate Leakage Current
V
DS
=0V,V
GS
=±20V
V
DS
=32V,V
GS
=0V
V
DS
=32V,V
GS
=0V
nA
Zero Gate Voltage
Drain Current
I
DSS
uA
5
℃
T
J
=55
Drainꢀsource Onꢀ
Resistance
V
GS
=10V,I
D
=14A
V
GS
=4.5V,I
D
=8A
13 15.5
15 18.0
R
DS(on)
mꢁ
Forward
Transconductance
gfs
V
DS
=15V,I
D
=6.2AV
I
S
=2.3A,V
GS
=0V
50
S
V
Diode Forward Voltage
V
SD
1.0
Dynamic
Total Gate Charge
Q
g
Q
gs
Q
gd
22
10.5
4.8
V
DS
=20V,V
GS
=10V
GateꢀSource Charge
≡
I
D
14A
nC
pF
GateꢀDrain Charge
Input Capacitance
C
iss
1600
320
Output Capacitance
V
DS
=20V,VGS=0V
F=1MHz
C
oss
Reverse
TransferCapacitance
C
rss
102
3.5
t
d(on)
tr
TurnꢀOn Time
TurnꢀOff Time
V
DS
=20V, V
GS
=10V
R
L
= 1.5ꢁ
I
D
=5.0A,V
GEN
=3ꢁ
6
nS
13.2
3.5
t
d(off)
tf
STANSON TECHNOLOGY
120 Bentley Square, Mountain View, Ca 94040 USA
Copyright © 2007, Stanson Corp.
STN4480 2010.
V1
STN4480
N Channel Enhancement Mode MOSFET
14.0A
TYPICAL CHARACTERICTICS
STANSON TECHNOLOGY
120 Bentley Square, Mountain View, Ca 94040 USA
Copyright © 2007, Stanson Corp.
STN4480 2010.
V1
STN4480
N Channel Enhancement Mode MOSFET
14.0A
TYPICAL CHARACTERICTICS
STANSON TECHNOLOGY
120 Bentley Square, Mountain View, Ca 94040 USA
Copyright © 2007, Stanson Corp.
STN4480 2010.
V1
STN4480
N Channel Enhancement Mode MOSFET
14.0A
PACKAGE OUTLINE SOP-8P
STANSON TECHNOLOGY
120 Bentley Square, Mountain View, Ca 94040 USA
Copyright © 2007, Stanson Corp.
STN4480 2010.
V1
