STMicroelectronics-BAL-NRF02D3

BAL-NRF02D3  

50 ohm nominal input / conjugate match balun to nRF51822-  

CEAA/CDAB/CFAC and nRF51422-CEAA/CDAB/CFAC  

Datasheet – production data  

Description  

STMicroelectronics BAL-NRF02D3 is an  

ultraminiature balun. The BAL-NRF02D3  

integrates matching network and harmonics filter.  

Matching impedance has been customized for  

the following Nordic Semiconductor circuits:  

nRF51422-CEAA, nRF51422-CDAB, nRF51422-  

CFAC and nRF51822-CEAA, nRF51822-CDAB,  

nRF51822-CFAC.  

Flip-Chip (5 bumps) package  

The BAL-NRF02D3 uses STMicroelectronics IPD  

technology on non-conductive glass substrate  

which optimizes RF performance.  

Features  

The BAL-NRF02D3 has been tested and  

approved by Nordic Semiconductor in the nRFgo  

modules.  



50 Ω nominal input / conjugate match to  

Nordic Semiconductor chips nRF51422-  

CEAA, nRF51422-CDAB, nRF51422-CFAC  

and nRF51822-CEAA, nRF51822-CDAB,  

nRF51822-CFAC  

Figure 1: Pin coordinates  









Low insertion loss  

Low amplitude imbalance  

Low phase imbalance  

Small footprint: < 1.2 mm

2  

Benefits  



Very low profile < 570 μm after reflow with  

pad 260 µm max. or < 585 μm after reflow  

with pad 220 µm typ.  





High RF performance  

RF BOM and area reduction  

Applications  





2.45 GHz impedance matched balun filter  

Optimized for Nordic’s chip set nRF51422-  

CEAA, nRF51422-CDAB, nRF51422-CFAC  

and nRF51822-CEAA, nRF51822-CDAB,  

nRF51822-CFAC  

November 2017  

DocID024794 Rev 8  

1/11  

This is information on a product in full production.  

Characteristics  

BAL-NRF02D3  

Application  

Figure 2: Application schematic  

C1  

12pF  

X1  

16MHz  

C2  

12pF  

C8  

100nF  

VCC_nRF  

C9  

1.0nF  

VCC_nRF  

B8  

B9  

D8  

E8  

C9  

E9  

D9  

F9  

F8  

H9  

G8  

H7  

H8  

VDD  

DCC  

A1  

AVDD  

G6  

P0.30  

P0.31  

P0.00  

P0.01  

P0.02  

P0.03  

P0.04  

P0.05  

P0.06  

P0.07  

P0.30  

P0.31  

P0.00  

P0.01  

P0.02  

P0.03  

P0.04  

P0.05  

P0.06  

P0.07  

VDD  

VSS  

G9  

D7  

C1  

C7  

100nF  

VSS  

VSS  

ANT2  

B1  

B3  

A3  

A2  

A

1

RF  

B1  

ANT2  

ANT1  

VDD_PAGND  

SE  

D1  

ANT1  

E1  

VDD_PA  

DEC2  

F1  

G1  

F2  

H1  

G2  

P0.20  

P0.19  

P0.18  

P0.17  

BAL-NRF02D3  

P0.20  

P0.19  

P0.18  

P0.17  

VCC_nRF  

C11  

C10  

C3  

100nF  

47nF  

2.2nF  

U1  

nRF51822-CEAA  

R1  

12k  

2/11  

DocID024794 Rev 8  

BAL-NRF02D3  

Characteristics  

1

Characteristics  

Table 1: Absolute ratings (limiting values)  

Value  

Min. Typ.

 

Max.  

Symbol  

Parameter  

Unit  

P

IN  

Input power RF

IN  

–

–

20  

dBm  

ESD ratings human body model (JESD22-A114-C), all I/O  

one at a time while others connected to GND  

2000  

V

ESD  

V

ESD ratings charge device model (JESD22-C101-C)  

ESD ratings machine model, all I/O  

500  

200  

-40  

–

–

–

T

OP  

T

stg  

Operating temperature (JESD22-A115-C), all I/O  

+105  

+150  

°C  

°C  

–

Storage temperature range  

55°C  

Table 2: Impedances (T

amb

= 25 °C)  

Value  

Symbol  

Parameter  

Min.  

Unit  

Typ.  

matched  

50  

Max.  

Z

OUT  

Z

IN  

Nominal differential output impedance  

Nominal input impedance  

–

–

–

–

Ω

Ω

Table 3: RF performances (T

amb

= 25 °C)  

Parameter  

Value  

Typ. Max.  

Symbol  

Unit  

Min.  

f

I

L  

Frequency range (bandwidth)  

2400  

2540 MHz  

Insertion loss in bandwidth  

Return loss in bandwidth  

Phase imbalance  

1.9  

12  

6

dB  

dB  

°

RL  

φimb  

Amplitude imbalance  

Aimb  

2f0  

0.15  

10  

dB  

dB  

dB  

2nd harmonic S21 attenuation  

3rd harmonic S21 attenuation  

4880 MHz  

7320 MHz  

44  

3f0  

20  

DocID024794 Rev 8  

3/11  

Characteristics  

BAL-NRF02D3  

1.1  

On-board measurements  

Figure 3: Transmission (T

amb

= 25 °C)  

Figure 4: Insertion loss (T

amb

= 25 °C)  

dB  

dB  

-0  

-0  

-0.5  

-5  

-10  

-15  

-20  

-25  

-1.0  

-1.5  

-2.0  

-2.5  

-3.0  

F (GHz)  

F (GHz)  

-30  

2.41  

2.40  

2.42 2.43 2.44 2.45 2.46 2.47 2.48 2.49 2.50  

4

6

0

1

2

3

5

7

8

Figure 5: Return loss on SE port (T

amb

= 25 °C)  

Figure 6: Return loss on DIFF port (T

amb

= 25 °C)  

dB  

dB  

-15.0  

-10  

-11  

-17.5  

-20.0  

-12  

-13  

-14  

-15  

-22.5  

-25.0  

F (GHz)  

F (GHz)  

2.41  

2.40  

2.42 2.43 2.44 2.45 2.46 2.47 2.48 2.49 2.50  

2.41  

2.40  

2.42 2.43 2.44 2.45 2.46 2.47

 

2.48 2.49 2.50  

Figure 7: Amplitude imbalance (T

amb

= 25 °C)  

Figure 8: Phase imbalance (T

amb

= 25 °C)  

dB  

Degrees  

15.0  

12.5  

10.0  

0.5  

0.4  

0.3  

0.2  

7.5  

5.0  

0.1  

2.5  

0.0  

0.0  

-2.5  

-5.0  

-7.5  

-10.0  

-0.1  

-0.2  

-0.3  

-0.4  

-0.5  

-7.5  

F (GHz)  

F (GHz)  

-15.0  

2.41  

2.40  

2.42 2.43 2.44 2.45 2.46 2.47 2.48 2.49 2.50  

2.41  

2.40  

2.42 2.43 2.44 2.45 2.46 2.47 2.48 2.49 2.50  

4/11  

DocID024794 Rev 8  

BAL-NRF02D3  

Characteristics  

Table 4: Compatibility matrix (nRF51422)  

Packet/variant  

nRF51422 IC revision  

Build code  

1

2

CEAA  

CEAA  

CDAB  

CEAA  

CFAC  

A0A  

Bx0  

Ax0  

Cx0  

Ax0  

3

Table 5: Compatibility matrix (nRF51822)  

Packet/variant  

nRF51822 IC revision  

Build code  

BA  

CEAA  

CEAA  

CEAA  

CEAA  

CEAA  

CDAB  

CEAA  

CFAC  

1

B0  

CA0  

DA0  

Dx0  

2

3

Ax0  

Ex0  

Ax0  

DocID024794 Rev 8  

5/11  

Package

information  

BAL-NRF02D3  

2

Package information  

In order to meet environmental requirements, ST offers these devices in different grades of  

ECOPACK

®

packages, depending on their level of environmental compliance. ECOPACK

®  

specifications, grade definitions and product status are available at:

.  

ECOPACK

®

is an ST trademark.  





Epoxy meets UL94, V0  

Lead-free package  

2.1  

Flip-Chip 5 bumps package information  

Figure 9: Flip-Chip 5 bumps package outline  

6/11  

DocID024794 Rev 8  

BAL-NRF02D3  

Package

information  

Figure 10: Recommended land pattern  

Figure 11: PCB stack-up recommendation  

35um  

35um  

230um  

9 30um  

230um  

35um  

35um  

DocID024794 Rev 8  

7/11  

Package

information  

BAL-NRF02D3  

2.2  

Flip-chip 5 bumps packing information  

Figure 12: Marking  

Figure 13: Flip Chip tape and reel specifications  

More packing information is available in the application note:  





AN2348 Flip-

Chip: “Package description and recommendations for use”  

AN4315: “BAL

-NRF02D3 matched balun with integrated harmonics filter for  

Nordic Semiconductor ultralow power transceivers”  

8/11  

DocID024794 Rev 8  

BAL-NRF02D3  

Figure 14: Footprint – 3 mils stencil -non solder  

mask defined  

Package

information  

Figure 15: Footprint – 3 mils stencil – solder mask  

defined  

Solder mask opening:  

220 µm recommended  

180 µm minimum  

Copper pad diameter:  

220 µm recommended  

180 µm minimum  

260 µm maximum  

260 µm maximum  

Solder mask opening:  

320 µm recommended  

300 µm minimum  

Copper pad diameter:  

320 µm recommended  

300 µm minimum  

340 µm maximum  

Solder stencil opening:  

220 µm recommended  

Solder stencil opening:  

220 µm recommended  

Figure 16: Footprint – 5 mils stencil -non solder  

mask defined  

Copper pad diameter:  

Figure 17: Footprint – 5 mils stencil – solder mask  

defined  

Solder mask opening:  

220 µm recommended  

180 µm minimum  

220 µm recommended  

180 µm minimum  

260 µm maximum  

260 µm maximum  

Solder mask opening:  

320 µm recommended  

300 µm minimum  

Copper pad diameter:  

320 µm recommended  

300 µm minimum  

340 µm maximum  

Solder stencil opening:  

330 µm recommended*  

Solder stencil opening:  

330 µm recommended*  

*depending on paste, it can go down to 270 µm  

*depending on paste, it can go down to 270 µm  

DocID024794 Rev 8  

9/11  

Ordering

information  

BAL-NRF02D3  

3

Ordering information  

Table 6: Ordering information  

Order code  

Marking  

Package  

Weight  

Base qty.  

Delivery mode  

BAL-NRF02D3  

SK  

Flip-Chip 5 bumps  

1.44 mg  

5000  

Tape and reel  

4

Revision history  

Table 7: Document revision history  

Date  

Revision Changes  

02-Jul-2013  

30-Aug-2013  

13-Oct-2014  

25-Mar-2015  

15-Jun-2015  

07-Dec-2016  

02-Aug-2017  

14-Nov-2017  

1

2

3

4

5

6

7

8

Initial release.  

Updated

Table 1

.  

Updated

Figure 9

.  

Updated cover page, added

Table 4

and

Table 5

.  

Updated

Table 1

.  

Updated

Table 1: “Absolute ratings (limiting values)”

.  

Updated Section 3: “Ordering information”.  

Updated

10/11  

DocID024794 Rev 8  

BAL-NRF02D3  

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–

PLEASE READ CAREFULLY  

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, and  

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der  

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Information in this document supersedes and replaces information previously supplied in any prior versions of this document.  

© 2017 STMicroelectronics

–

All rights reserved  

DocID024794 Rev 8  

11/11