STMicroelectronics-BALFLB-WL-07D3
| Part # | STMicroelectronics-BALFLB-WL-07D3 |
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BALFLB-WL-07D3
Datasheet
50 Ω nominal input / conjugate match balun to BGA-4L STM32WL in high power
mode, 470-510 MHz with integrated harmonic filter
Features
•
•
BGA STM32WL sub-GHz wireless microcontrollers impedance matched balun
and Tx harmonics filter
Optimized for BGA STM32WL sub-GHz wireless microcontrollers in high
power mode and dedicated to 4-layers PCB
•
•
•
•
•
•
•
•
•
50 Ω nominal input / conjugate matched balun to BGA STM32WL
50 Ω nominal impedance on antenna side Tx and Rx
Deep Tx rejection harmonic filter
Low insertion loss
Small footprint
Low profile ≤ 630 μm after reflow
High RF performance
RF BOM and area reduction
ECOPACK2
compliant component
Applications
•
•
STM32WL sub-GHz wireless microcontrollers
LPWAN-compliant radio solution, enabling the following modulations: LoRa®,
(G)FSK, (G)MSK, and BPSK
Description
integrates a matching network, balun, and harmonics filter. Matching impedance has
been customized for the STM32WL sub-GHz wireless microcontrollers.
Product status
It is using STMicroelectronics IPD technology on a nonconductive glass substrate,
which optimizes RF performances.
DS14108
–
Rev 2
–
December 2022
For further information contact your local STMicroelectronics sales office.
BALFLB-WL-07D3
Characteristics
1
Characteristics
Table 1.
Absolute maximum ratings (T
amb
= 25 °C)
Symbol Parameter
Value
Unit
P
Input power RF
IN
27
dBm
IN
ESD ratings human body model (JESD22-A114), all I/O one at a time while others connected to
GND
2000
200
V
V
ESD
ESD ratings machine model, all I/O
Operating temperature
T
-40 to +105
°C
OP
Table 2.
Impedances (T
amb
= 25 °C)
Value
Symbol
Parameter
Unit
Min.
Typ.
Max.
Z
Nominal differential Rx balun impedance
Nominal Tx filter impedance
–
–
–
–
Matched to STM32WL
–
RX
Z
Matched to STM32WL
–
TX
Ω
Z
Nominal Rx balun antenna impedance
Nominal Tx filter antenna impedance
50
50
–
RX-ANT
Z
–
TX-ANT
Table 3.
Electrical characteristics and RF performances (T
amb
= 25 °C)
Value
Min. Typ. Max.
Symbol
Parameter
Test condition
Unit
f
Frequency range
470
490
510
MHz
dB
dB
dB
dB
°
IL
RX
Rx balun insertion loss differential mode |S
| without mismatch loss
1.80 2.05
DS
IL
HP Tx filter insertion loss |S
| without mismatch loss
1.75 2.15
TX
21
RL
Rx balun input return loss differential mode |S
| on antenna
16
18
19
22
1.9
RX-ANT
DD
RL
Tx filter output return loss |S
| on antenna
TX-ANT
11
ɸ
RX balun phase imbalance
-1.9
imb
A
RX balun amplitude imbalance
Attenuation at 2fo
-0.3
45
49
46
42
33
27
23
22
21
0.3
dB
imb
48
56
52
50
38
32
28
27
26
Attenuation at 3fo
Attenuation at 4fo
Attenuation at 5fo
Att
Tx filter harmonic rejection levels |S
|
21
Attenuation at 6fo
Attenuation at 7fo
Attenuation at 8fo
Attenuation at 9fo
Attenuation at 10fo
dB
TX
DS14108
–
Rev 2
page 2/13
BALFLB-WL-07D3
RF measurements (Rx balun)
1.1
RF measurements (Rx balun)
Figure 1.
Insertion loss (dB)
Figure 2.
Return loss on antenna (dB)
IL_RX
RL_RX_ANT
-1.5
-1.6
-1.7
-1.8
-1.9
-2.0
-2.1
-2.2
-2.3
-2.4
-2.5
0
-5
-10
-15
-20
-25
-30
-35
-40
f(MHz)
f(MHz)
470
475
480
485
490
495
500
505
510
470
475
480
485
490
495
500
505
510
Figure 3.
Amplitude imbalance (dB)
Figure 4.
Phase imbalance (°)
AMP_IMB
PHA_IMB
3.0
2.5
1.50
1.25
2.0
1.00
1.5
0.75
1.0
0.50
0.5
0.25
0.00
0.0
-0.25
-0.50
-0.75
-1.00
-1.25
-1.50
-0.5
-1.0
-1.5
-2.0
-2.5
-3.0
f(MHz)
f(MHz)
470
475
480
485
490
495
500
505
510
470
475
480
485
490
495
500
505
510
DS14108
–
Rev 2
page 3/13
BALFLB-WL-07D3
RF measurements (Tx filter)
1.2
RF measurements (Tx filter)
Figure 5.
Transmission wide band with harmonics
attenuation (dB)
Figure 6.
Insertion loss (dB)
IL_TX
IL_TX
0
-1.0
-1.1
-1.2
-1.3
-1.4
-1.5
-1.6
-1.7
-1.8
-1.9
-2.0
-10
-20
-30
-40
-50
-60
-70
f(MHz)
f(GHz)
-80
470
475
480
485
490
495
500
505
510
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
Figure 7.
Return loss on antenna (dB)
RL_TX_ANT
0
-5
-10
-15
-20
-25
-30
-35
-40
f(MHz)
470
475
480
485
490
495
500
505
510
DS14108
–
Rev 2
page 4/13
BALFLB-WL-07D3
Package information
2
Package information
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK
packages,
depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product
2.1
CSPG 8 bumps package information
Figure 8.
CSPG 8 bumps package outline (bottom view – bumps up) (in µm)
Table 4.
CSPG 8 bumps dimensions (in µm)
Parameter
Min.
580
180
380
230
2080
Typ.
630
205
400
255
2130
340
500
210
630
1830
690
85
Max.
680
A
A1
A2
b
230
420
280
D
2150
D1
D2
D3
D4
E
1780
1880
E1
E2
E3
fD1
fD2
fE1
fE2
605
225
225
225
225
DS14108
–
Rev 2
page 5/13
BALFLB-WL-07D3
CSPG 8 bumps packing information
2.2
CSPG 8 bumps packing information
Figure 9.
Marking
Figure 10.
Top view
Table 5.
Pads description top view (pads down)
Pad ref.
A1
Pad name
RFO_in
RFI_N_out
RFI_P_out
GND2
Description
Tx filter input
A2
Differential-N Rx balun output
Differential-P Rx balun output
Ground #2
A3
B1
B2
GND3
Ground #3
C1
RFO_out
GND1
Tx filter output
C2
Ground #1
C3
RFI_in
Single ended Rx balun input
DS14108
–
Rev 2
page 6/13
BALFLB-WL-07D3
CSPG 8 bumps packing information
Figure 11.
Tape and reel outline
Table 6.
Tape and reel mechanical data
Dimensions
Millimeters
Ref
Min
1.89
2.19
1.40
0.95
1.65
3.45
0.70
3.90
3.90
1.95
7.90
Typ
1.94
2.24
1.50
1.00
1.75
3.50
0.75
4.00
4.00
2.00
8.00
Max
1.99
2.29
1.60
1.05
1.85
3.55
0.80
4.10
4.10
2.05
8.30
A0
B0
Ø D0
Ø D1
E1
F
K0
P0
P1
P2
W
Note:
More packing information is available in the application note:
AN2348
Flip-Chip: “Package description and recommendations for use”
•
DS14108
–
Rev 2
page 7/13
BALFLB-WL-07D3
PCB assembly recommendations
3
PCB assembly recommendations
3.1
Land pattern
Figure 12.
BGA-4L PCB recommended land pattern
Layout example using STM32WL in BGA package / 4 layers PCB for high power mode.
Figure 13.
BGA-4L PCB stack-up recommendations
DS14108
–
Rev 2
page 8/13
BALFLB-WL-07D3
Stencil opening design
3.2
Stencil opening design
Figure 14.
Footprint – 3 mils stencil -non solder mask
defined
Figure 15.
Footprint – 3 mils stencil – solder mask defined
Solder mask opening:
220 µm recommended
180 µm minimum
Copper pad diameter:
220 µm recommended
180 µm minimum
260 µm maximum
260 µm maximum
Copper pad diameter:
320 µm recommended
300 µm minimum
Solder mask opening:
320 µm recommended
300 µm minimum
340 µm maximum
Solder stencil opening:
220 µm recommended
Solder stencil opening:
220 µm recommended
3.3
Solder paste
1.
2.
3.
4.
Halide-free flux qualification ROL0 according to ANSI/J-STD-004.
“No clean” solder paste is recommended.
Offers a high tack force to resist component movement during high speed.
Use solder paste with fine particles: powder particle size 20-38 µm.
3.4
Placement
1.
Manual positioning is not recommended.
2.
It is recommended to use the lead recognition capabilities of the placement system, not the outline
centering
3.
4.
Standard tolerance of ±0.05 mm is recommended.
1.0 N placement force is recommended.
T
o
o much placement force can lead to squeezed out solder paste
and cause solder joints to short.
T
o
o low placement force can lead to insufficient contact between package
and solder paste that could cause open solder joints or badly centered packages.
5.
6.
To
i
mprove the package placement accuracy, a bottom side optical control should be performed with a high
resolution tool.
For assembly, a perfect supporting of the PCB (all the more on flexible PCB) is recommended during solder
paste printing, pick and place and reflow soldering by using optimized tools.
3.5
PCB design preference
1.
To
c
ontrol the solder paste amount, the closed via is recommended instead of open vias.
2.
The position of tracks and open vias in the solder area should be well balanced. A symmetrical layout is
recommended, to avoid any tilt phenomena caused by asymmetrical solder paste due to solder flow away.
DS14108
–
Rev 2
page 9/13
BALFLB-WL-07D3
Reflow profile
3.6
Reflow profile
Figure 16.
ST ECOPACK
®
recommended soldering reflow profile for PCB mounting
240-245 °C
T
e
mperature (°C)
-2 °C/s
-3 °C/s
250
200
2 – 3 °C/s
60 sec
(90 max)
150
100
50
-6 °C/s
0.9 °C/s
Time (s)
150 180 210 240 270 300
0
30
60
90 120
Note:
Note:
Minimize air convection currents in the reflow oven to avoid component movement.
More information is available in the application note:
•
AN2348 Flip-Chip: “Package description and recommendations for use”
DS14108
–
Rev 2
page 10/13
BALFLB-WL-07D3
Ordering information
4
Ordering information
Table 7.
Ordering information
Order code
Marking
W7
Package
Weight
Base qty.
Delivery mode
BALFLB-WL-07D3
CSPG
3.9 mg
5000
T
a
pe and reel
DS14108
–
Rev 2
page 11/13
BALFLB-WL-07D3
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T
.
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or additional information about ST trademarks, refer to
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© 2022 STMicroelectronics – All rights reserved
DS14108
–
Rev 2
page 13/13
