STMicroelectronics-FERD20U60DJFD-TR
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FERD20U60DJFD
Field effect rectifier
Datasheet – production data
Description
This single rectifier is based on a proprietary
technology, enabling to achieve the best in class
V
F
/I
R
trade-off for a given silicon surface.
Packaged in PowerFLAT™ 5×6, this device is
intended to be used in rectification and
freewheeling operations in switch-mode power
supplies.
Table 1: Device summary
Symbol
I
F(AV)
Value
20 A
V
RRM
60 V
T
j
(max.)
V
F
(typ.)
+150 °C
350 mV
Features
ST proprietary process
Stable leakage current over reverse voltage
Low forward voltage drop
High frequency operation
TM: PowerFLAT is a trademark of STMicroelectronics
September 2017
DocID027416 Rev 2
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This is information on a product in full production.
Characteristics
FERD20U60DJFD
1
Characteristics
Table 2: Absolute ratings (limiting values at 25 °C, unless otherwise specified, anode
terminals short circuited)
Symbol
V
RRM
Parameter
Value
60
Unit
V
Repetitive peak reverse voltage
I
F(RMS)
Forward rms current
45
A
Average forward current
δ = 0.5,
square wave
I
F(AV)
T
C
= 115 °C
20
A
I
FSM
T
stg
T
j
Surge non repetitive forward current
Storage temperature range
t
p
= 10 ms sinusoidal
180
-65 to +175
+150
A
°C
°C
Notes:
(1)
(dP
tot
/dT
j
) < (1/R
th(j-a)
) condition to avoid thermal runaway for a diode on its own heatsink.
Table 3: Thermal resistance parameters
Symbol
Parameter
Value
Unit
Junction to case
R
th(j-c)
2.6
°C/W
Table 4: Static electrical characteristics, anode terminals short circuited
Symbol
Parameter
Test conditions
T
j
= 25 °C
Min.
Typ.
Max.
800
Unit
µA
–
–
–
–
–
–
Reverse leakage current
V
R
= V
RRM
I
F
= 10 A
I
F
= 20 A
T
j
= 125 °C
T
j
= 25 °C
T
j
= 125 °C
T
j
= 25 °C
T
j
= 125 °C
30
70
mA
0.380
0.350
0.465
0.465
0.425
0.400
0.510
0.505
Forward voltage drop
V
Notes:
(1)
Pulse test: t
p
= 5 ms, δ < 2%
(2)
Pulse test: t
p
= 380 µs, δ < 2%
To evaluate the conduction losses use the following equation:
2
P = 0.295 x I
F(AV)
+ 0.0105 I
F (RMS)
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FERD20U60DJFD
Characteristics
1.1
Characteristics (curves)
Figure 1: Average forward power dissipation
versus average forward current
F(AV)
Figure 2: Average forward current versus ambient
temperature (δ = 0.5)
P
(W)
I
(A)
F(A V)
35
30
25
20
15
10
5
16
14
12
10
8
= R
R
-a)
th(j-c)
th(j
6
T
T
4
2
δ
tp
=tp/T
T
(°C)
I
(A)
amb
δ
tp
=tp/T
F(AV)
0
0
0
4
10 12 14 16 18 20 22 24 26
0
25
50
75
100
125
150
2
6
8
Figure 3: Relative variation of thermal impedance
junction to case versus pulse duration
Figure 4: Reverse leakage current versus reverse
voltage applied (typical values)
I
)
(
m
A
Z
/R
R
th(j-c) th(j-c)
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0.0
1.E+02
1.E+01
1.E+00
1.E-01
1.E-02
T
= 125 °C
= 100 °C
= 75 °C
j
T
j
T
j
T
= 50 °C
j
T
= 25 °C
j
Single pulse
t
(s)
V
(V
)
p
R
1.E-04
1.E-03
1.E-02
1.E-01
1.E+00
0
5
10
15 20 25 30 35 40
45 50 55 60
Figure 5: Junction capacitance versus reverse
voltage applied (typical values)
C(pF)
Figure 6: Forward voltage drop versus forward
current (typical values)
I
(A )
F
100.0
10.0
1.0
10000
F = 1 MHz
V
= 30 mV
RMS
= 25 °C
osc
T
j
T
= 75 °C
j
1000
T
= 125 °C
j
T =
25 °C
j
V
R
(V)
V (V)
F
0.1
100
0.00 0.05 0.10 0.15 0.20 0.25 0.30 0.35 0.40 0.45 0.50
1
10
100
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Characteristics
FERD20U60DJFD
Figure 7: Thermal resistance junction to ambient
versus copper surface under tab (typical values)
R
(°C/W)
h j
–
a
)
(
t
150
125
100
75
Epoxy printed board Fr4, copper thickness
= 35 µm
50
25
(cm²)
9
S
Cu
0
0
1
2
3
4
5
6
7
8
10
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DocID027416 Rev 2
FERD20U60DJFD
Package
information
2
Package information
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK
®
packages, depending on their level of environmental compliance. ECOPACK
®
ECOPACK
®
is an ST trademark.
Epoxy meets UL 94,V0
Cooling method: by conduction (C)
2.1
PowerFLAT™ 5×6 8L package information
Figure 8
: PowerFLAT™ 5×6 8L package outline
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Package
information
FERD20U60DJFD
Table 5: PowerFLAT™ 5×6 8L mechanical data
Dim.
Millimeters
Inches
Ref
Min.
0.80
0.30
Typ.
0.25
1.27
Max.
1.00
0.50
Min.
0.031
0.011
Typ.
0.10
0.05
Max.
0.039
0.019
A
b
c
D
5.10
4.11
0.201
0.162
D2
e
3.91
0.153
E
5.90
3.34
1.10
0.50
0.06
6.10
3.54
1.575
0.80
0.20
0.10
0.232
0.131
0.043
0.019
0.002
0.240
0.139
0.062
0.031
0.008
0.004
E2
K
L
L1
L2
Figure 9
: PowerFLAT™ 5×6 8L recommended footprint (dimensions are in mm)
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FERD20U60DJFD
Ordering
information
3
Ordering information
Table 6: Ordering information
Order code
Marking
Package
Weight
Base qty.
3000
Delivery mode
FERD20U60DJFD-TR
FD20U60
PowerFLAT 5×6
0.9 g
Tape and reel
4
Revision history
Table 7: Document revision history
Date
Revision Changes
11-Feb-2015
1
2
Initial release.
Updated description in cover page.
Minor text changes.
27-Sep-2017
DocID027416 Rev 2
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FERD20U60DJFD
IMPORTANT NOTICE
–
PLEASE READ CAREFULLY
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s
, and
improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST
products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of or
der
acknowledgement.
Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the
design of Purchasers’ products.
No license, express or implied, to any intellectual property right is granted by ST herein.
Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product.
ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners.
Information in this document supersedes and replaces information previously supplied in any prior versions of this document.
© 2017 STMicroelectronics
–
All rights reserved
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