STMicroelectronics-STB18N60M6

Part #STMicroelectronics-STB18N60M6
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STMicroelectronics-STB18N60M6
STB18N60M6  
Datasheet  
N-channel 600
V
,
2
30 mΩ typ., 13 A, MDmesh M6  
Power MOSFET in a D²PAK package  
Features  
TAB  
V
R
DS(on)  
max.  
I
D
Order code  
DS  
STB18N60M6  
600 V  
280 mΩ  
13 A  
2
1
3
•
•
•
•
•
Reduced switching losses  
Lower R

DS(on)

per area vs previous generation  
Low gate input resistance  
100% avalanche tested  
D²  
PAK  
Zener-protected  
D(2, TAB)  
Applications  
•
•
•
Switching applications  
G(1)  
LLC converters  
Boost PFC converters  
S(3)  
AM01475V1  
Description  
The new MDmesh M6 technology incorporates the most recent advancements to the  
well-known and consolidated MDmesh family of SJ MOSFE
T
s
. STMicroelectronics  
builds on the previous generation of MDmesh devices through its new M6  
technology, which combines excellent R

DS(on)

per area improvement with one of the  
most effective switching behaviors available, as well as a user-friendly experience for  
maximum end-application efficiency.  
Product status link  
Product summary  
Order code  
STB18N60M6  
Marking  
Package  
Packing  
18N60M6  
D²PAK  
T
a
pe and reel  
DS12842
–
Rev 2
–
April 2019  
For further information contact your local STMicroelectronics sales office.  

STB18N60M6  
Electrical ratings  
1
Electrical ratings  
Table 1.
Absolute maximum ratings  
Parameter  
Symbol  
Value  
±25  
13  
Unit  
V
Gate-source voltage  
V
GS  
Drain current (continuous) at T  
Drain current (continuous) at T  
Drain current (pulsed)  
= 25 °C  
case  
case  
I
A
D
= 100 °C  
8.2  
I
38  
A
DM  
P
T
o
tal power dissipation at T  
= 25 °C  
case  
110  
15  
W
TOT  
dv/dt

dv/dt

Peak diode recovery voltage slope  
MOSFET dv/dt ruggedness  
Storage temperature range  
V/ns  
°C  
100  
T
stg  
-55 to 150  
T
j
Operating junction temperature range  
1. Pulse
 
width is limited by safe operating area.  
2.  
3.  
I
≤ 13 A, di/dt ≤ 400 A/μs, V  
< V  
, V
 
= 400 V  
(BR)DSS DD  
SD  
DS(peak)  
V
≤ 480 V  
DS  
Table 2.
Thermal data  
Parameter  
Symbol  
Value  
1.14  
30  
Unit  
°C/W  
°C/W  
R
Thermal resistance junction-case  
thj-case  
R
thj-pcb  
Thermal resistance junction-pcb  
2
1.  
When mounted on 1 inch
 
FR-4, 2 Oz copper board.  
Table 3.
Avalanche characteristics  
Symbol  
Parameter  
Value  
Unit  
Avalanche current, repetitive or non-repetitive  
I
2.7  
A
AR  
(pulse width limited by T  
)
Jmax  
Single pulse avalanche energy  
(starting T
 
= 25 °C, I
 
= I
 
, V
 
= 50 V)  
E
210  
mJ  
AS  
j
D
AR  
DD  
DS12842
–
Rev 2  
page 2/16  
 
 
 
 
 

STB18N60M6  
Electrical characteristics  
2
Electrical characteristics  
(T

case

= 25 °C unless otherwise specified).  
Table 4.
On/off states  
Symbol  
Parameter  
Test conditions  
Min.  
Typ.  
Max.  
Unit  
V
V
V
V
T
= 0
V
, I
 
= 1
m
A  
Drain-source breakdown voltage  
600  
V
(BR)DSS  
GS  
GS  
GS  
D
= 0
V
, V
 
=
6
00 V  
1
DS  
I
= 0
V
, V
 
=
6
00
V
,  
Zero gate voltage drain current  
µA  
DSS  
DS  
100  
= 125 °C

case  
I
V
= 0
V
, V
 
=
±
25 V  
GS  
Gate-body leakage current  
Gate threshold voltage  
±5  
µA  
V
GSS  
DS  
DS  
V
V
I
= V
 
, I
 
= 250 µA  
3.25  
4
4.75  
280  
GS(th)  
DS(on)  
GS  
D
R
= 6.5 A, V
 
= 10 V  
GS  
Static drain-source on-resistance  
230  
mΩ  
D
1. Defined
 
by design, not subject to production test.  
Table 5.
Dynamic  
Symbol  
Parameter  
Input capacitance  
Test conditions  
Min.  
Typ.  
650  
45  
Max.  
Unit  
C
iss  
–
–
–
–
–
–
–
–
–
–
–
–
–
–
C
oss  
V
V
= 100
V
, f = 1
M
Hz, V
 
= 0 V  
Output capacitance  
pF  
DS  
GS  
C
Reverse transfer capacitance  
Equivalent output capacitance  
Intrinsic gate resistance  
T
o
tal gate charge  
2
rss  
= 0 to 480
V
, V
 
= 0 V  
C
oss eq.  
123  
4.6  
16.8  
4.5  
pF  
Ω
DS  
GS  
R
f = 1 MHz, I
 
= 0 A  
D
G
Q
V
V
= 480
V
, I
 
=
1
3 A,  
g
DD  
D
= 0 to 10 V  
Q
GS  
Gate-source charge  
gs  
nC  
Q
Gate-drain charge  
–
8.4  
–
gd  
1.  
C
oss eq.  
is defined as a constant equivalent capacitance giving the same charging time as C  
when V
 
increases from 0  
oss DS  
to 80% V  
.
DSS  
Table 6.
Switching times  
Test conditions  
Symbol  
Parameter  
Turn-on delay time  
Min.  
Typ.  
16  
7
Max.  
Unit  
t
V
= 300
V
, I
 
=
6
.5 A,  
–
–
–
–
–
–
d(on)  
DD  
D
R
G
= 4.7 Ω, V
 
= 10 V  
t
GS  
Rise time  
r
ns  
t
Turn-off delay time  
28  
d(off)  
t
Fall time  
–
9
–
f
DS12842
–
Rev 2  
page 3/16  
 
 
 

STB18N60M6  
Electrical characteristics  
Table 7.
Source-drain diode  
Test conditions  
Symbol  
Parameter  
Source-drain current  
Min.  
Typ.  
Max.  
13  
Unit  
A
I
–
–
–
–
–
SD  
I
Source-drain current (pulsed)  
Forward on voltage  
38  
A
SDM  
V
I
I
= 13 A, V
 
= 0 V  
1.6  
V
SD  
GS  
SD  
t
= 13 A, di/dt = 100 A/µs,  
= 60 V  
Reverse recovery time  
Reverse recovery charge  
208  
1.9  
ns  
µC  
rr  
SD  
V
DD  
Q
rr  
I
Reverse recovery current  
–
18  
A
RRM  
t
I
V
= 13 A, di/dt = 100 A/µs,  
SD  
Reverse recovery time  
–
–
290  
2.9  
ns  
rr  
= 60
V
, T
 
=
1
50 °C  
j
DD  
Q
Reverse recovery charge  
µC  
rr  
I
Reverse recovery current  
–
20  
A
RRM  
1. Pulse
 
width is limited by safe operating area.  
2. Pulsed:
 
pulse duration = 300 µs, duty cycle 1.5%  
DS12842
–
Rev 2  
page 4/16  
 
 

STB18N60M6  
Electrical characteristics (curves)  
2.1  
Electrical characteristics (curves)  
Figure 2.
Thermal impedance  
Figure 1.
Safe operating area  
GIPG311020181054SOA  
I

D  

(A)  
in this area is  
Operation  
limited by R

DS(on)  

t

p

=1 µs  
10

1  

t

p

=10 µs  
t

p

=100 µs  
t

p

=1 ms  
10

0  

T

J

≤
150 °C  
T

C

=25 °C  
t

p

=10 ms  
V

GS

=10 V  
single pulse  
10

1  

10

-1  

10

-1  

10

0  

10

2  

V

DS

(V)  
Figure 4.
Transfer characteristics  
Figure 3.
Output characteristics  
GIPG311020181052OCH  
I

D  

(A)  
GIPG311020181052TCH  
I

D  

(A)  
V

GS

=9 V  
V

GS

=8 V  
V

GS

= 10 V  
30  
25  
20  
15  
10  
30  
25  
20  
15  
10  
V

DS

= 14 V  
V

GS

=7 V  
V

GS

=6 V  
5
0
5
0
0
2
4
6
8
10  
12  
V

DS

(V)  
4
5
6
7
8
9
V

GS

(V)  
Figure 5.
Gate charge vs gate-source voltage  
Figure 6.
Static drain-source on-resistance  
GIPG311020181053QVG  
GIPG311020181050RID  
V

DS  

(V)  
V

GS  

(V)  
R

DS(on)  

(mΩ)  
V

DD

= 480 V  
I

D

= 13 A  
600  
500  
400  
300  
200  
12  
10  
8
250  
Q

g  

V

GS

=10 V  
V

DS  

Q

gd  

Q

gs  

240  
230  
6
4
220  
210  
100  
0
2
0
0
4
8
12  
16  
Q

g

(nC)  
0
2
4
6
8
10  
12  
I

D

(A)  
DS12842
–
Rev 2  
page 5/16  
 

STB18N60M6  
Electrical characteristics (curves)  
Figure 7.
Capacitance variations  
Figure 8.
Output capacitance stored energy  
GIPG311020181051CVR  
GADG311020181207EOS  
C
(pF)  
E

OSS  

(µJ)  
6
10

3  

10

2  

5
4
3
2
C

ISS  

C

OSS  

f = 1 MHz  
10

1  

10

0  

C

RSS  

1
0
10

-1  

10

0  

10

1  

10

2  

V

DS

(V)  
0
100 200 300 400 500 600
 
V

DS

(V)  
Figure 9.
Normalized gate threshold voltage vs  
temperature  
Figure 10.
Normalized on-resistance vs temperature  
GIPG311020181049RON  
R

DS(on)  

(norm.)  
GIPG311020181049VTH  
V

GS(th)  

(norm.)  
I

D

=250 A  
1.1  
2.5  
V

GS

= 10 V  
2.0  
1.5  
1.0  
1.0  
0.9  
0.8  
0.5  
0.0  
0.7  
0.6  
-75  
-25  
25  
75  
125  
T

J

(°C)  
-75  
-25  
25  
75  
125  
T

J

(°C)  
Figure 11.
Normalized V

(BR)DSS

vs temperature  
Figure 12.
Source-drain diode forward characteristics  
GIPG311020181051SDF  
GIPG311020181050BDV  
V

SD  

(V)  
V

(BR)DSS  

(norm.)  
1.1  
1.10  
1.05  
1.00  
0.95  
T

j

= -50 °C  
I

D

= 1 mA  
1.0  
0.9  
T

j

= 25 °C  
0.8  
0.7  
T

j

= 150 °C  
0.90  
0.85  
0.6  
0.5  
0
2
4
6
8
10  
12  
I

SD

(A)  
-75  
-25  
25  
75  
125  
T

J

(°C)  
DS12842
–
Rev 2  
page 6/16  

STB18N60M6  
Test circuits  
3
Test circuits  
Figure 13.
Test circuit for resistive load switching times  
Figure 14.
Test circuit for gate charge behavior  
V

DD  

RL  
R

L  

2200  
μF  
3.3  
μF  
I

G

= CONST  
2.7 kΩ  
V

DD  

+
D.U.
T
.  
100 Ω  
V

GS  

V

D  

R

G  

pulse width  
+
D.U.
T
.  
V

G  

V

GS  

2200  
μF  
pulse width  
47 kΩ  
1 kΩ  
AM01469v10  
AM01468v1  
Figure 15.
Test circuit for inductive load switching and  
diode recovery times  
Figure 16.
Unclamped inductive load test circuit  
L
A
A
A
D
S
V

D  

100 µH  
D
fast  
G
D.U.
T
.  
B
diode  
2200  
3.3  
µF  
+
V

DD  

1000  
µF  
B
µF  
3.3  
µF  
B
+
V

DD  

25 Ω  
I

D  

G
D.U.
T
.  
R

G  

S
+
_
D.U.
T
.  
V

i  

pulse width  
AM01471v1  
AM01470v1  
Figure 18.
Switching time waveform  
Figure 17.
Unclamped inductive waveform  
t

on  

t

d(on)  

t

off  

t

d(off)  

V
(BR)DSS  
t

r  

t

f  

V
D  
90%  
90%  
I
DM  
V

DS  

10%  
V

GS  

10%  
0
0
I
D  
V
DD  
V
DD  
90%  
AM01472v1  
10%  
AM01473v1  
DS12842
–
Rev 2  
page 7/16  
 
 
 
 
 

STB18N60M6  
Package information  
4
Package information  
In order to meet environmental requirements, ST offers these devices in different grades of

packages,  
depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product  
status are available at:

. ECOPACK is an ST trademark.  
DS12842
–
Rev 2  
page 8/16  
 
 

STB18N60M6  
D²PAK (TO-263) type A package information  
4.1  
D²PAK (TO-263) type A package information  
Figure 19.
D²PAK (TO-263) type A package outline  
0079457_25  
DS12842
–
Rev 2  
page 9/16  

STB18N60M6  
D²PAK (TO-263) type A package information  
Table 8.
D²PAK (TO-263) type A package mechanical data  
mm  
Dim.  
Min.  
4.40  
0.03  
0.70  
1.14  
0.45  
1.23  
8.95  
7.50  
1.10  
10.00  
8.30  
6.85  
Typ.  
Max.  
4.60  
0.23  
0.93  
1.70  
0.60  
1.36  
9.35  
8.00  
1.50  
10.40  
8.70  
7.25  
A
A1  
b
b2  
c
c2  
D
D1  
D2  
E
7.75  
1.30  
E1  
E2  
e
8.50  
7.05  
2.54  
e1  
H
4.88  
15.00  
2.49  
2.29  
1.27  
1.30  
5.28  
15.85  
2.69  
2.79  
1.40  
1.75  
J1  
L
L1  
L2  
R
0.40  
V2  
0°  
8°  
DS12842
–
Rev 2  
page 10/16  

STB18N60M6  
D²PAK (TO-263) type A package information  
Figure 20.
D²PAK (TO-263) recommended footprint (dimensions are in mm)  
Footprint  
DS12842
–
Rev 2  
page 11/16  
 

STB18N60M6  
D²PAK packing information  
4.2  
D²PAK packing information  
Figure 21.
D²PAK tape outline  
DS12842
–
Rev 2  
page 12/16  

STB18N60M6  
D²PAK packing information  
Figure 22.
D²PAK reel outline  
T
40mm min.  
access hole  
at slot location  
B
D
C
N
A
G measured  
at hub  
Tape slot  
in core for  
tape start  
Full radius  
2.5mm min.width  
AM06038v1  
Table 9.
D²PAK tape and reel mechanical data  
Tape  
Reel  
mm  
mm  
Max.  
330  
Dim.  
Dim.  
Min.  
10.5  
15.7  
1.5  
Max.  
Min.  
A0  
B0  
D
10.7  
15.9  
1.6  
A
B
C
D
G
N
T
1.5  
12.8  
20.2  
24.4  
100  
13.2  
26.4  
30.4  
D1  
E
1.59  
1.65  
11.4  
4.8  
1.61  
1.85  
11.6  
5.0  
F
K0  
P0  
P1  
P2  
R
3.9  
4.1  
11.9  
1.9  
12.1  
2.1  
Base quantity  
Bulk quantity  
1000  
1000  
50  
T
0.25  
23.7  
0.35  
24.3  
W
DS12842
–
Rev 2  
page 13/16  

STB18N60M6  
Revision history  
Table 10.
Document revision history  
Date  
Version  
Changes  
15-Nov-2018  
19-Apr-2019  
1
2
First release.  
Updated product status link table in cover page.  
DS12842
–
Rev 2  
page 14/16  
 

STB18N60M6  
Contents  
Contents  

Electrical ratings

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
.

Electrical characteristics

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
.

Electrical characteristics (curves)

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Test circuits

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
.

Package information

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
.

D²PAK (TO-263) type A package information

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

D²PAK packing information

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Revision history

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

DS12842
–
Rev 2  
page 15/16  

STB18N60M6  
IMPORTANT NOTICE – PLEASE READ CAREFULLY  
STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST  
products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST  
products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement.  
Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of  
Purchasers’ products.  
No license, express or implied, to any intellectual property right is granted by ST herein.  
Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product.  
ST and the ST logo are trademarks of S
T
.
F
or additional information about ST trademarks, please refer to

. All other product or service  
names are the property of their respective owners.  
Information in this document supersedes and replaces information previously supplied in any prior versions of this document.  
© 2019 STMicroelectronics – All rights reserved  
DS12842
–
Rev 2  
page 16/16