STMicroelectronics-STB35N65DM2

Part #STMicroelectronics-STB35N65DM2
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STMicroelectronics-STB35N65DM2
STB35N65DM2  
N-
channel 650 V, 0.093 Ω typ., 32 A MDmesh™ DM2  
Power MOSFET in a D²PAK package  
Datasheet – preliminary data  
Features  
R

DS(on)  

max.  
TAB  
Order code  
V

DS  

I

D  

P

TOT  

STB35N65DM2  
650 V  
0.110 Ω  
32 A  
250 W  
2
1
3
Fast-recovery body diode  
Extremely low gate charge and input  
capacitance  
D²  
PAK  
Low on-resistance  
100% avalanche tested  
Extremely high dv/dt ruggedness  
Zener-protected  
Figure 1: Internal schematic diagram  
Applications  
Switching applications  
Description  
This high voltage N-channel Power MOSFET is  
part of the MDmesh™ DM2 fast recovery diode  
series. It offers very low recovery charge (Q

rr

)  
and time (t

rr

) combined with low R

DS(on)

, rendering  
it suitable for the most demanding high efficiency  
converters and ideal for bridge topologies and  
ZVS phase-shift converters.  
Table 1: Device summary  
Order code  
Marking  
Package  
Packing  
STB35N65DM2  
35N65DM2  
D²PAK  
Tape and reel  
January 2018  
DocID030840 Rev 2  
1/15  
This is preliminary information on a new product now in development  
or undergoing evaluation. Details are subject to change without notice.  

STB35N65DM2  
Electrical ratings  
1
Electrical ratings  
Table 2: Absolute maximum ratings  
Symbol  
Parameter  
Value  
±25  
32  
Unit  
V

GS  

Gate-source voltage  
V
Drain current (continuous) at T

case

= 25 °C  
Drain current (continuous) at T

case

= 100 °C  
Drain current (pulsed)  
I

D  

A
20  
90  
A
P

TOT  

T

stg  

Total dissipation at T

case

= 25 °C  
Peak diode recovery voltage slope  
MOSFET dv/dt ruggedness  
250  
50  
W
V/ns  
°C  
50  
Storage temperature range  
-55 to 150  
T

j  

Operating junction temperature range  
Notes:  

(1)

Pulse width is limited by safe operating area.  
(2)  
I
≤ 32 A, di/dt=900 A/μs, V

DS

peak < V

(BR)DSS

, V

DD

= 80% V

(BR)DSS  

SD  
(3)  
V
≤ 520 V  
DS  
Table 3: Thermal data  
Parameter  
Symbol  
R

thj-case  

R

thj-pcb  

Value  
0.5  
Unit  
Thermal resistance junction-case  
Thermal resistance junction-pcb

°C/W  
30  
Notes:  

(1)

When mounted on a 1-inch² FR-4, 2 Oz copper board.  
Table 4: Avalanche characteristics  
Parameter  
Symbol  
Value  
4
Unit  
A
I

AR  

Avalanche current, repetitive or non-repetitive  
Single pulse avalanche energy  
1150  
mJ  
Notes:  

(1)

Starting T

j

= 25 °C, I

D

= I

AR

, V

DD

= 50 V.  
DocID030840 Rev 2  
3/15  
 
 
 
 
 
 

Electrical characteristics  
STB35N65DM2  
2
Electrical characteristics  
(T

case

= 25 °C unless otherwise specified)  
Table 5: Static  
Symbol  
Parameter  
Drain-source  
Test conditions  
V

GS

= 0 V, I

D

= 1 mA  
Min. Typ.  
650  
Max. Unit  
V

(BR)DSS  

V
breakdown voltage  
V

GS

= 0 V, V

DS

= 650 V  
1
Zero gate voltage drain  
current  
I

DSS  

µA  
V

GS

= 0 V, V

DS

= 650 V,  
T

case

= 125

100  
Gate-body leakage  
current  
I

GSS  

V

DS

= 0 V, V

GS

= ±25 V  
V

DS

= V

GS

, I

D

= 250 µA  
V

GS

= 10 V, I

D

= 16 A  
±5  
5
µA  
V
V

GS(th)  

R

DS(on)  

Gate threshold voltage  
3
4
Static drain-source  
on-resistance  
0.093 0.110  
Ω
Notes:  

(1)

Defined by design, not subject to production test.  
Table 6: Dynamic  
Symbol  
C

iss  

Parameter  
Input capacitance  
Output capacitance  
Test conditions  
Min. Typ. Max. Unit  
–
–
2540  
115  
–
–
C

oss  

V

DS

= 100 V, f = 1 MHz,  
V

GS

= 0 V  
pF  
Reverse transfer  
capacitance  
C

rss  

–
–
2.5  
–
–
Equivalent output  
capacitance  
C

oss eq

V

DS

= 0 to 520 V, V

GS

= 0 V  
204  
pF  
R

G  

Q

g  

Intrinsic gate resistance
 
f = 1 MHz, I

D

= 0 A  
–
–
–
–
4.2  
–
–
–
–
Ω
Total gate charge  
Gate-source charge  
Gate-drain charge  
V

DD

= 520 V, I

D

= 32 A,  
V

GS

= 0 to 10 V  
56.3  
12.7  
27.6  
Q

gs  

Q

gd  

nC  
Notes:  
(1)  
C
oss eq.  
is defined as a constant equivalent capacitance giving the same charging time as C

oss

when V

DS  

increases from 0 to 80% V

DSS  

.
Table 7: Switching times  
Test conditions  
Symbol  
t

d(on)  

t

r  

Parameter  
Min. Typ. Max. Unit  
Turn-on delay time  
Rise time  
V

DD

= 325 V, I

D

= 16 A,  
R

G

= 4.7
Ω, V

GS

= 10 V  
–
–
–
23.4  
23  
–
–
–
ns  
t

d(off)  

Turn-off delay time  
72  
t

f  

Fall time  
–
10.4  
–
4/15  
DocID030840 Rev 2  
 
 

STB35N65DM2  
Electrical characteristics  
Min. Typ. Max. Unit  
Table 8: Source-drain diode  
Test conditions  
Symbol  
I

SD  

Parameter  
Source-drain current  
–
–
32  
90  
A
A
Source-drain current  
(pulsed)  
t

rr  

Forward on voltage  
V

GS

= 0 V, I

SD

= 32 A  
–
–
1.6  
V
Reverse recovery time  
100  
ns  
I

SD

= 32 A, di/dt = 100 A/µs,  
V

DD

= 60 V  
Reverse recovery  
charge  
Q

rr  

–
0.42  
µC  
Reverse recovery  
current  
I

RRM  

t

rr  

–
–
–
8.4  
205  
1.8  
A
Reverse recovery time  
ns  
µC  
I

SD

= 32 A, di/dt = 100 A/µs,  
V

DD

= 60 V, T

j

= 150 °C  
Reverse recovery  
charge  
Q

rr  

Reverse recovery  
current  
I

RRM  

–
17.6  
A
Notes:  

(1)

Pulse width is limited by safe operating area.  

(2)

Pulse test: pulse duration = 300 µs, duty cycle 1.5%  
DocID030840 Rev 2  
5/15  
 
 
 

Electrical characteristics  
STB35N65DM2  
2.1  
Electrical characteristics (curves)  
Figure 2: Safe operating area  
Figure 3: Thermal impedance  
Figure 4: Output characteristics  
Figure 5: Transfer characteristics  
Figure 6: Gate charge vs gate-source voltage  
Figure 7: Static drain-source on-resistance  
6/15  
DocID030840 Rev 2  
 

STB35N65DM2  
Figure 8: Capacitance variations  
Electrical characteristics  
Figure 9: Normalized gate threshold voltage vs  
temperature  
Figure 10: Normalized on-resistance vs temperature  
Figure 11: Normalized V

(BR)DSS

vs temperature  
Figure 12: Output capacitance stored energy  
Figure 13: Source- drain diode forward  
characteristics  
DocID030840 Rev 2  
7/15  

Test circuits  
STB35N65DM2  
3
Test circuits  
Figure 14: Test circuit for resistive load  
switching times  
Figure 15: Test circuit for gate charge  
behavior  
Figure 16: Test circuit for inductive load  
switching and diode recovery times  
Figure 17: Unclamped inductive load test  
circuit  
Figure 18: Unclamped inductive waveform  
Figure 19: Switching time waveform  
8/15  
DocID030840 Rev 2  

STB35N65DM2  
Package information  
4
Package information  
In order to meet environmental requirements, ST offers these devices in different grades of  
ECOPACK

®

packages, depending on their level of environmental compliance. ECOPACK

®  

specifications, grade definitions and product status are available at:

.  
ECOPACK

®

is an ST trademark.  
4.1  
D²PAK (TO-263) type A2 mechanical data  
Figure 20: D²PAK (TO-263) type A2 package outline  
DocID030840 Rev 2  
9/15  
 

Package information  
STB35N65DM2  
Table 9: D²PAK (TO-263) type A2 package mechanical data  
mm  
Dim.  
Min.  
4.40  
0.03  
0.70  
1.14  
0.45  
1.23  
8.95  
7.50  
1.10  
10.00  
8.70  
7.30  
Typ.  
Max.  
4.60  
0.23  
0.93  
1.70  
0.60  
1.36  
9.35  
8.00  
1.50  
10.40  
9.10  
7.70  
A
A1  
b
b2  
c
c2  
D
D1  
D2  
E
7.75  
1.30  
E1  
E2  
e
8.90  
7.50  
2.54  
e1  
H
4.88  
15.00  
2.49  
2.29  
1.27  
1.30  
5.28  
15.85  
2.69  
2.79  
1.40  
1.75  
J1  
L
L1  
L2  
R
0.40  
V2  
0°  
8°  
10/15  
DocID030840 Rev 2  

STB35N65DM2  
Package information  
Figure 21: D²PAK (TO-263) recommended footprint (dimensions are in mm)  
DocID030840 Rev 2  
11/15  

Package information  
STB35N65DM2  
4.2  
D²PAK (TO-263) packing information  
Figure 22: D²PAK tape outline  
12/15  
DocID030840 Rev 2  

STB35N65DM2  
Package information  
Figure 23: D²PAK reel outline  
Table 10: D²PAK tape and reel mechanical data  
Tape  
Reel  
mm  
mm  
Dim.  
Dim.  
Min.  
10.5  
15.7  
1.5  
Max.  
10.7  
15.9  
1.6  
Min.  
Max.  
A0  
B0  
D
A
B
C
D
G
N
T
330  
1.5  
12.8  
20.2  
24.4  
100  
13.2  
26.4  
30.4  
D1  
E
1.59  
1.65  
11.4  
4.8  
1.61  
1.85  
11.6  
5.0  
F
K0  
P0  
P1  
P2  
R
3.9  
4.1  
11.9  
1.9  
12.1  
2.1  
Base quantity  
Bulk quantity  
1000  
1000  
50  
T
0.25  
23.7  
0.35  
24.3  
W
DocID030840 Rev 2  
13/15  

Revision history  
STB35N65DM2  
5
Revision history  
Table 11: Document revision history  
Changes  
Date  
Revision  
10-Jul-2017  
1
Initial release  
Minor text changed.  
15-Jan-2018  
2
14/15  
DocID030840 Rev 2  

STB35N65DM2  
IMPORTANT NOTICE
–
PLEASE READ CAREFULLY  
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, and  
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der  
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design of Purchasers’ products.  
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Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product.  
ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners.  
Information in this document supersedes and replaces information previously supplied in any prior versions of this document.  
© 2018 STMicroelectronics
–
All rights reserved  
DocID030840 Rev 2  
15/15