STMicroelectronics-STD25NF10LT4

STD25NF10L  

N-CHANNEL 100V – 0.030

Ω

– 25A DPAK  

LOW GATE CHARGE STripFET™ II POWER MOSFET  

V

DSS  

R

I

D

TYPE  

DS(on)  

STD25NF10L  

100 V  

< 0.035

Ω  

25 A  

■

■

■

■

■

■

TYPICAL R

 

(on) = 0.030

Ω  

DS  

EXCEPTIONAL dv/dt CAPABILITY  

100% AVALANCHE TESTED  

LOW THRESHOLD DEVICE  

LOGIC LEVEL DEVICE  

3

1

SURFACE-MOUNTING DPAK (TO-252)  

POWER PACKAGE IN TAPE & REEL  

(SUFFIX “T4″)  

DPAK  

TO-252  

(Suffix “T4”)  

DESCRIPTION  

This MOSFET series realized with STMicroelectronics  

unique STripFET process has specifically been designed  

to minimize input capacitance and gate charge. It is  

therefore suitable as primary switch in advanced high-  

efficiency, high-frequency isolated DC-DC converters for  

T

e

lecom and Computer applications. It is also intended  

for any applications with low gate drive requirements  

INTERNAL SCHEMATIC DIAGRAM  

APPLICATIONS  

■

HIGH-EFFICIENCY DC-DC CONVERTERS  

■

UPS AND MOTOR CONTROL  

ABSOLUTE MAXIMUM RATINGS  

Symbol  

Parameter  

Value  

100  

100  

± 16  

25  

Unit  

V

V

Drain-source Voltage (V

 

= 0)  

DS  

GS  

V

Drain-gate Voltage (R

 

= 20 k

Ω

)  

V

DGR  

GS  

V

GS  

Gate- source Voltage  

V

I (*)  

D

Drain Current (continuous) at T

 

= 25°C  

A

C

I

D

Drain Current (continuous) at T

 

= 100°C  

25  

A

C

I

(

•

)  

Drain Current (pulsed)  

100  

100  

0.67  

20  

A

DM  

P

T

o

tal Dissipation at T

 

= 25°C  

W

tot  

C

Derating Factor  

W/°C  

V/ns  

mJ  

(1)  

(2)  

Peak Diode Recovery voltage slope  

Single Pulse Avalanche Energy  

Storage

T

e

mperature  

dv/dt  

E

450  

AS  

T

stg  

-55 to 175  

°C  

T

Max. Operating Junction

T

e

mperature  

j

(

•

)

Pulse width limited by safe operating area.  

(1) I

 

≤

25A, di/dt

≤

300A/µs, V

 

≤

V  

, T

≤

T  

SD  

DD  

(BR)DSS j

 

JMAX  

o

(*) Current Limited by Package  

(2) Starting T

 

= 25

 

C, I

 

= 12.5A, V

 

= 50V  

j

D

DD  

February 2003  

1/9  

STD25NF10L  

THERMAL DATA  

Rthj-case  

Rthj-pcb  

Thermal Resistance Junction-case  

Thermal Resistance Junction-pcb  

Maximum Lead

T

e

mperature For Soldering Purpose  

Max  

Max  

1.5  

50  

275  

°C/W  

°C/W  

°C  

(#)  

T

l

(#)  

2

When Mounted on 1 inch

 

FR-4 board, 2 oz of Cu.  

ELECTRICAL CHARACTERISTICS

(T  

= 25 °C UNLESS OTHERWISE SPECIFIED)  

CASE  

OFF  

Symbol  

Parameter  

Drain-source  

Test Conditions  

Min.  

Typ.  

Max.  

Unit  

I

= 250 µA, V

 

= 0  

100  

V

V

D

GS  

(BR)DSS  

Breakdown Voltage  

V

= Max Rating  

= Max Rating

 

T =

 

125°C  

Zero Gate Voltage  

1

10  

µA  

µA  

I

I

DS  

DSS  

Drain Current (V

 

= 0)  

V

DS  

GS  

C

Gate-body Leakage  

V

GS  

= ± 16 V  

±100  

nA  

GSS  

Current (V

 

= 0)  

DS  

(*

)  

ON  

Symbol  

Parameter  

Test Conditions  

Min.  

Typ.  

Max.  

Unit  

V

GS(th)  

V

= V  

I

= 250 µA  

Gate Threshold Voltage  

1

2.5  

V

DS  

GS  

D

V

V

= 10 V  

= 4.5 V  

I

I

= 12.5 A  

= 12.5 A  

Static Drain-source On  

Resistance  

0.030  

0.035  

0.035  

0.040  

Ω

Ω

R

GS  

D

D

DS(on)  

GS  

DYNAMIC  

Symbol  

Parameter  

Test Conditions  

= 15 V

 

= 12.5 A  

Min.  

Typ.  

Max.  

Unit  

(*)  

V

I

D

g

fs  

Forward Transconductance  

24  

S

DS  

V

DS  

= 25V

 

f = 1 MHz

 

V =

 

0  

GS  

C

Input Capacitance  

Output Capacitance  

Reverse Transfer  

Capacitance  

1710  

250  

110  

pF  

pF  

pF  

iss  

C

oss  

C

rss  

2/9  

STD25NF10L  

ELECTRICAL CHARACTERISTICS

(continued)  

SWITCHING ON  

Symbol  

Parameter  

Test Conditions  

= 50 V

 

= 12.5 A  

Min.  

Typ.  

Max.  

Unit  

V

R

I

D

Turn-on Delay Time  

Rise Time  

20  

40  

ns  

ns  

t

DD  

d(on)  

= 4.7

Ω  

V

GS  

= 5 V  

t

r

G

(Resistive Load, Figure 3)  

Q

V

= 80 V I

 

= 25 A V

 

= 5 V  

T

o

tal Gate Charge  

Gate-Source Charge  

Gate-Drain Charge  

38  

8.5  

21  

52  

nC  

nC  

nC  

g

DD  

D

GS  

Q

gs  

Q

gd  

SWITCHING OFF  

Symbol  

Parameter  

Test Conditions  

= 50 V

 

= 12.5 A  

Min.  

Min.  

Typ.  

Max.  

Unit  

V

R

I

D

Turn-off Delay Time  

Fall Time  

58  

20  

ns  

ns  

t

DD  

d(off)  

= 4.7

Ω,  

V

= 5 V  

GS  

t

G

f

(Resistive Load, Figure 3)  

SOURCE DRAIN DIODE  

Symbol  

Parameter  

Test Conditions  

Typ.  

Max.  

Unit  

I

Source-drain Current  

Source-drain Current (pulsed)  

25  

100  

A

A

SD  

( )  

•

I

SDM  

(*)  

I

I

= 25 A  

V

= 0  

GS  

V

Forward On Voltage  

1.5  

V

SD  

SD  

SD  

t

= 25 A  

= 50 V  

di/dt = 100A/µs  

T =

 

150°C  

Reverse Recovery Time  

Reverse Recovery Charge  

Reverse Recovery Current  

88  

317  

7.2  

ns  

nC  

A

rr  

Q

V

rr  

DD  

j

I

(see test circuit, Figure 5)  

RRM  

(*)  

(

Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %.  

•

)

Pulse width limited by safe operating area.  

Safe Operating Area  

Thermal Impedance  

3/9  

STD25NF10L  

Output Characteristics  

Transfer Characteristics  

Transconductance  

Static Drain-source On Resistance  

Gate Charge vs Gate-source Voltage  

Capacitance Variations  

4/9  

STD25NF10L  

Normalized Gate Threshold Voltage vs Temperature  

Normalized on Resistance vs Temperature  

Source-drain Diode Forward Characteristics  

Normalized Breakdown Voltage vs Temperature  

.

.

5/9  

STD25NF10L  

Fig. 1:

Unclamped Inductive Load Test Circuit  

Fig. 2:

Unclamped Inductive Waveform  

Fig. 3:

Switching Times Test Circuits For Resistive  

Fig. 4:

Gate Charge test Circuit  

Load  

Fig. 5:

Test Circuit For Inductive Load Switching  

And Diode Recovery Times  

6/9  

STD25NF10L  

TO-252 (DPAK) MECHANICAL DATA  

mm  

inch  

TYP.  

DIM.  

MIN.  

2.2  

TYP.  

MAX.  

2.4  

MIN.  

0.086  

0.035  

0.001  

0.025  

0.204  

0.017  

0.019  

0.236  

0.252  

0.173  

0.368  

MAX.  

0.094  

0.043  

0.009  

0.035  

0.212  

0.023  

0.023  

0.244  

0.260  

0.181  

0.397  

A

A1  

A2  

B

0.9  

1.1  

0.03  

0.64  

5.2  

0.23  

0.9  

B2  

C

5.4  

0.45  

0.48  

6

0.6  

C2  

D

0.6  

6.2  

E

6.4  

6.6  

G

4.4  

4.6  

H

9.35  

10.1  

L2  

L4  

0.8  

0.031  

0.6  

1

0.023  

0.039  

H

DETAIL “A”  

D

L2  

DETAIL “A”  

L4  

0068772-B  

7/9  

STD25NF10L  

8/9  

STD25NF10L  

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of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted  

by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject  

to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not  

authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.  

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2002 STMicroelectronics – All Rights Reserved  

All other names are the property of their respective owners.  

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9/9