STMicroelectronics-STD45NF75T4
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STD45NF75T4
Datasheet
Automotive-grade N-channel 75 V, 18 mΩ, 40 A, STripFET™ II
Power MOSFET in a DPAK package
Features
V
R
DS(on)
max.
I
D
Type
DS
TAB
STD45NF75T4
75 V
24 mΩ
40 A
3
2
1
DPAK
•
•
•
•
AEC-Q101 qualified
Exceptional dv/dt capability
100% avalanche tested
Low gate charge
D(2, TAB)
Applications
G(1)
•
Switching applications
Description
S(3)
AM01475v1_noZen
This Power MOSFET series has been developed using STMicroelectronics’ unique
STripFET™ process, which is specifically designed to minimize input capacitance
and gate charge. This renders the device suitable for use as primary switch in
advanced high-efficiency isolated DC-DC converters for telecom and computer
applications, and applications with low gate charge driving requirements.
Product status link
Product summary
Order code
Marking
STD45NF75T4
D45NF75
DPAK
Package
Packing
T
a
pe and reel
DS3559
–
Rev 6
–
October 2018
For further information contact your local STMicroelectronics sales office.
STD45NF75T4
Electrical ratings
1
Electrical ratings
Table 1.
Absolute maximum ratings
Parameter
Symbol
Value
75
Unit
V
V
Drain-source voltage
Gate-source voltage
DS
GS
V
±20
30
V
Drain current (continuous) at T
= 25 °C
A
C
I
D
Drain current (continuous) at T
= 100 °C
A
C
I
Drain current (pulsed)
160
125
500
20
A
DM
P
T
o
tal dissipation at T
= 25 °C
W
TOT
C
E
Single-pulse avalanche energy
Peak diode recovery voltage slope
Storage temperature range
mJ
V/ns
AS
T
stg
-55 to 175
°C
T
Operating junction temperature range
j
1. This
value is limited by package.
2. Pulse
width is limited by safe operating area.
3. Starting
T =
25 °C, I
= 20 A, V
= 40 V
J
D
DD
4.
I
≤ 40 A, di/dt ≤ 800 A/μs, V
≤ V
, T
≤ T
(BR)DSS J
JMAX
SD
DD
Table 2.
Thermal data
Parameter
Symbol
Value
1.2
Unit
°C/W
°C/W
R
Thermal resistance junction-case
thj-case
R
thj-pcb
50
1. When
mounted on an 1-inch² FR-4, 2 Oz copper board.
DS3559
–
Rev 6
page 2/16
STD45NF75T4
Electrical characteristics
2
Electrical characteristics
T
CASE
= 25 °C unless otherwise specified
Table 3.
On/off states
Symbol
Parameter
Test conditions
Min.
Typ.
Max.
Unit
V
V
V
V
V
T
= 0
V
, I
=
2
50 μA
Drain-source breakdown voltage
75
(BR)DSS
GS
GS
GS
D
= 0
V
, V
=
7
5 V
1
µA
DS
I
= 0
V
, V
= 75 V,
Zero gate voltage drain current
DSS
DS
10
µA
C
I
V
V
V
= 0
V
, V
=
±
20 V
Gate body leakage current
Gate threshold voltage
±100
4
nA
V
GSS
DS
GS
V
= V
, I
= 250 µA
2
GS(th)
DS(on)
DD
GS
GS
D
R
= 10 V, I
= 20 A
D
Static drain-source on-resistance
18
24
mΩ
1. Defined
by design, not subject to production test.
Table 4.
Dynamic
Symbol
Parameter
Input capacitance
Test conditions
Min.
Typ.
1760
360
140
60
Max.
Unit
pF
C
iss
–
–
–
–
–
–
–
V
V
= 25 V, f = 1 MHz,
DS
C
Output capacitance
pF
oss
= 0 V
GS
C
rss
Reverse transfer capacitance
T
o
tal gate charge
–
pF
Q
V
= 60 V, I
= 40 A,
80
–
nC
nC
g
DD
D
R
= 4.7 Ω, V
= 0 to 10 V
Q
G
GS
Gate-source charge
13
gs
Q
Gate-drain charge
–
23
–
nC
gd
Table 5.
Switching times
Test conditions
Symbol
Parameter
Turn-on delay time
Rise time
Min.
Typ.
15
Max.
Unit
ns
t
V
= 37
V
, I
=
2
0 A,
–
–
–
–
–
–
d(on)
DD
D
R
= 4.7 Ω, V
= 10 V
t
r
G
GS
40
ns
t
Turn-off delay time
55
ns
d(off)
t
Fall time
–
10
–
ns
f
DS3559
–
Rev 6
page 3/16
STD45NF75T4
Electrical characteristics
Table 6.
Source-drain diode
Test conditions
Symbol
Parameter
Source-drain current
Min.
Typ.
Max.
40
Unit
A
I
–
–
–
–
–
SD
I
Source-drain current (pulsed)
Forward on voltage
160
1.5
A
SDM
V
I
I
= 40 A, V
= 0 V
V
SD
SD
GS
SD
t
= 40 A, di/dt = 100 A/µs,
= 30
V
, T
=
1
50 °C
Reverse recovery time
Reverse recovery charge
120
410
ns
nC
rr
V
Q
DD
J
rr
I
Reverse recovery current
–
7.5
A
RRM
1. Pulse
width limited by safe operating area
2. Pulsed:
pulse duration = 300 µs, duty cycle 1.5%
DS3559
–
Rev 6
page 4/16
STD45NF75T4
Electrical characteristics (curves)
2.1
Electrical characteristics (curves)
Figure 2.
Thermal impedance
Figure 1.
Safe operating area
AM
0
3943v1
280dpg
I
D
K
10
-1
10
-2
(A)
δ=0.5
100
0.2
0.1
100µs
10
0.05
0.02
1ms
Zth=k Rthj-c
δ=tp/τ
Tj=175°C
Tc=25°C
10ms
1
0.01
Single
pu
l
s
e
tp
τ
S
i
n
g
l
e
p
u
l
s
e
10
-4
0.1
0.1
10
-2
10
-5
10
-3
10
-1
10
V
D
S
(V)
p
(
s
)
t
1
Figure 3.
Output characteristics
Figure 4.
Transfer characteristics
V
DS
= 10 V
Figure 5.
Static drain-source on-resistance
Figure 6.
Gate charge vs gate-source voltage
DS3559
–
Rev 6
page 5/16
STD45NF75T4
Electrical characteristics (curves)
Figure 8.
Normalized gate threshold voltage vs
temperature
Figure 7.
Capacitance variations
T
J
(°C)
125
175
-25
25
75
-75
Figure 9.
Normalized on-resistance vs temperature
Figure 10.
Source-drain diode forward characteristics
T
J
(°C)
125
175
-25
25
75
-75
Figure 11.
Normalized V
(BR)DSS
vs temperature
V
GS
= 0
V
,
I
D
= 250 μA
T
J
(°C)
125
175
-25
25
75
-75
DS3559
–
Rev 6
page 6/16
STD45NF75T4
Test circuits
3
Test circuits
Figure 12.
Test circuit for resistive load switching times
Figure 13.
Test circuit for gate charge behavior
V
DD
12 V
47 kΩ
1 kΩ
100 nF
R
L
2200
μF
3.3
μF
V
DD
+
I
G
= CONST
2.7 kΩ
V
D
R
G
D.U.
T
.
100 Ω
V
GS
pulse width
+
D.U.
T
.
V
GS
V
G
2200
μF
pulse width
47 kΩ
1 kΩ
AM01469v1
AM01468v1
Figure 14.
Test circuit for inductive load switching and
diode recovery times
Figure 15.
Unclamped inductive load test circuit
L
A
A
A
D
S
V
D
100 µH
D
fast
G
D.U.
T
.
B
diode
2200
3.3
µF
+
V
DD
1000
µF
B
µF
3.3
µF
B
+
V
DD
I
D
25 Ω
G
D.U.
T
.
R
G
S
+
_
D.U.
T
.
V
i
pulse width
AM01471v1
AM01470v1
Figure 17.
Switching time waveform
Figure 16.
Unclamped inductive waveform
t
on
t
d(on)
t
off
t
d(off)
V
(BR)DSS
t
r
t
f
V
D
90%
90%
I
DM
V
DS
10%
V
GS
10%
0
0
I
D
V
DD
V
DD
90%
10%
AM01472v1
AM01473v1
DS3559
–
Rev 6
page 7/16
STD45NF75T4
Package information
4
Package information
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK
®
packages, depending on their level of environmental compliance. ECOPACK
®
specifications, grade definitions
DS3559
–
Rev 6
page 8/16
STD45NF75T4
DPAK (TO-252) type A2 package information
4.1
DPAK (TO-252) type A2 package information
Figure 18.
DPAK (TO-252) type A2 package outline
0068772_type-A2_rev25
DS3559
–
Rev 6
page 9/16
STD45NF75T4
DPAK (TO-252) type A2 package information
Table 7.
DPAK (TO-252) type A2 mechanical data
mm
Dim.
Min.
2.20
0.90
0.03
0.64
5.20
0.45
0.48
6.00
4.95
6.40
5.10
2.159
4.445
9.35
1.00
2.60
0.65
0.60
Typ.
Max.
2.40
1.10
0.23
0.90
5.40
0.60
0.60
6.20
5.25
6.60
5.30
2.413
4.699
10.10
1.50
3.00
0.95
1.00
A
A1
A2
b
b4
c
c2
D
D1
E
5.10
E1
e
5.20
2.286
4.572
e1
H
L
L1
L2
L4
R
2.80
0.80
0.20
V2
0°
8°
DS3559
–
Rev 6
page 10/16
STD45NF75T4
DPAK (TO-252) type A2 package information
Figure 19.
DPAK (TO-252) recommended footprint (dimensions are in mm)
FP_0068772_25
DS3559
–
Rev 6
page 11/16
STD45NF75T4
DPAK (TO-252) packing information
4.2
DPAK (TO-252) packing information
Figure 20.
DPAK (TO-252) tape outline
10 pitches cumulative
tolerance on tape +/- 0.2 mm
P0
Top cover
tape
P2
D
T
E
F
W
K0
B1
B0
For machine ref. only
including draft and
A0
D1
P1
radii concentric around B0
U
s
er direction o
f
f
e
ed
R
Bending radius
U
s
er direction o
f
f
e
ed
AM08852v1
DS3559
–
Rev 6
page 12/16
STD45NF75T4
DPAK (TO-252) packing information
Figure 21.
DPAK (TO-252) reel outline
T
40mm min.
access hole
at slot location
B
D
C
N
A
G measured
at hub
Tape slot
in core for
tape start
Full radius
2.5mm min.width
AM06038v1
Table 8.
DPAK (TO-252) tape and reel mechanical data
Tape
Reel
mm
mm
Dim.
Dim.
Min.
6.8
Max.
7
Min.
Max.
A0
B0
B1
D
A
B
C
D
G
N
T
330
10.4
10.6
12.1
1.6
1.5
12.8
20.2
16.4
50
13.2
18.4
22.4
1.5
1.5
D1
E
1.65
7.4
1.85
7.6
F
K0
P0
P1
P2
R
2.55
3.9
2.75
4.1
Base qty.
Bulk qty.
2500
2500
7.9
8.1
1.9
2.1
40
T
0.25
15.7
0.35
16.3
W
DS3559
–
Rev 6
page 13/16
STD45NF75T4
Revision history
Table 9.
Document revision history
Date
Version
Changes
22-Jun-2004
09-Sep-2004
11-Jul-2006
20-Feb-2007
20-May-2009
1
2
3
4
5
Preliminary version
Complete version
New template, no content change
Typo mistake on page 1
Figure 2
and
Figure 3
have been updated
Updated information on cover page.
Minor text changes
03-Oct-2018
6
DS3559
–
Rev 6
page 14/16
STD45NF75T4
Contents
Contents
Electrical ratings
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
.
2
Electrical characteristics
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
.
3
Electrical characteristics (curves)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5
Test circuits
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
.
7
Package information
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
.
8
DPAK (TO-252) type A2 package information
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
8
DPAK (TO-252) packing information
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
11
Revision history
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
14
DS3559
–
Rev 6
page 15/16
STD45NF75T4
IMPORTANT NOTICE – PLEASE READ CAREFULLY
STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST
products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST
products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement.
Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of
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ST and the ST logo are trademarks of S
T
.
A
ll other product or service names are the property of their respective owners.
Information in this document supersedes and replaces information previously supplied in any prior versions of this document.
© 2018 STMicroelectronics – All rights reserved
DS3559
–
Rev 6
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