STMicroelectronics-STD4N62K3
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STD4N62K3
Datasheet
N-channel 620
V
,
1
.7 Ω typ., 3.8 A MDmesh K3 Power MOSFET
in a DPAK package
Features
TAB
V
R
DS(on)
max.
I
D
Order code
DS
3
2
STD4N62K3
620 V
2.0 Ω
3.8 A
1
•
•
•
•
•
100% avalanche tested
DPAK
Extremely high dv/dt capability
Very low intrinsic capacitance
D(2, TAB)
Improved diode reverse recovery characteristics
Zener-protected
G(1)
Applications
•
Switching applications
S(3)
Description
AM01476v1_tab
This MDmesh K3 Power MOSFET is the result of improvements applied to
STMicroelectronics’ MDmesh technology, combined with a new optimized vertical
structure. This device boasts an extremely low on-resistance, superior dynamic
performance and high avalanche capability, rendering it suitable for the most
demanding applications.
Product status link
Product summary
Order code
STD4N62K3
Marking
Package
Packing
4N62K3
DPAK
T
a
pe and reel
DS7065
–
Rev 5
–
July 2023
For further information contact your local STMicroelectronics sales office.
STD4N62K3
Electrical ratings
1
Electrical ratings
Table 1.
Absolute maximum ratings
Parameter
Symbol
Value
Unit
V
V
Drain-source voltage
Gate-source voltage
620
±30
3.8
2
DS
GS
V
V
Drain current (continuous) at T
= 25 °C
C
I
D
A
Drain current (continuous) at T
= 100 °C
C
I
Drain current (pulsed)
15.2
70
A
W
A
DM
P
T
o
tal power dissipation at T
= 25 °C
TOT
C
I
Avalanche current, repetitive or not-repetitive
3.8
AR
E
Single pulse avalanche energy
115
2.5
12
mJ
kV
AS
ESD
Gate-source human body model (R = 1.5 kΩ, C = 100 pF)
Peak diode recovery voltage slope
V/ns
°C
T
Storage temperature range
stg
-55 to 150
T
Maximum operating junction temperature
°C
J
1. Pulse
width limited by safe operating area.
2. Starting
T =
25 °C, I
= I
, V
= 50 V.
J
D
AR
DD
3.
I
≤ 3.8 A, di/dt ≤ 400 A/µs, V
= 80% V
, V
(peak) ≤ V
DS
.
(BR)DSS
SD
DD
(BR)DSS
Table 2.
Thermal data
Parameter
Symbol
Value
1.79
50
Unit
°C/W
°C/W
R
thJC
Thermal resistance, junction-to-case
R
Thermal resistance, junction-to-ambient
thJA
2
1.
When mounted on 1 inch
FR-4, 2 Oz copper board.
DS7065
–
Rev 5
page 2/18
STD4N62K3
Electrical characteristics
2
Electrical characteristics
T
C
= 25 °C unless otherwise specified.
Table 3.
On /off states
Symbol
Parameter
Test conditions
Min.
620
Typ. Max. Unit
V
I =
1 mA, V
= 0 V
D GS
Drain-source breakdown voltage
V
(BR)DSS
V
V
V
V
= 0
V
, V
=
6
20 V
1
µA
µA
µA
V
GS
GS
GS
DS
DS
I
Zero gate voltage drain current
DSS
50
DS
C
I
= ±20
V
, V
= 0 V
Gate body leakage current
Gate threshold voltage
± 10
4.5
GSS
DS
V
= V
, I
= 50 µA
3
3.75
1.7
GS(th)
GS
D
Static drain-source
on-resistance
R
V
= 10
V
, I
=
1
.9 A
GS D
2.0
Ω
DS(on)
1. Specified
by design, not tested in production.
Table 4.
Dynamic
Symbol
Parameter
Input capacitance
Test conditions
Min.
Typ. Max. Unit
C
iss
550
42
7
pF
pF
pF
pF
Ω
C
oss
V
V
= 50
V
, f = 1
M
Hz,V
= 0 V
Output capacitance
DS
GS
GS
C
rss
Reverse transfer capacitance
Equivalent output capacitance
Intrinsic gate resistance
T
o
tal gate charge
= 0
V
, V
= 0
t
o 496 V
C
oss eq.
27
5
DS
R
f = 1 MHz, I
= 0 A
D
2
10
G
Q
22
4
nC
nC
nC
g
V
= 496
V
, I
=
3
.8 A, V
= 0 to 10 V
D GS
DD
Q
Gate-source charge
gs
Q
gd
Gate-drain charge
13
1.
C
oss eq.
is defined as a constant equivalent capacitance giving the same charging time as C
when V
increases from 0
oss DS
to 80% V
.
DSS
Table 5.
Switching times
Test conditions
Symbol
Parameter
Min.
Typ. Max. Unit
t
Turn-on delay time
Rise time
–
–
–
–
10
9
–
–
–
–
ns
ns
ns
ns
d(on)
V
V
= 300
V
, I
=
1
.9 A, R
= 4.7 Ω,
D G
DD
t
r
GS
t
Turn-off delay time
Fall time
29
19
d(off)
t
f
DS7065
–
Rev 5
page 3/18
STD4N62K3
Electrical characteristics
Table 6.
Source-drain diode
Test conditions
Symbol
Parameter
Source-drain current
Min.
Typ. Max. Unit
I
–
–
–
–
–
–
–
–
–
3.8
15.2
1.6
A
A
SD
I
Source-drain current (pulsed)
Forward on voltage
SDM
V
I
I
= 3.8 A, V
= 0 V
GS
V
SD
SD
SD
t
Reverse recovery time
Reverse recovery charge
Reverse recovery current
Reverse recovery time
Reverse recovery charge
Reverse recovery current
220
1.4
13
ns
μC
A
rr
= 3.8 A, di/dt = 100 A/µs, V
= 60 V
DD
Q
rr
I
RRM
t
I
= 3.8 A, di/dt = 100 A/µs, V
= 60
V
,
SD DD
270
1.9
14
ns
μC
A
rr
Q
J
rr
I
RRM
1. Pulse
width limited by safe operating area.
2. Pulsed:
pulse duration = 300 µs, duty cycle 1.5%.
DS7065
–
Rev 5
page 4/18
STD4N62K3
Electrical characteristics (curves)
2.1
Electrical characteristics (curves)
Figure 1.
Safe operating area
Figure 2.
Normalized transient thermal impedance
AM
0
7173v1
GC20460
I
D
K
(A)
10µs
10
10
0
100µs
1
0.1
1ms
10ms
10
-1
Tj=150°C
Tc=25°C
Z
th
= K *R
thJC
S
i
n
g
l
e
p
u
l
s
e
10
-2
0.01
10
-5
10
-4
10
-3
10
-2
10
-1
t
p
(s)
10
V
D
S
(V)
0.1
1
100
Figure 3.
Typical output characteristics
Figure 4.
Typical transfer characteristics
AM
0
7175v1
AM
0
7176v1
I
D
I
D
(A)
(A)
V
D
S
=15V
8
7
6
5
V
GS
=10V
6
7V
5
4
4
3
2
1
0
3
2
6V
1
0
5V
5
2
20
25
V
D
S
(V)
8
V
GS
(V)
0
10
15
0
4
6
Figure 5.
Typical gate charge characteristics
Figure 6.
Typical drain-source on-resistance
AM
0
7178v1
DS
(V)
V
GS
R
D
S
(
on)
(V)
(Ω)
DS
V
DD
=496V
I
D
V
GS
=10V
1.9
1.8
1.7
10
8
6
4
2
0
1.6
1.5
2
3
1
10
20
0
5
15
Q
g
(nC)
0
I
D
(A)
DS7065
–
Rev 5
page 5/18
STD4N62K3
Electrical characteristics (curves)
Figure 7.
Typical capacitance characteristics
Figure 8.
Typical output capacitance stored energy
AM
0
7179v1
AM
0
7180v1
C
E
oss
(pF)
(µ
J
)
3.0
1000
2.5
C
i
s
s
2.0
1.5
1.0
100
Coss
Crss
10
f = 1 MHz
0.5
0
1
0.1
100
1
10
V
D
S
(V)
200
400 500
600
V
D
S
(V)
0
100
300
Figure 9.
Normalized gate threshold vs temperature
Figure 10.
Normalized on-resistance vs temperature
AM
0
7181v1
AM
0
7182v1
V
GS(th)
(norm)
R
D
S
(
on)
(norm)
1.10
2.5
I
D
= 1 mA
2.0
1.00
0.90
V
GS
= 10 V
I
D
= 1.9 A
1.5
1.0
0.80
0.70
0.5
0.0
-75
-75
-25
25
75
T
J
(°C)
-25
25
75
T
J
(°C)
125
125
Figure 11.
Normalized breakdown voltage vs temperature
Figure 12.
Typical reverse diode forward characteristics
AM
0
7183v1
AM
0
8888v1
V
(BR)DSS
(norm)
SD
(V)
V
T
J
=25°C
1.10
0.7
0.6
0.5
0.4
0.3
1.05
1.00
T
J
=150°C
0.95
0.90
0.2
0.1
-75
0
-25
25
75
T
J
(°C)
1
2
3
4
5
I
S
D
(A)
125
DS7065
–
Rev 5
page 6/18
STD4N62K3
Electrical characteristics (curves)
Figure 13.
Maximum avalanche energy vs starting T
J
AM
0
7184v1
E
AS
(mJ)
120
110
100
90
I
D
=3.8 A
V
DD
=50 V
80
70
60
50
40
30
20
10
0
0
120
140 T
20
40
60 80
100
J
(°C)
DS7065
–
Rev 5
page 7/18
STD4N62K3
Test circuits
3
Test circuits
Figure 14.
Test circuit for resistive load switching times
Figure 15.
Test circuit for gate charge behavior
V
DD
12 V
47 kΩ
1 kΩ
100 nF
R
L
2200
μF
3.3
μF
V
DD
+
I
G
= CONST
2.7 kΩ
V
D
R
G
D.U.
T
.
100 Ω
V
GS
pulse width
+
D.U.
T
.
V
GS
V
G
2200
μF
pulse width
47 kΩ
1 kΩ
AM01469v1
AM01468v1
Figure 17.
Unclamped inductive load test circuit
Figure 16.
Test circuit for inductive load switching and
diode recovery times
A
A
A
L
D
S
100 µH
D
fast
diode
V
D
G
D.U.
T
.
B
2200
3.3
1000
µF
B
3.3
µF
B
µF
V
DD
+
µF
+
V
DD
25 Ω
I
D
G
D.U.
T
.
R
G
S
+
_
D.U.
T
.
V
i
pulse width
AM01470v1
AM01471v1
Figure 18.
Unclamped inductive waveform
Figure 19.
Switching time waveform
t
on
t
d(on)
t
off
t
d(off)
V
(BR)DSS
t
r
t
f
V
D
90%
90%
I
DM
V
DS
10%
V
GS
10%
I
D
0
0
V
DD
V
DD
90%
10%
AM01472v1
AM01473v1
DS7065
–
Rev 5
page 8/18
STD4N62K3
Package information
4
Package information
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK
packages,
depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product
4.1
DPAK (TO-252) type C3 package information
Figure 20.
DPAK (TO-252) type C3 package outline
0068772_type-C3_rev34
DS7065
–
Rev 5
page 9/18
STD4N62K3
DPAK (TO-252) type C3 package information
Table 7.
DPAK (TO-252) type C3 mechanical data
mm
Typ.
2.30
Dim.
Min.
2.20
0.00
0.90
0.72
0.72
5.13
0.47
0.47
6.00
5.20
6.50
5.00
2.186
9.80
1.40
Max.
2.38
0.10
1.10
0.85
1.10
5.46
0.60
0.60
6.20
5.70
6.70
5.40
2.386
10.40
1.70
A
A1
A2
b
1.01
5.33
b2
b3
c
c2
D
6.10
5.45
D1
E
6.60
E1
e
5.20
2.286
10.10
1.50
H
L
L1
L2
L3
L4
L5
L6
θ
2.90 REF
0.51 BSC
0.90
0.60
0.15
1.25
1.00
0.75
0.80
1.80 REF
0°
5°
5°
8°
9°
9°
θ1
θ2
7°
7°
DS7065
–
Rev 5
page 10/18
STD4N62K3
DPAK (TO-252) type E package information
4.2
DPAK (TO-252) type E package information
Figure 21.
DPAK (TO-252) type E package outline
0068772_typeE_rev.34
DS7065
–
Rev 5
page 11/18
STD4N62K3
DPAK (TO-252) type E package information
Table 8.
DPAK (TO-252) type E mechanical data
mm
Typ.
Dim.
Min.
Max.
2.39
0.13
0.884
5.46
0.61
0.60
6.22
A
A2
b
2.18
0.65
4.95
0.46
0.46
5.97
5.21
6.35
4.32
b4
c
c2
D
D1
E
6.73
E1
e
2.286
4.572
e1
H
9.94
1.50
10.34
1.78
L
L1
L2
L4
2.74
0.89
1.27
1.02
DS7065
–
Rev 5
page 12/18
STD4N62K3
DPAK (TO-252) type E package information
Figure 22.
DPAK (TO-252) recommended footprint (dimensions are in mm)
FP_0068772_34
DS7065
–
Rev 5
page 13/18
STD4N62K3
DPAK (TO-252) packing information
4.3
DPAK (TO-252) packing information
Figure 23.
DPAK (TO-252) tape outline
10 pitches cumulative
tolerance on tape +/- 0.2 mm
P0
Top cover
tape
P2
D
T
E
F
W
K0
B1
B0
For machine ref. only
including draft and
A0
D1
P1
radii concentric around B0
U
s
er direction o
f
f
e
ed
R
Bending radius
U
s
er direction o
f
f
e
ed
AM08852v1
DS7065
–
Rev 5
page 14/18
STD4N62K3
DPAK (TO-252) packing information
Figure 24.
DPAK (TO-252) reel outline
T
40mm min.
access hole
at slot location
B
D
C
N
A
G measured
at hub
Tape slot
in core for
tape start
Full radius
2.5mm min.width
AM06038v1
Table 9.
DPAK (TO-252) tape and reel mechanical data
Tape
Reel
mm
mm
Dim.
Dim.
Min.
6.8
Max.
7
Min.
Max.
A0
B0
B1
D
A
B
C
D
G
N
T
330
10.4
10.6
12.1
1.6
1.5
12.8
20.2
16.4
50
13.2
18.4
22.4
1.5
1.5
D1
E
1.65
7.4
1.85
7.6
F
K0
P0
P1
P2
R
2.55
3.9
2.75
4.1
Base qty.
Bulk qty.
2500
2500
7.9
8.1
1.9
2.1
40
T
0.25
15.7
0.35
16.3
W
DS7065
–
Rev 5
page 15/18
STD4N62K3
Revision history
Table 10.
Document revision history
Changes
Date
Revision
16-Dec-2010
1
First release.
Added min and max values for RG in
T
a
ble 5: Dynamic and
Section 5: Packaging mechanical data.
Updated Section 4: Package mechanical data.
Minor text changes.
26-Apr-2012
09-Sep-2013
2
3
– Updated:
Section 4: Package mechanical data
– Minor text changes
The part number STB4N62K3 has been moved to a separate datasheet.
Removed maturity status indication from cover page. The document status is production data.
Updated title and features in cover page.
03-Aug-2018
04-Jul-2023
4
5
Updated
Section 1 Electrical ratings
,
Section 2 Electrical characteristics
and
Section 4
Package information
.
Minor text changes.
Minor text changes.
DS7065
–
Rev 5
page 16/18
STD4N62K3
Contents
Contents
Electrical ratings
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
.
2
Electrical characteristics
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
.
3
Electrical characteristics (curves)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5
Test circuits
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
.
8
Package information
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
.
9
DPAK (TO-252) type C3 package informatio
n
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
9
DPAK (TO-252) type E package information
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
11
DPAK (TO-252) packing information
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
.
14
Revision history
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
16
DS7065
–
Rev 5
page 17/18
STD4N62K3
IMPORTANT NOTICE – READ CAREFULLY
STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST
products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST
products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgment.
Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of
purchasers’ products.
No license, express or implied, to any intellectual property right is granted by ST herein.
Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product.
ST and the ST logo are trademarks of S
T
.
F
or additional information about ST trademarks, refer to
www.st.com/trademarks
. All other product or service names
are the property of their respective owners.
Information in this document supersedes and replaces information previously supplied in any prior versions of this document.
© 2023 STMicroelectronics – All rights reserved
DS7065
–
Rev 5
page 18/18
