STMicroelectronics-STD5N60DM2

Part #STMicroelectronics-STD5N60DM2
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STMicroelectronics-STD5N60DM2
STD5N60DM2  
Datasheet  
N-channel 600
V
,
1
.38 Ω typ., 3.5 A MDmesh™ DM2  
Power MOSFET in a DPAK package  
Features  
V
R
DS(on)  
max.  
I
D
P
TOT  
Order code  
DS  
TAB  
STD5N60DM2  
600 V  
1.55 Ω  
3.5 A  
45 W  
3
2
1
•
•
•
•
•
•
Fast-recovery body diode  
DPAK  
Extremely low gate charge and input capacitance  
Low on-resistance  
D(2, TAB)  
100% avalanche tested  
Extremely high dv/dt ruggedness  
Zener-protected  
G(1)  
Applications  
•
Switching applications  
S(3)  
AM01475V1  
Description  
This high-voltage N-channel Power MOSFET is part of the MDmesh™ DM2 fast  
recovery diode series. It offers very low recovery charge (Q

rr

) and time (t

rr

) combined  
with low R

DS(on)

, rendering it suitable for the most demanding high-efficiency  
converters and ideal for bridge topologies and ZVS phase-shift converters.  
Product status link  
Product summary  
Order code  
Marking  
STD5N60DM2  
5N60DM2  
DPAK  
Package  
Packing  
T
a
pe and reel  
DS11742
–
Rev 3
–
June 2018  
For further information contact your local STMicroelectronics sales office.  

STD5N60DM2  
Electrical ratings  
1
Electrical ratings  
Table 1.
Absolute maximum ratings  
Parameter  
Symbol  
Value  
Unit  
V
Gate-source voltage  
±30  
3.5  
2
V
GS  
Drain current (continuous) at T  
Drain current (continuous) at T  
Drain current (pulsed)  
= 25 °C  
case  
case  
I
A
D
= 100 °C  
I
14  
45  
40  
40  
A
DM  
P
T
o
tal dissipation at T  
= 25 °C  
case  
W
TOT  
dv/dt

dv/dt

Peak diode recovery voltage slope  
MOSFET dv/dt ruggedness  
Storage temperature range  
V/ns  
°C  
T
stg  
-55 to 150  
T
Operating junction temperature range  
j
1. Pulse
 
width is limited by safe operating area.  
2.  
3.  
I
≤ 3.5 A, di/dt=400 A/μs; V
 
peak < V  
, V
 
= 480 V.  
(BR)DSS DD  
SD  
DS  
V
≤ 480 V.  
DS  
Table 2.
Thermal data  
Parameter  
Symbol  
Value  
2.78  
50  
Unit  
R
thj-case  
Thermal resistance junction-case  
Thermal resistance junction-pcb  
1. When
 
mounted on a 1-inch² FR-4, 2 Oz copper board.  
°C/W  
R
thj-pcb  
Table 3.
Avalanche characteristics  
Symbol  
Parameter  
Avalanche current, repetitive or not repetitive  
Single pulse avalanche energy  
Value  
1
Unit  
I
A
AR  
E
132  
mJ  
AS  
1. Pulse
 
width limited by T  
.
jmax  
2. Starting
 
T =
 
25 °C, I
 
= I
 
, V
 
= 50 V.  
j
D
AR  
DD  
DS11742
–
Rev 3  
page 2/18  
 
 
 
 
 
 
 
 

STD5N60DM2  
Electrical characteristics  
2
Electrical characteristics  
(T

case

= 25 °C unless otherwise specified).  
Table 4.
Static  
Symbol  
Parameter  
Test conditions  
Min.  
Typ.  
Max.  
Unit  
Drain-source breakdown  
voltage  
V
V
V
= 0
V
, I
 
= 1
m
A  
600  
V
(BR)DSS  
GS  
D
= 0
V
, V
 
=
6
00 V  
1
GS  
GS  
DS  
Zero gate voltage drain  
current  
I
µA  
DSS  
V
T
= 0
V
, V
 
=
6
00 V,  
DS  
100  
= 125 °C

case  
I
V
= 0
V
, V
 
=
±
25 V  
GS  
Gate-body leakage current  
Gate threshold voltage  
±5  
5
µA  
V
GSS  
DS  
DS  
V
V
V
= V
 
, I
 
= 250 µA  
3
4
GS(th)  
GS  
D
Static drain-source on-  
resistance  
R
DS(on)  
= 10
V
, I
 
=
1
.75 A  
1.38  
1.55  
Ω
GS  
D
1. Defined
 
by design, not subject to production test.  
Table 5.
Dynamic  
Test conditions  
Symbol  
Parameter  
Input capacitance  
Min.  
Typ.  
214  
12  
Max.  
Unit  
C
iss  
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
C
V
V
= 100
V
, f = 1
M
Hz, V
 
= 0 V  
Output capacitance  
pF  
oss  
DS  
GS  
C
rss  
Reverse transfer capacitance  
Equivalent output capacitance  
Intrinsic gate resistance  
T
o
tal gate charge  
3.5  
21  
= 0 to 480
V
, V
 
= 0 V  
C
oss eq.  
pF  
Ω
DS  
GS  
R
G
f = 1 MHz, I
 
= 0 A  
D
6.5  
5.3  
1.4  
2.7  
Q
g
V
= 480
V
, I
 
=
3
.5 A, V
 
= 0 to  
D GS  
DD  
Q
gs  
Gate-source charge  
nC  
Q
Gate-drain charge  
gd  
1.  
C
oss eq.  
is defined as a constant equivalent capacitance giving the same charging time as C  
when V
 
increases from 0  
oss DS  
to 80% V  
.
DSS  
Table 6.
Switching times  
Test conditions  
Symbol  
Parameter  
Min.  
Typ.  
7.2  
Max.  
Unit  
t
Turn-on delay time  
Rise time  
–
–
–
–
–
–
–
–
d(on)  
V
V
= 300
V
, I
 
=
1
.75 A R
 
= 4.7 Ω,  
D G  
DD  
t
4.1  
GS  
r
ns  
t
Turn-off delay time  
Fall time  
17  
d(off)  
t
19.8  
f
DS11742
–
Rev 3  
page 3/18  
 
 
 
 

STD5N60DM2  
Electrical characteristics  
Table 7.
Source-drain diode  
Test conditions  
Symbol  
Parameter  
Min.  
Typ.  
Max.  
3.5  
14  
Unit  
A
I
Source-drain current  
–
–
–
–
–
–
–
–
–
SD  
I
Source-drain current (pulsed)  
Forward on voltage  
A
SDM  
V
V
= 0
V
, I
 
=
3
.5 A  
SD  
1.6  
70  
V
GS  
SD  
t
rr  
Reverse recovery time  
Reverse recovery charge  
Reverse recovery current  
Reverse recovery time  
Reverse recovery charge  
Reverse recovery current  
58  
109  
4
ns  
nC  
A
I
= 3.5 A, di/dt = 100 A/µs,  
SD  
V
DD  
Q
rr  
I
RRM  
t
109  
309  
5
ns  
nC  
A
rr  
I
= 3.5 A, di/dt = 100 A/µs,  
SD  
V
DD  
= 60
V
, T
 
=
1
50 °C (see

j
Q
rr  
I
RRM  
1. Pulse
 
width is limited by safe operating area.  
2. Pulse
 
test: pulse duration = 300 µs, duty cycle 1.5%.  
DS11742
–
Rev 3  
page 4/18  
 
 

STD5N60DM2  
Electrical characteristics (curves)  
2.1  
Electrical characteristics (curves)  
Figure 2.
Thermal impedance  
Figure 1.
Safe operating area  
GIPG270620160921SOA  
I

D  

(A)  
in this area is  
Operation  
limited by R

DS(on)  

10

1  

t

p

=10 µs  
t

p

=100 µs  
10

0  

T

j

≤
150 °C  
T

c

= 25°C  
single pulse  
t

p

=1 ms  
t

p

=10 ms  
V

DS

(V)  
10

-1  

10

-1  

10

0  

10

1  

10

2  

10

3  

Figure 3.
Output characteristics  
Figure 4.
Transfer characteristics  
GIPG270620160824OCH  
GIPG270620160918TCH  
I

D  

I

D  

(A)  
(A)  
V

GS

=8, 9, 10 V  
6
6
V

DS

= 20 V  
V

GS

=7 V  
5
4
3
2
5
4
3
2
V

GS

=6 V  
1
0
1
0
V

GS

=5 V  
16  
0
4
8
12  
V

DS

(V)  
0
2
4
6
8
V

GS

(V)  
DS11742
–
Rev 3  
page 5/18  
 

STD5N60DM2  
Electrical characteristics (curves)  
Figure 5.
Gate charge vs gate-source voltage  
Figure 6.
Static drain-source on-resistance  
GADG010620181431QVG  
V

GS  

(V)  
V

DS  

(V)  
GIPG270620160822RID  
R

DS(on)  

(Ω)  
V

DD

= 480 V  
I

D

= 3.5 A  
V

DS  

1.5  
1.46  
1.42  
1.38  
1.34  
20  
16  
12  
8
500  
400  
300  
200  
100  
V

GS

=10 V  
Q

g  

Q

gd  

Q

gs  

4
0
1.3  
0
1.26  
0
2
4
6
8
Q

g

(nC)  
0.5 1.0 1.5 2.0 2.5 3.0 3.5 I

D

(A)  
Figure 7.
Capacitance variations  
Figure 8.
Output capacitance stored energy  
GADG010620181432CVR  
C
(pF)  
GIPG270620160920EOS  
E

OSS  

(µJ)  
1.6  
1.2  
0.8  
10

3  

10

2  

C

ISS  

f = 1 MHz  
10

1  

10

0  

C

OSS  

C

RSS  

0.4  
0
10

-1  

10

0  

10

1  

10

2  

V

DS

(V)  
0
100 200 300 400 500 600
 
V

DS

(V)  
Figure 9.
Normalized gate threshold voltage vs  
temperature  
Figure 10.
Normalized on-resistance vs temperature  
GIPG270620160822RON  
R

DS(on)  

(norm.)  
GIPG270620160821VTH  
V

GS(th)  

(norm.)  
2.2  
1.1  
V

GS

= 10 V  
I

D

= 250 µA  
1.8  
1.4  
1.0  
1.0  
0.9  
0.8  
0.6  
0.2  
0.7  
0.6  
-75  
-25  
25  
75  
125  
T

j

(°C)  
-75  
-25  
25  
75  
125  
T

j

(°C)  
DS11742
–
Rev 3  
page 6/18  
 
 

STD5N60DM2  
Electrical characteristics (curves)  
Figure 12.
Normalized V

(BR)DSS

vs temperature  
Figure 11.
Source-drain diode forward characteristics  
GIPG270620160823SDF  
GIPG270620160822BDV  
V

SD  

(V)  
V

(BR)DSS  

(norm.)  
T

j

= -50 °C  
1.0  
1.08  
I

D

= 1 mA  
0.9  
1.04  
1.00  
0.96  
T

j

= 25 °C  
0.8  
0.7  
T

j

= 150 °C  
0.6  
0.92  
0.88  
0.5  
0.5 1.0 1.5 2.0 2.5 3.0 3.5 I

SD

(A)  
-75  
-25  
25  
75  
125  
T

j

(°C)  
DS11742
–
Rev 3  
page 7/18  

STD5N60DM2  
Test circuits  
3
Test circuits  
Figure 13.
Test circuit for resistive load switching times  
Figure 14.
Test circuit for gate charge behavior  
V

DD  

12 V  
47 kΩ  
1 kΩ  
100 nF  
R

L  

2200  
μF  
3.3  
μF  
V

DD  

+
I

G

= CONST  
2.7 kΩ  
V

D  

R

G  

D.U.
T
.  
100 Ω  
V

GS  

pulse width  
+
D.U.
T
.  
V

GS  

V

G  

2200  
μF  
pulse width  
47 kΩ  
1 kΩ  
AM01469v1  
AM01468v1  
Figure 15.
Test circuit for inductive load switching and  
diode recovery times  
Figure 16.
Unclamped inductive load test circuit  
L
A
A
A
D
S
V

D  

100 µH  
D
fast  
G
D.U.
T
.  
B
diode  
2200  
3.3  
µF  
+
V

DD  

1000  
µF  
B
µF  
3.3  
µF  
B
+
V

DD  

I

D  

25 Ω  
G
D.U.
T
.  
R

G  

S
+
_
D.U.
T
.  
V

i  

pulse width  
AM01471v1  
AM01470v1  
Figure 18.
Switching time waveform  
Figure 17.
Unclamped inductive waveform  
V
(BR)DSS  
t

on  

t

d(on)  

t

off  

t

d(off)  

V
D  
t

r  

t

f  

90%  
90%  
10%  
I
DM  
V

DS  

10%  
V

GS  

0
0
I
D  
90%  
V
DD  
V
DD  
10%  
AM01472v1  
AM01473v1  
DS11742
–
Rev 3  
page 8/18  
 
 
 
 

STD5N60DM2  
Package information  
4
Package information  
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK

®  

packages, depending on their level of environmental compliance. ECOPACK

®

specifications, grade definitions  
and product status are available at:

. ECOPACK

®

is an ST trademark.  
DS11742
–
Rev 3  
page 9/18  
 
 

STD5N60DM2  
DPAK (TO-252) type A package information  
4.1  
DPAK (TO-252) type A package information  
Figure 19.
DPAK (TO-252) type A package outline  
0068772_A_25  
DS11742
–
Rev 3  
page 10/18  

STD5N60DM2  
DPAK (TO-252) type A package information  
Table 8.
DPAK (TO-252) type A mechanical data  
mm  
Dim.  
Min.  
2.20  
0.90  
0.03  
0.64  
5.20  
0.45  
0.48  
6.00  
4.95  
6.40  
4.60  
2.159  
4.445  
9.35  
1.00  
2.60  
0.65  
0.60  
Typ.  
Max.  
2.40  
1.10  
0.23  
0.90  
5.40  
0.60  
0.60  
6.20  
5.25  
6.60  
4.80  
2.413  
4.699  
10.10  
1.50  
3.00  
0.95  
1.00  
A
A1  
A2  
b
b4  
c
c2  
D
D1  
E
5.10  
E1  
e
4.70  
2.286  
4.572  
e1  
H
L
(L1)  
L2  
L4  
R
2.80  
0.80  
0.20  
V2  
0°  
8°  
DS11742
–
Rev 3  
page 11/18  
 

STD5N60DM2  
DPAK (TO-252) type E package information  
4.2  
DPAK (TO-252) type E package information  
Figure 20.
DPAK (TO-252) type E package outline  
0068772_type-E_rev.25  
DS11742
–
Rev 3  
page 12/18  

STD5N60DM2  
DPAK (TO-252) type E package information  
Table 9.
DPAK (TO-252) type E mechanical data  
mm  
Typ.  
Dim.  
Min.  
Max.  
2.39  
0.13  
0.884  
5.46  
0.61  
0.60  
6.22  
A
A2  
b
2.18  
0.65  
4.95  
0.46  
0.46  
5.97  
5.21  
6.35  
4.32  
b4  
c
c2  
D
D1  
E
6.73  
E1  
e
2.286  
4.572  
e1  
H
9.94  
1.50  
10.34  
1.78  
L
L1  
L2  
L4  
2.74  
0.89  
1.27  
1.02  
Figure 21.
DPAK (TO-252) type E recommended footprint (dimensions are in mm)  
FP_0068772_25  
DS11742
–
Rev 3  
page 13/18  
 

STD5N60DM2  
DPAK (TO-252) packing information  
4.3  
DPAK (TO-252) packing information  
Figure 22.
DPAK (TO-252) tape outline  
10 pitches cumulative  
tolerance on tape +/- 0.2 mm  
P0  
Top cover  
tape  
P2  
D
T
E
F
W
K0  
B1  
B0  
For machine ref. only  
including draft and  
A0  
D1  
P1  
radii concentric around B0  
U
s
er direction o
f
f
e
ed  
R
Bending radius  
U
s
er direction o
f
f
e
ed  
AM08852v1  
DS11742
–
Rev 3  
page 14/18  

STD5N60DM2  
DPAK (TO-252) packing information  
Figure 23.
DPAK (TO-252) reel outline  
T
40mm min.  
access hole  
at slot location  
B
D
C
N
A
G measured  
at hub  
Tape slot  
in core for  
tape start  
Full radius  
2.5mm min.width  
AM06038v1  
Table 10.
DPAK (TO-252) tape and reel mechanical data  
Tape  
Reel  
mm  
mm  
Dim.  
Dim.  
Min.  
6.8  
Max.  
7
Min.  
Max.  
A0  
B0  
B1  
D
A
B
C
D
G
N
T
330  
10.4  
10.6  
12.1  
1.6  
1.5  
12.8  
20.2  
16.4  
50  
13.2  
18.4  
22.4  
1.5  
1.5  
D1  
E
1.65  
7.4  
1.85  
7.6  
F
K0  
P0  
P1  
P2  
R
2.55  
3.9  
2.75  
4.1  
Base qty.  
Bulk qty.  
2500  
2500  
7.9  
8.1  
1.9  
2.1  
40  
T
0.25  
15.7  
0.35  
16.3  
W
DS11742
–
Rev 3  
page 15/18  

STD5N60DM2  
Revision history  
Table 11.
Document revision history  
Date  
Revision Changes  
05-Jul-2016  
1
First release.  
Updated
Section 1: “Electrical ratings”.  
17-May-2017  
01-Jun-2018  
2
Added
Section 4.2: “DPAK (TO-252) type C package information”.  
Minor text changes.  
3
DS11742
–
Rev 3  
page 16/18  
 

STD5N60DM2  
Contents  
Contents  

Electrical ratings

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
.

Electrical characteristics

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
.

Electrical characteristics (curves)

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Test circuits

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
.

Package information

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
.

DPAK (TO-252) type A package information

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

DPAK (TO-252) type E package information

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

DPAK (TO-252) packing information

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
.

Revision history

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

DS11742
–
Rev 3  
page 17/18  

STD5N60DM2  
IMPORTANT NOTICE – PLEASE READ CAREFULLY  
STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST  
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Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of  
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Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product.  
ST and the ST logo are trademarks of S
T
.
A
ll other product or service names are the property of their respective owners.  
Information in this document supersedes and replaces information previously supplied in any prior versions of this document.  
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DS11742
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