STMicroelectronics-STD65N55F3
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STD65N55F3
Datasheet
Automotive-grade N-channel 55 V, 6.5 mΩ typ., 80 A STripFET F3
Power MOSFET in a DPAK package
Features
V
R
DS(on)
max.
I
D
P
TOT
Type
DS
TAB
STD65N55F3
55 V
8.5 mΩ
80 A
110 W
3
2
1
DPAK
•
•
AEC-Q101 qualified
100% avalanche tested
D(2, TAB)
Applications
•
Switching applications
G(1)
Description
This device is an N-channel Power MOSFET developed using STripFET™ F3
technology. It is designed to minimize on-resistance and gate charge to provide
superior switching performance.
S(3)
AM01475v1_noZen
Product status
Product summary
Order code
Marking
STD65N55F3
65N55F3
DPAK
Package
Packing
T
a
pe and reel
DS5128
–
Rev 5
–
January 2019
For further information contact your local STMicroelectronics sales office.
STD65N55F3
Electrical ratings
1
Electrical ratings
Table 1.
Absolute maximum ratings
Parameter
Symbol
Value
Unit
V
V
Drain-source voltage
Gate-source voltage
55
±20
80
DS
GS
V
V
Drain current (continuous) at T
= 25 °C
A
C
I
D
Drain current (continuous) at T
= 100 °C
56
A
C
I
Drain current (pulsed)
320
110
11
A
DM
P
T
o
tal power dissipation at T
= 25 °C
W
TOT
C
Peak diode recovery
V/ns
mJ
E
Single pulse avalanche energy
Operating junction temperature range
Storage temperature range
390
AS
T
j
-55 to 175
°C
T
stg
1. Pulse
width is limited by safe operating area.
2. ≤
65A, di/dt ≤ 300 A/μs, V
≤ V
, T
≤ T
jmax
I
SD
DD
(BR)DSS
j
3. Starting
T =
25°C, I
= 32 A, V
= 25 V
j
D
DD
Table 2.
Thermal resistance
Symbol
Parameter
Value
1.36
50
Unit
°C/W
°C/W
R
thj-case
Thermal resistance junction-case
Thermal resistance junction-pcb
R
thj-pcb
1. When
mounted on an 1- inch² FR-4 board, 2oz Cu.
DS5128
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STD65N55F3
Electrical characteristics
2
Electrical characteristics
T
C
= 25 °C unless otherwise specified
Table 3.
Static characteristics
Test conditions
Symbol
Parameter
Min.
Typ.
Max.
Unit
Drain-source breakdown
voltage
V
V
= 0
V
, I
=
2
50 µA
55
V
(BR)DSS
GS
D
V
V
V
V
= 0
V
, V
=
5
5 V
10
100
±200
4
µA
µA
nA
V
GS
GS
GS
DS
DS
Zero gate voltage drain
current
I
I
DSS
DS
C
= ±20
V
, V
= 0 V
Gate-body leakage current
Gate threshold voltage
GSS
DS
V
R
= V
, I
= 250 µA
2
GS(th)
GS
D
Static drain-source on-
resistance
V
= 10
V
, I
=
3
2 A
D
6.5
8.5
mΩ
DS(on)
GS
1. Defined
by design, not subject to production test.
Table 4.
Dynamic characteristics
Test conditions
Symbol
Parameter
Input capacitance
Min.
Typ.
2200
500
25
Max.
Unit
pF
C
iss
–
–
–
–
–
C
oss
V
= 25 V, f = 1 MHz, V
= 0 V
Output capacitance
pF
DS
GS
C
rss
Reverse transfer capacitance
T
o
tal gate charge
pF
Q
V
V
= 27
V
, I
=
6
5 A,
33.5
12.5
45
nC
nC
g
DD
GS
D
= 0 to 10 V
Q
Gate-source charge
gs
Q
gd
Gate-drain charge
–
9.5
nC
Table 5.
Switching times
Test conditions
Symbol
Parameter
Turn-on delay time
Rise time
Min.
Typ.
20
Max.
Unit
ns
t
–
–
–
–
–
–
–
–
V
= 27
V
, I
=
3
2 A,
d(on)
DD
D
R
= 4.7 Ω, V
= 10 V
t
50
ns
G
GS
r
t
Turn-off delay time
Fall time
35
ns
d(off)
t
11.5
ns
f
DS5128
–
Rev 5
page 3/17
STD65N55F3
Electrical characteristics
Table 6.
Source-drain diode
Test conditions
Symbol
Parameter
Min.
Typ.
Max.
80
Unit
A
I
Source-drain current
SD
I
Source-drain current (pulsed)
Forward on voltage
320
1.5
A
SDM
V
I
I
= 65 A, V
= 0 V
–
–
–
V
SD
SD
GS
t
= 65 A, di/dt = 100 A/μs,
= 25
V
, T
=
1
50 °C
Reverse recovery time
Reverse recovery charge
47
87
ns
nC
rr
SD
V
Q
DD
j
rr
I
Reverse recovery current
–
3.7
A
RRM
1. Pulsed:
pulse duration = 300 μs, duty cycle 1.5%
DS5128
–
Rev 5
page 4/17
STD65N55F3
Electrical characteristics (curves)
2.1
Electrical characteristics (curves)
Figure 1.
Safe operating area
Figure 2.
Thermal impedance
Figure 4.
Transfer characteristics
Figure 3.
Output characteristics
DS5128
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Rev 5
page 5/17
STD65N55F3
Electrical characteristics (curves)
Figure 5.
Normalized V
(BR)DSS
vs temperature
Figure 6.
Static drain-source on-resistance
V
(BR)DSS
HV36510
(norm.)
I
D
= 250 μA
1.10
1.05
1.00
0.95
0.90
0.85
T
J
(°C)
-100
-50
0
50
100
150
Figure 8.
Capacitance variations
Figure 7.
Gate charge vs gate-source voltage
V
Figure 9.
Normalized gate threshold voltage vs
temperature
Figure 10.
Normalized on-resistance vs temperature
0
-100
-100
DS5128
–
Rev 5
page 6/17
STD65N55F3
Electrical characteristics (curves)
Figure 11.
Source-drain diode forward characteristics
DS5128
–
Rev 5
page 7/17
STD65N55F3
Test circuits
3
Test circuits
Figure 12.
Test circuit for resistive load switching times
Figure 13.
Test circuit for gate charge behavior
V
DD
12 V
47 kΩ
1 kΩ
100 nF
R
L
2200
μF
3.3
μF
V
DD
+
I
G
= CONST
2.7 kΩ
V
D
R
G
D.U.
T
.
100 Ω
V
GS
pulse width
+
D.U.
T
.
V
GS
V
G
2200
μF
pulse width
47 kΩ
1 kΩ
AM01469v1
AM01468v1
Figure 14.
Test circuit for inductive load switching and
diode recovery times
Figure 15.
Unclamped inductive load test circuit
L
A
A
A
D
S
V
D
100 µH
D
fast
G
D.U.
T
.
B
diode
2200
3.3
µF
+
V
DD
1000
µF
B
µF
3.3
µF
B
+
V
DD
I
D
25 Ω
G
D.U.
T
.
R
G
S
+
_
D.U.
T
.
V
i
pulse width
AM01471v1
AM01470v1
Figure 17.
Switching time waveform
Figure 16.
Unclamped inductive waveform
t
on
t
d(on)
t
off
t
d(off)
V
(BR)DSS
t
r
t
f
V
D
90%
90%
I
DM
V
DS
10%
V
GS
10%
0
0
I
D
V
DD
V
DD
90%
10%
AM01472v1
AM01473v1
DS5128
–
Rev 5
page 8/17
STD65N55F3
Package information
4
Package information
packages, depending on their level of environmental compliance. ECOPACK
®
specifications, grade definitions
DS5128
–
Rev 5
page 9/17
STD65N55F3
DPAK (TO-252) type A2 package information
4.1
DPAK (TO-252) type A2 package information
Figure 18.
DPAK (TO-252) type A2 package outline
0068772_type-A2_rev26
DS5128
–
Rev 5
page 10/17
STD65N55F3
DPAK (TO-252) type A2 package information
Table 7.
DPAK (TO-252) type A2 mechanical data
mm
Dim.
Min.
2.20
0.90
0.03
0.64
5.20
0.45
0.48
6.00
4.95
6.40
5.10
2.159
4.445
9.35
1.00
2.60
0.65
0.60
Typ.
Max.
2.40
1.10
0.23
0.90
5.40
0.60
0.60
6.20
5.25
6.60
5.30
2.413
4.699
10.10
1.50
3.00
0.95
1.00
A
A1
A2
b
b4
c
c2
D
D1
E
5.10
E1
e
5.20
2.286
4.572
e1
H
L
L1
L2
L4
R
2.80
0.80
0.20
V2
0°
8°
DS5128
–
Rev 5
page 11/17
STD65N55F3
DPAK (TO-252) type A2 package information
Figure 19.
DPAK (TO-252) recommended footprint (dimensions are in mm)
FP_0068772_rev26
DS5128
–
Rev 5
page 12/17
STD65N55F3
DPAK (TO-252) packing information
4.2
DPAK (TO-252) packing information
Figure 20.
DPAK (TO-252) tape outline
10 pitches cumulative
tolerance on tape +/- 0.2 mm
P0
Top cover
tape
P2
D
T
E
F
W
K0
B1
B0
For machine ref. only
including draft and
A0
D1
P1
radii concentric around B0
U
s
er direction o
f
f
e
ed
R
Bending radius
U
s
er direction o
f
f
e
ed
AM08852v1
DS5128
–
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page 13/17
STD65N55F3
DPAK (TO-252) packing information
Figure 21.
DPAK (TO-252) reel outline
T
40mm min.
access hole
at slot location
B
D
C
N
A
G measured
at hub
Tape slot
in core for
tape start
Full radius
2.5mm min.width
AM06038v1
Table 8.
DPAK (TO-252) tape and reel mechanical data
Tape
Reel
mm
mm
Dim.
Dim.
Min.
6.8
Max.
7
Min.
Max.
A0
B0
B1
D
A
B
C
D
G
N
T
330
10.4
10.6
12.1
1.6
1.5
12.8
20.2
16.4
50
13.2
18.4
22.4
1.5
1.5
D1
E
1.65
7.4
1.85
7.6
F
K0
P0
P1
P2
R
2.55
3.9
2.75
4.1
Base qty.
Bulk qty.
2500
2500
7.9
8.1
1.9
2.1
40
T
0.25
15.7
0.35
16.3
W
DS5128
–
Rev 5
page 14/17
STD65N55F3
Revision history
Table 9.
Document revision history
Date
Version
Changes
08-Feb-2007
22-Feb-2007
11-May-2007
1
2
3
First release.
Description has been changed
Improved current values
Updated information on cover page.
13-Feb-2018
17-Jan-2019
4
5
Minor text changes.
Minor text changes.
DS5128
–
Rev 5
page 15/17
STD65N55F3
Contents
Contents
Electrical ratings
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
.
2
Electrical characteristics
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
.
3
Electrical characteristics (curves)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5
Test circuits
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
.
8
Package information
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
.
9
DPAK (TO-252) type A2 package information
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
9
DPAK (TO-252) packing information
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
.
12
Revision history
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
15
DS5128
–
Rev 5
page 16/17
STD65N55F3
IMPORTANT NOTICE – PLEASE READ CAREFULLY
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T
.
A
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© 2019 STMicroelectronics – All rights reserved
DS5128
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