STMicroelectronics-STD6N62K3
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STD6N62K3
Datasheet
N-channel 620
V
,
0
.95 Ω typ., 5.5 A MDmesh™ K3
Power MOSFET in DPAK package
Features
Order codes
STD6N62K3
V
R
I
P
TOT
DS
DS(on) max.
D
TAB
620 V
1.2 Ω
5.5 A
90 W
•
•
•
•
•
100% avalanche tested
3
2
Extremely high dv/dt capability
Very low intrinsic capacitance
1
Improved diode reverse recovery characteristics
Zener-protected
DPAK
D(2, TAB)
Applications
•
Switching applications
G(1)
Description
This MDmesh™ K3 Power MOSFET is the result of improvements applied to
STMicroelectronics’ MDmesh™ technology, combined with a new optimized vertical
structure. This device boasts an extremely low on-resistance, superior dynamic
performance and high avalanche capability, rendering it suitable for the most
demanding applications.
S(3)
AM01475V1
Product status
Product summary
Order code
Marking
STD6N62K3
6N62K3
Package
Packing
DPAK
T
a
pe and reel
DS8813
–
Rev 2
–
April 2018
For further information contact your local STMicroelectronics sales office.
STD6N62K3
Electrical ratings
1
Electrical ratings
Table 1.
Absolute maximum ratings
Parameter
Symbol
Value
Unit
V
V
Drain-source voltage
Gate- source voltage
620
± 30
5.5
3
DS
GS
V
V
I
Drain current (continuous) at T
= 25 °C
A
D
D
C
I
Drain current (continuous) at T
= 100 °C
A
C
I
Drain current (pulsed)
22
A
DM
P
T
o
tal dissipation at T
= 25 °C
90
W
A
TOT
C
I
Avalanche current, repetitive or not-repetitive
5.5
AR
E
Single pulse avalanche energy
140
2.5
12
mJ
kV
AS
ESD
Gate-source human body model (R = 1.5 kΩ, C = 100 pF)
Peak diode recovery voltage slope
Storage temperature range
V/ns
T
stg
-55 to 150
°C
T
Operating junction temperature range
j
1. Pulse
width limited by safe operating area.
2. Pulse
width limited by Tj max.
3. Starting
Tj = 25 °C, I
= I
, V
= 50 V.
D
AR
DD
4.
I ≤
5.5 A, di/dt ≤ 400 A/µs, V
= 80% V
SD DD
(BR)DSS.
Table 2.
Thermal data
Symbol
Parameter
Value
1.39
50
Unit
°C/W
°C/W
R
thj-case
Thermal resistance junction-case
Thermal resistance junction-pcb
R
thj-pcb
1. When
mounted on 1inch² FR-4 board, 2 oz Cu.
DS8813
–
Rev 2
page 2/19
STD6N62K3
Electrical characteristics
2
Electrical characteristics
(T
C
= 25 °C unless otherwise specified)
Table 3.
On /off states
Test conditions
Symbol
Parameter
Min.
Typ.
Max.
Unit
V
Drain-source breakdown
voltage
V
I
= 1 mA, V
= 0 V
620
(BR)DSS
D
GS
V
= 0
V
, V
=
6
20 V
0.8
50
µA
GS
GS
DS
Zero gate voltage drain
current
I
I
DSS
V
T
= 0
V
, V
=
6
20 V
DS
µA
C
V
V
= ±20
V
,
= 0 V
GS
DS
Gate body leakage current
Gate threshold voltage
± 9
4.5
1.2
µA
V
GSS
V
R
V
= V
, I
= 50 µA
3
3.75
0.95
GS(th)
DS
GS
GS
D
Static drain-source on
resistance
V
= 10
V
, I
=
2
.8 A
Ω
DS(on)
D
1. Defined
by design, not subject to production test.
Table 4.
Dynamic
Test conditions
Symbol
Parameter
Input capacitance
Min.
Typ.
875
100
17
Max.
Unit
C
iss
V
V
= 50 V, f = 1 MHz,
= 0 V
DS
C
oss
Output capacitance
–
–
pF
GS
C
rss
Reverse transfer capacitance
Equivalent output capacitance
energy related
C
28
63
o(er)
V
V
= 0
V
,
= 0 to 480 V
GS
DS
–
–
–
–
–
–
pF
Ω
Equivalent output capacitance
time related
C
o(tr)
R
Intrinsic gate resistance
T
o
tal gate charge
f = 1 MHz open drain
3.5
34
4
G
Q
V
V
= 496
V
, I
=
5
.5 A,
g
DD
D
= 0 to 10 V
Q
GS
Gate-source charge
Gate-drain charge
nC
gs
Q
22
gd
1.
2.
C
C
is a constant capacitance value that gives the same stored energy as C
while V
is rising from 0 to 80% V
.
DSS
o(er)
oss
DS
is a constant capacitance value that gives the same charging time as C
while V
is rising from 0 to 80% V
.
DSS
o(tr)
oss
DS
Table 5.
Switching times
Symbol
Parameter
Turn-on delay time
Rise time
Test conditions
Min.
Typ.
22
Max.
Unit
t
V
= 310
V
, I
=
2
.75 A,
d(on)
DD
D
R
= 4.7 Ω, V
= 10 V
t
r
12
G
GS
–
–
ns
t
Turn-off delay time
Fall time
49
d(off)
t
20
f
DS8813
–
Rev 2
page 3/19
STD6N62K3
Electrical characteristics
Table 6.
Source drain diode
Test conditions
Symbol
Parameter
Min.
Typ.
Max.
5.5
27
Unit
I
Source-drain current
SD
–
–
A
I
Source-drain current (pulsed)
Forward on voltage
SDM
V
I
I
= 5.5 A, V
= 0 V
1.5
V
SD
GS
SD
t
rr
= 5.5 A, di/dt = 100 A/µs
Reverse recovery time
Reverse recovery charge
290
1.9
ns
μC
SD
V
Q
DD
rr
–
–
I
Reverse recovery current
13.5
A
RRM
t
I
= 5.5 A, di/dt = 100 A/µs
= 60
V
, T
=
1
50 °C
Reverse recovery time
335
2.4
ns
rr
SD
V
Q
DD
j
Reverse recovery charge
μC
rr
I
Reverse recovery current
14.5
A
RRM
1. Pulse
width limited by safe operating area.
2. Pulsed:
pulse duration = 300 µs, duty cycle 1.5%.
Table 7.
Gate-source Zener diode
Symbol
Parameter
Test conditions
Min.
Typ.
Max.
Unit
Gate-source breakdown
voltage
V
I
D
= 0 A, I
= ±1 mA
±30
–
V
(BR)GSO
GS
The built-in back-to-back Zener diodes are specifically designed to enhance the ESD performance of the device.
The Zener voltage facilitates efficient and cost-effective device integrity protection, thus eliminating the need for
additional external componentry.
DS8813
–
Rev 2
page 4/19
STD6N62K3
Electrical characteristics curves
2.1
Electrical characteristics curves
Figure 1.
Safe operating area
Figure 2.
Thermal impedance
AM09052v1
GC20460
I
D
(A)
K
Tj=150°C
Tc=25°C
Single pulse
10
1
10
0
10µs
100µs
10
0
10
-1
10
-2
1ms
10ms
10
-1
10
-5
10
-4
10
-3
10
-2
10
-1
t
p
(s)
10
1
V
D
S
(V)
10
-1
10
0
10
2
Figure 3.
Output characteristics
Figure 4.
Transfer characteristics
AM09054v1
AM09055v1
I
D
I
D
(A)
(A)
V
D
S
=15V
8
7
6
5
4
3
2
12
V
G
S
=10V
10
8
6V
6
4
2
1
0
5V
0
2
20
V
D
S
(V)
8
10
V
G
S
(V)
0
10
0
4
6
Figure 5.
Gate charge vs gate-source voltage
Figure 6.
Static drain-source on resistance
AM09057v1
AM09056v1
V
GS
R
DS(on)
V
D
S
(
V)
500
(V)
(
W
)
V
G
S
=10V
V
D
D
=496V
I
D
=5.5A
12
1.15
V
DS
1.10
10
8
400
300
200
1.05
1.00
0.95
6
4
2
0
100
0
0.90
0.85
2
3
5
6
1
4
10
20
30
Q
g
(nC)
I
D
(A)
0
0
DS8813
–
Rev 2
page 5/19
STD6N62K3
Electrical characteristics curves
Figure 7.
Capacitance variations
Figure 8.
Output capacitance stored energy
AM09058v1
AM09059v1
C
E
oss
(pF)
(µJ)
5
1000
100
Ciss
4
3
2
Coss
Crss
10
1
1
0
0.1
100
200
400 500
1
10
V
D
S
(V)
0
100
300
V
D
S
(V)
Figure 9.
Normalized gate threshold voltage vs
temperature
Figure 10.
Normalized on resistance vs temperature
AM09062v1
R
DS(on)
(norm)
AM09061v1
V
GS(th)
(norm)
I
D
=2.8A
V
GS
=10V
I
D
=50µA
2.5
1.10
1.00
2.0
1.5
1.0
0.90
0.5
0.0
0.80
0.70
-75
-25
25
75
T
J
(°C)
125
-75
-25
25
75
T
J
(°C)
125
Figure 11.
Normalized B
VDSS
vs temperature
Figure 12.
Source-drain diode forward characteristics
AM09063v1
AM09060v1
V
SD
(V)
B
V
DSS
(norm)
I
D
=1mA
1.10
T
J
=-50°C
1.0
0.8
T
J
=25°C
1.05
1.00
0.6
T
J
=150°C
0.4
0.95
0.90
0.2
0
0
6
1
2
3
4
5
I
S
D
(A)
-75
-25
25
75
T
J
(°C)
125
DS8813
–
Rev 2
page 6/19
STD6N62K3
Electrical characteristics curves
Figure 13.
Maximum avalanche energy vs temperature
AM09064v1
E
AS
(mJ)
160
I
D
=5.5 A
140
V
D
D
=50 V
120
100
80
60
40
20
0
0
120
140
T
J
(°C)
20
40
60 80 100
DS8813
–
Rev 2
page 7/19
STD6N62K3
Test circuits
3
Test circuits
Figure 14.
Test circuit for resistive load switching times
Figure 15.
Test circuit for gate charge behavior
V
DD
12 V
47 kΩ
1 kΩ
100 nF
R
L
2200
μF
3.3
μF
V
DD
+
I
G
= CONST
2.7 kΩ
V
D
R
G
D.U.
T
.
100 Ω
V
GS
pulse width
+
D.U.
T
.
V
GS
V
G
2200
μF
pulse width
47 kΩ
1 kΩ
AM01469v1
AM01468v1
Figure 16.
Test circuit for inductive load switching and
diode recovery times
Figure 17.
Unclamped inductive load test circuit
L
A
A
A
V
D
D
S
100 µH
D
fast
diode
2200
3.3
G
D.U.
T
.
B
µF
V
DD
+
µF
1000
µF
B
3.3
µF
I
D
B
+
V
DD
25 Ω
G
D.U.
T
.
D.U.
T
.
R
G
S
V
i
+
_
pulse width
AM01471v1
AM01470v1
Figure 18.
Unclamped inductive waveform
Figure 19.
Switching time waveform
V
(BR)DSS
t
on
t
d(on)
t
off
t
d(off)
V
D
t
r
t
f
90%
90%
10%
I
DM
I
D
V
DS
10%
V
GS
0
0
V
DD
V
DD
90%
10%
AM01472v1
AM01473v1
DS8813
–
Rev 2
page 8/19
STD6N62K3
Package information
4
Package information
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK
®
packages, depending on their level of environmental compliance. ECOPACK
®
specifications, grade definitions
DS8813
–
Rev 2
page 9/19
STD6N62K3
DPAK (TO-252) type A2 package information
4.1
DPAK (TO-252) type A2 package information
Figure 20.
DPAK (TO-252) type A2 package outline
0068772_type-A2_rev24
DS8813
–
Rev 2
page 10/19
STD6N62K3
DPAK (TO-252) type A2 package information
Table 8.
DPAK (TO-252) type A2 mechanical data
mm
Typ.
Dim.
Min.
2.20
0.90
0.03
0.64
5.20
0.45
0.48
6.00
4.95
6.40
5.10
2.16
4.40
9.35
1.00
2.60
0.65
0.60
Max.
2.40
1.10
0.23
0.90
5.40
0.60
0.60
6.20
5.25
6.60
5.30
2.40
4.60
10.10
1.50
3.00
0.95
1.00
A
A1
A2
b
b4
c
c2
D
D1
E
5.10
E1
e
5.20
2.28
e1
H
L
L1
L2
L4
R
2.80
0.80
0.20
V2
0°
8°
DS8813
–
Rev 2
page 11/19
STD6N62K3
DPAK (TO-252) type C2 package information
4.2
DPAK (TO-252) type C2 package information
Figure 21.
DPAK (TO-252) type C2 package outline
0068772_C2_24
DS8813
–
Rev 2
page 12/19
STD6N62K3
DPAK (TO-252) type C2 package information
Table 9.
DPAK (TO-252) type C2 mechanical data
mm
Typ.
2.30
1.01
Dim.
Min.
2.20
0.90
0.00
0.72
5.13
0.47
0.47
6.00
5.10
6.50
5.20
2.186
9.80
1.40
Max.
2.38
1.10
0.10
0.85
5.46
0.60
0.60
6.20
5.60
6.70
5.50
2.386
10.40
1.70
A
A1
A2
b
b4
c
5.33
c2
D
6.10
6.60
D1
E
E1
e
2.286
10.10
H
L
1.50
L1
L2
L3
L4
L6
θ1
θ2
V2
2.90 REF
0.90
0.60
1.25
1.00
0.51 BSC
0.80
1.80 BSC
7°
5°
5°
0°
9°
9°
8°
7°
DS8813
–
Rev 2
page 13/19
STD6N62K3
DPAK (TO-252) type C2 package information
Figure 22.
DPAK (TO-252) recommended footprint (dimensions are in mm)
FP_0068772_24
DS8813
–
Rev 2
page 14/19
STD6N62K3
DPAK (TO-252) packing information
4.3
DPAK (TO-252) packing information
Figure 23.
DPAK (TO-252) tape outline
10 pitches cumulative
tolerance on tape +/- 0.2 mm
P0
Top cover
tape
P2
D
T
E
F
W
K0
B1
B0
For machine ref. only
including draft and
A0
D1
P1
radii concentric around B0
U
s
er direction o
f
f
e
ed
R
Bending radius
U
s
er direction o
f
f
e
ed
AM08852v1
DS8813
–
Rev 2
page 15/19
STD6N62K3
DPAK (TO-252) packing information
Figure 24.
DPAK (TO-252) reel outline
T
40mm min.
access hole
at slot location
B
D
C
N
A
G measured
at hub
Tape slot
in core for
tape start
Full radius
2.5mm min.width
AM06038v1
Table 10.
DPAK (TO-252) tape and reel mechanical data
Tape
Reel
mm
mm
Dim.
Dim.
Min.
6.8
Max.
7
Min.
Max.
A0
B0
B1
D
A
B
C
D
G
N
T
330
10.4
10.6
12.1
1.6
1.5
12.8
20.2
16.4
50
13.2
18.4
22.4
1.5
1.5
D1
E
1.65
7.4
1.85
7.6
F
K0
P0
P1
P2
R
2.55
3.9
2.75
4.1
Base qty.
Bulk qty.
2500
2500
7.9
8.1
1.9
2.1
40
T
0.25
15.7
0.35
16.3
W
DS8813
–
Rev 2
page 16/19
STD6N62K3
Revision history
Table 11.
Document revision history
Date
Revision Changes
21-Dec-2011
1
First release.
The part number STB6N62K3 has been moved to a separate datasheet.
Removed maturity status indication from cover page. The document status is production data.
Updated title and features in cover page.
10-Apr-2018
2
Minor text changes.
DS8813
–
Rev 2
page 17/19
STD6N62K3
Contents
Contents
Electrical ratings
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
.
2
Electrical characteristics
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
.
3
Electrical characteristics curves
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5
Test circuits
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
.
8
Package information
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
.
9
DPAK (TO-252) type A2 package information
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
9
DPAK (TO-252) type C2 package information
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
11
DPAK (TO-252) packing information
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
.
14
Revision history
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
17
DS8813
–
Rev 2
page 18/19
STD6N62K3
IMPORTANT NOTICE – PLEASE READ CAREFULLY
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ST and the ST logo are trademarks of S
T
.
A
ll other product or service names are the property of their respective owners.
Information in this document supersedes and replaces information previously supplied in any prior versions of this document.
© 2018 STMicroelectronics – All rights reserved
DS8813
–
Rev 2
page 19/19
