STMicroelectronics-STD80N3LL

Part #STMicroelectronics-STD80N3LL
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STMicroelectronics-STD80N3LL
STD80N3LL  
N-
channel 30 V, 4 mΩ typ., 80 A  
Power MOSFET in a DPAK package  
Datasheet – production data  
Features  
Order code  
V

DS  

R

DS(on)

max.  
I

D  

P

TOT  

STD80N3LL  
30 V  
5.2 mΩ  
80 A  
75 W  
Very low on-resistance  
Very low gate charge  
High avalanche ruggedness  
Low gate drive power loss  
Figure 1: Internal schematic diagram  
Applications  
Switching applications  
D(2, TAB)  
Description  
This device is an N-channel Power MOSFET with  
very low R

DS(on)

in all packages.  
G(1)  
S(3)  
AM01475v1
_
T
a
b  
Table 1: Device summary  
Order code  
Marking  
80N3LL  
Package  
Packaging  
STD80N3LL  
DPAK  
Tape and reel  
December 2016  
DocID029591 Rev 2  
1/15  
This is information on a product in full production.  

STD80N3LL  
Electrical ratings  
1
Electrical ratings  
Table 2: Absolute maximum ratings  
Symbol  
Parameter  
Value  
30  
Unit  
V
V

DS  

V

GS  

Drain-source voltage  
Gate-source voltage  
±20  
80  
V
Drain current (continuous) at T

C

= 25 °C  
Drain current (continuous) at T

C

= 100 °C  
Drain current (pulsed)  
A
60  
A
T

j  

320  
75  
A
Total dissipation at T

C

= 25 °C  
Operating junction temperature range  
Storage temperature range  
W
-55 to 175  
°C  
T

stg  

Notes:  

(1)

This value is limited by package  

(2)

Pulse width limited by safe operating area  
Table 3: Thermal data  
Parameter  
Symbol  
Value  
50  
Unit  
R

thj-p

Thermal resistance junction-pcb max.  
Thermal resistance junction-case max.  
°C/W  
°C/W  
R

thj-case  

2
Notes:  

(1)

When mounted on FR-4 board of 1 inch², 2oz Cu  
DocID029591 Rev 2  
3/15  
 
 
 

Electrical characteristics  
STD80N3LL  
2
Electrical characteristics  
(T

C

= 25 °C unless otherwise specified)  
Table 4: On/off states  
Symbol  
Parameter  
Test conditions  
Min. Typ. Max. Unit  
V

(BR)DSS

Drain-source breakdown voltage  
I

D

= 1 mA, V

GS

= 0 V  
30  
V
Zero gate voltage  
V

GS

= 0 V  
I

DSS  

1
µA  
drain current  
V

DS

= 30 V  
Gate-body leakage  
I

GSS  

V

GS

= 20 V, V

DS

= 0 V  
100  
nA  
current  
V

GS(th)  

R

DS(on)  

Gate threshold voltage  
V

DS

= V

GS

, I

D

= 250 μA  
V

GS

= 10 V, I

D

= 40 A  
V

GS

= 4.5 V, I

D

= 40 A  
1
2.5  
5.2  
6.5  
V
4
mΩ  
mΩ  
Static drain-source  
on-resistance  
5.5  
Table 5: Dynamic  
Symbol  
C

iss  

Parameter  
Input capacitance  
Test conditions  
Min. Typ. Max. Unit  
–
–
–
–
–
1640  
207  
160  
18  
–
–
–
–
–
V

DS

= 25 V, f = 1 MHz,  
V

GS

= 0 V  
C

oss  

C

rss  

Output capacitance  
Reverse transfer capacitance  
Total gate charge  
pF  
nC  
Q

g  

V

DD

= 15 V, I

D

= 80 A,  
V

GS

= 4.5 V (see

Q

gs  

Gate-source charge  
5.3  
Q

gd  

Gate-drain charge  
–
8.8  
–
Table 6: Switching times  
Symbol  
Parameter  
Turn-on delay time  
Test conditions  
Min. Typ. Max. Unit  
6.4  
8
t

d(on)  

t

r  

t

d(off)  

t

f  

–
–
–
–
–
–
–
–
ns  
ns  
ns  
ns  
V

DD

= 15 V, I

D

= 40 A,  
R

G

= 4.7 Ω, V

GS

= 10 V  
Rise time  
36  
12  
Turn-off delay time  
Fall time  
Table 7: Source-drain diode  
Test conditions  
Symbol  
Parameter  
Forward on voltage  
Min. Typ. Max. Unit  
I

SD

= 80 A, V

GS

= 0 V  
–
–
–
1.2  
V
t

rr  

Reverse recovery time  
Reverse recovery charge  
I

D

= 80 A, di/dt = 100 A/µs  
21  
14  
ns  
nC  
V

DD

= 24 V (see

Q

rr  

I

RRM  

Reverse recovery current  
–
1.3  
A
Notes:  

(1)

Pulsed: pulse duration = 300 µs, duty cycle 1.5%  
4/15  
DocID029591 Rev 2  
 
 

STD80N3LL  
Electrical characteristics  
2.1  
Electrical characteristics (curves)  
Figure 2: Safe operating area  
Figure 3: Thermal impedance  
Figure 4: Output characteristics  
Figure 5: Transfer characteristics  
Figure 6: Gate charge vs gate-source voltage  
Figure 7: Static drain-source on-resistance  
DocID029591 Rev 2  
5/15  
 

Electrical characteristics  
Figure 8: Capacitance variations  
STD80N3LL  
Figure 9: Normalized gate threshold voltage vs  
temperature  
Figure 10: Normalized on-resistance vs temperature  
Figure 11: Normalized V(BR)DSS vs temperature  
Figure 12: Source-drain diode forward characteristics  
6/15  
DocID029591 Rev 2  

STD80N3LL  
Test circuits  
3
Test circuits  
Figure 13: Test circuit for resistive load  
switching times  
Figure 14: Test circuit for gate charge  
behavior  
Figure 15: Test circuit for inductive load  
switching and diode recovery times  
Figure 16: Unclamped inductive load test  
circuit  
Figure 17: Unclamped inductive waveform  
Figure 18: Switching time waveform  
DocID029591 Rev 2  
7/15  

Package information  
STD80N3LL  
4
Package information  
In order to meet environmental requirements, ST offers these devices in different grades of  
ECOPACK

®

packages, depending on their level of environmental compliance. ECOPACK

®  

specifications, grade definitions and product status are available at:

.  
ECOPACK

®

is an ST trademark.  
8/15  
DocID029591 Rev 2  

STD80N3LL  
Package information  
4.1  
DPAK package information  
Figure 19: DPAK (TO-252) type A2 package outline  
0068772_type-A2_rev21  
DocID029591 Rev 2  
9/15  

Package information  
STD80N3LL  
Table 8: DPAK (TO-252) type A2 mechanical data  
mm  
Dim.  
Min.  
2.20  
0.90  
0.03  
0.64  
5.20  
0.45  
0.48  
6.00  
4.95  
6.40  
5.10  
2.16  
4.40  
9.35  
1.00  
2.60  
0.65  
0.60  
Typ.  
Max.  
A
A1  
A2  
b
2.40  
1.10  
0.23  
0.90  
5.40  
0.60  
0.60  
6.20  
5.25  
6.60  
5.30  
2.40  
4.60  
10.10  
1.50  
3.00  
0.95  
1.00  
b4  
c
c2  
D
D1  
E
5.10  
E1  
e
5.20  
2.28  
e1  
H
L
L1  
L2  
L4  
R
2.80  
0.80  
0.20  
V2  
0°  
8°  
10/15  
DocID029591 Rev 2  

STD80N3LL  
Package information  
Figure 20: DPAK (TO-252) type A2 recommended footprint (dimensions are in mm)  
DocID029591 Rev 2  
11/15  

Package information  
STD80N3LL  
4.2  
DPAK (TO-252) packing information  
Figure 21: DPAK (TO-252) tape outline  
12/15  
DocID029591 Rev 2  

STD80N3LL  
Package information  
Figure 22: DPAK (TO-252) reel outline  
Table 9: DPAK (TO-252) tape and reel mechanical data  
Tape  
Reel  
mm  
mm  
Dim.  
Dim.  
Min.  
6.8  
Max.  
7
Min.  
Max.  
A0  
B0  
B1  
D
A
B
C
D
G
N
T
330  
10.4  
10.6  
12.1  
1.6  
1.5  
12.8  
20.2  
16.4  
50  
13.2  
18.4  
22.4  
1.5  
1.5  
D1  
E
1.65  
7.4  
1.85  
7.6  
F
K0  
P0  
P1  
P2  
R
2.55  
3.9  
2.75  
4.1  
Base qty.  
Bulk qty.  
2500  
2500  
7.9  
8.1  
1.9  
2.1  
40  
T
0.25  
15.7  
0.35  
16.3  
W
DocID029591 Rev 2  
13/15  

Revision history  
STD80N3LL  
5
Revision history  
Table 10: Document revision history  
Changes  
Date  
Revision  
26-Jul-2016  
1
First release.  
Document status promoted from preliminary to production data.  
06-Dec-2016  
2
Minor text changes.  
14/15  
DocID029591 Rev 2  

STD80N3LL  
IMPORTANT NOTICE
–
PLEASE READ CAREFULLY  
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, and  
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der  
acknowledgement.  
Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the  
design of Purchasers’ products.  
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Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product.  
ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners.  
Information in this document supersedes and replaces information previously supplied in any prior versions of this document.  
© 2016 STMicroelectronics
–
All rights reserved  
DocID029591 Rev 2  
15/15