STMicroelectronics-STDLED625H
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STDLED625H
N-channel 620
V
,
1
.7
Ω
, 4.5 A Power MOSFET
in a DPAK package
Datasheet
−
preliminary data
Features
R
DS(on)
max
Order code
V
DS
I
D
P
TOT
TAB
STDLED625H
620 V
2
Ω
4.5 A
70 W
•
100% avalanche tested
3
1
•
Extremely high dv/dt capability
•
Gate charge minimized
DPAK
•
Very low intrinsi
apacitance
•
Improved diode reverse recovery
characteristics
•
Zener-protected
Figure 1. Internal schematic diagram
Applications
D(2,TAB)
•
LED lighting applications
Description
G(1)
These Power MOSFE
T
s
b
oast extremely low on-
resistance and very good dv/dt capability,
rendering them suitable for buck-boost and
flyback topologies.
S(3)
AM01476v1
Table 1. Device summary
Order code
Marking
LED625H
Package
Packaging
STDLED625H
DPAK
T
a
pe and reel
March 2013
DocID024435 Rev 1
1/17
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to
change without notice.
17
Contents
STDLED625H
Contents
Electrical ratings
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Electrical characteristics
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Revision history
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
2/17
DocID024435 Rev 1
STDLED625H
Electrical ratings
1
Electrical ratings
Table 2. Absolute maximum ratings
Parameter Value
Drain-source voltage
Symbol
Unit
V
DS
V
GS
I
D
620
± 30
4.5
V
V
Gate- source voltage
Drain current (continuous) at T
C
= 25 °C
Drain current (continuous) at T
C
= 100 °C
Drain current (pulsed)
A
I
D
2.3
A
(1)
I
DM
18.0
70
A
P
TOT
I
AR
T
o
tal dissipation at T
C
= 25 °C
W
Avalanche current, repetitive or not-
repetitive (pulse width limited by T
j
max)
3.8
A
Single pulse avalanche energy
E
AS
115
mJ
(starting T
j
= 25°C, I
D
= I
AR
, V
DD
= 50V)
Gate source ESD(HBM-C = 100 p
F
,
V
ESD(G-S)
2500
12
V
R = 1.5 k
Ω)
dv/dt
(2)
Peak diode recovery voltage slope
V/ns
Insulation withstand voltage (RMS)
om
all three leads to external hea
k
(t = 1 s; T
= 25 °C)
V
ISO
V
C
T
stg
T
j
Storage temperature
– 55 to 150
150
°C
°C
Max. operating junction temperature
1. Pulse
width limited by safe operating area.
2.
≤
3.8 A
di/dt = 400 A/µs, V
= 80% V
I
, V
peak
≤
V
DS (BR)DSS.
SD
DD
(BR)DSS
Table 3. Thermal data
Parameter
Symbol
Value
Unit
R
thj-case
Thermal resistance junction-case max
1.79
50
°C/W
°C/W
(1)
R
thj-pcb
Thermal resistance junction-pcb max
1. When
mounted on 1inch² FR-4 board, 2 oz Cu.
DocID024435 Rev 1
3/17
Electrical characteristics
STDLED625H
2
Electrical characteristics
(T
C
= 25 °C unless otherwise specified)
Table 4. On /off states
Test conditions
Symbol
Parameter
Drain-source
Min.
Typ.
Max. Unit
V
(BR)DSS
V
GS
= 0, I
D
= 1 mA
620
V
breakdown voltage
V
GS
= 0, V
DS
= 620V
GS
= 0
1
µA
µA
Zero gate voltage
drain current
I
DSS
V
50
V
DS
= 620
V
,
T
C
=125 °C
Gate-body leakage
current
I
GSS
V
DS
= 0, V
GS
= ± 20 V
± 10
4.5
2
µA
V
V
GS(th)
R
DS(on
Gate threshold voltage
V
DS
= V
GS
, I
D
= 50 µA
3
3.6
1.7
Static drain-source on-
V
GS
= 10
V
,
I
D
= 1.9 A
resistance
Ω
Table
Dynamic
Symbol
Parameter
est conditions
Min.
Typ.
Max. Unit
Input capacitance
C
iss
C
oss
C
rss
560
43
pF
Output capacitance
V
DS
= 50
V
, f = 1 MHz,
–
–
pF
pF
V
GS
= 0
Reverse transfer
capacitance
7.5
E
ivalent output
capacitance
(1)
C
oss eq.
V
DS
= 0 to 496 V, V
GS
= 0
f = 1 MHz open drain
–
27
5
–
pF
Intrinsic gate
resistance
R
G
2
10
Ω
Q
g
Q
gs
Q
gd
T
o
tal gate charge
Gate-source charge
Gate-drain charge
V
DD
= 496
V
,
I
D
= 3.8 A,
23
4
nC
nC
nC
V
GS
= 10 V
–
–
13
1.
C
is defined as a constant equivalent capacitance giving the same charging time as C
when V
DS
oss eq.
oss
increases from 0 to 80% V
DSS
Table 6. Switching times
Test conditions
Symbol
t
d(on)
t
r
t
d(off)
t
f
Parameter
Min.
Typ.
Max. Unit
Turn-on delay time
Rise time
10
9
ns
V
DD
= 300
V
,
I
D
= 1.9 A,
ns
R
G
= 4.7
Ω,
V
GS
= 10 V
–
–
Turn-off-delay time
Fall time
29
19
ns
ns
4/17
DocID024435 Rev 1
STDLED625H
Electrical characteristics
Min. Typ. Max.
Unit
Table 7. Source drain diode
Test conditions
Symbol
Parameter
I
SD
Source-drain current
3.8
A
A
–
–
(1)
I
SDM
Source-drain current (pulsed)
15.2
(2)
V
SD
Forward on voltage
I
SD
= 3.8 A, V
GS
= 0
1.6
V
t
rr
Reverse recovery time
Reverse recovery charge
Reverse recovery current
220
1.4
13
ns
µC
A
I
SD
= 3.8 A, di/dt = 100 A/µs
Q
rr
–
–
I
RRM
t
rr
Reverse recovery time
Reverse recovery charge
Reverse recovery current
I
SD
= 3.8 A, di/dt = 100 A/µs
270
1.9
14
ns
µC
A
Q
rr
V
DD
= 60 V, T
j
= 150 °C
I
RRM
1. Pulse
width limited by safe operating area.
2. Pulsed:
Pulse duration = 300 µs, duty cycle 1.5%
Table 8. Gate-source Zener diode
Symbol
Parameter
Test conditions
Min. Typ. Max.
Unit
30
Gate-source breakdown
voltage
V
(BR)GSO
I
GS
= ± 1 mA, I
D
=0
–
–
V
The built-in back-to-back Zener diodes have been specifically designed to enhance not only
the device’s ESD capability, but also to make them capable of safely absorbing any voltage
transients that may occasionally be applied from gate to source. In this respect, the Zener
voltage is appropriate to achieve efficient and cost-effective protection of device integrity.
The integrated Z
ner diodes thus eliminate the need for external components.
DocID024435 Rev 1
5/17
Electrical characteristics
STDLED625H
2.1
Electrical characteristics (curves)
Figure 2. Safe operating area
Figure 3. Thermal impedance
AM07173v1
I
D
(A)
10µs
10
100µs
1
0.1
1ms
10ms
Tj=150°C
Tc=25°C
Single pulse
0.01
10
V
DS
(V)
0.1
1
100
Figure 4. Output characteristics
Figure 5. Tra
fer characteristics
AM07175v1
AM07176v1
I
D
(A)
I
D
(A)
V
DS
=15V
8
7
6
5
V
GS
=10V
6
7V
5
4
4
3
2
1
0
3
2
6V
1
0
5V
5
2
20
25
V
DS
(V)
8
V
GS
(V)
0
10
15
0
4
6
Figure 6. Gate charge vs gate-source voltage
Figure 7. Static drain-source on-resistance
AM07177v1
AM07178v1
(V)
GS
R
DS(on)
(
Ω
)
V
GS
V
DS
V
DD
=496V
=3.8A
V
GS
=10V
12
I
D
500
400
300
1.9
1.8
1.7
10
8
6
200
100
0
4
2
0
1.6
1.5
2
3
1
10
20
25
Q
g
(nC)
I
D
(A)
0
5
15
0
6/17
DocID024435 Rev 1
STDLED625H
Electrical characteristics
Figure 8. Capacitance variations
Figure 9. Output capacitance stored energy
AM07179v1
AM07180v1
C
E
oss
(pF)
(µJ)
3.0
1000
100
2.5
Ciss
2.0
1.5
1.0
Coss
Crss
10
1
0.5
0
0.1
100
200
400 500
600
1
10
V
DS
(V)
0
100
300
V
DS
(V)
Figure 10. Normalized gate threshold voltage vs
temperature
Figure 11. Normalized o
esistance vs
tempera
re
AM07181v1
AM07182v1
V
GS(th)
(norm)
R
DS(on)
(norm)
1.10
2.5
2.0
1.00
0.90
1.5
1.0
0.5
0.80
0.70
-75
-75
-25
25
75
T
J
(°C)
-25
25
75
T
J
(°C)
125
125
Figure 12.
M
ximum avalanche energy vs
starting T
j
Figure 13. Normalized B
VDSS
vs temperature
AM07184v1
AM07183v1
AS
BV
DSS
(mJ)
120
110
100
90
(norm)
I
D
=3.8 A
V
DD
=50 V
1.10
1.05
1.00
80
70
60
50
40
30
0.95
0.90
20
10
0
0
120
-75
20
40
60 80
100
140 T
J
(°C)
-25
25
75
T
J
(°C)
125
DocID024435 Rev 1
7/17
Electrical characteristics
STDLED625H
Figure 14. Source-drain diode forward
characteristics
AM08888v1
SD
(V)
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
V
T
J
=150°C
T
J
=25°C
T
J
=-50°C
0.2
0.1
0
1
2
3
4
5
I
SD
(A)
8/17
DocID024435 Rev 1
STDLED625H
Test circuits
3
Test circuits
Figure 15. Switching times test circuit for
resistive load
Figure 16. Gate charge test circuit
V
DD
12V
47k
Ω
100nF
1k
Ω
2200
3.3
μ
F
R
L
μ
F
I
G
=CONST
V
DD
100
Ω
V
i
=20V=V
GMAX
D.U.
T
.
V
D
R
G
V
GS
2200
μ
F
D.U.
T
.
V
G
2.7k
Ω
47k
Ω
P
W
1k
Ω
P
W
AM01468v1
AM01469v1
Figure 17. Test circuit for inductive load
switching and diode recovery times
Figure 18. Unclamped Inductive load test circuit
L
A
A
A
B
D
S
FAST
DIODE
L=100
μ
H
V
D
G
2200
μ
F
D.U.
T
.
B
3.3
V
DD
μ
F
3.3
μ
F
1000
μ
F
B
V
DD
25
Ω
I
D
D
G
R
G
S
V
i
D.U.
T
.
P
w
AM01470v1
AM01471v1
Figure 19. Unclamped inductive waveform
Figure 20. Switching time waveform
t
on
t
off
td
off
V
(BR)DSS
t
r
t
f
td
on
V
D
90%
10%
90%
I
DM
10%
V
GS
V
DS
I
D
0
0
V
DD
V
DD
90%
10%
AM01472v1
AM01473v1
DocID024435 Rev 1
9/17
Package mechanical data
STDLED625H
4
Package mechanical data
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK
®
packages, depending on their level of environmental compliance. ECOPACK
®
ECOPACK
®
is an ST trademark.
10/17
DocID024435 Rev 1
STDLED625H
Package mechanical data
Table 9. DPAK (TO-252) mechanical data
mm
Dim.
Min.
Typ.
Max.
A
A1
A2
b
2.20
0.90
0.03
0.64
5.20
0.45
0.48
6.00
2.40
1.10
0.23
0.90
5.40
0.60
0.60
6.20
b4
c
c2
D
D1
E
5.10
6.40
6.60
E1
e
4.70
2
8
e1
H
4.40
9.35
1.00
4.60
10.10
1.50
L
(L1)
L2
L4
R
2.80
0.80
0.60
0°
1.00
8°
0.20
DocID024435 Rev 1
11/17
Package mechanical data
STDLED625H
Figure 21. DPAK (TO-252) drawing
0068772_K
12/17
DocID024435 Rev 1
STDLED625H
Package mechanical data
Figure 22. DPAK footprint
(a)
Footprint_REV_K
a. All
dimensions are in millimeters
DocID024435 Rev 1
13/17
Packaging mechanical data
STDLED625H
5
Packaging mechanical data
Table 10. DPAK (TO-252) tape and reel mechanical data
Tape Reel
mm
mm
Dim.
Dim.
Min.
Max.
Min.
Max.
A0
B0
B1
D
6.8
7
A
B
C
D
G
N
T
330
10.4
10.6
12.1
1.6
1.5
12.8
20.2
16.4
50
13.2
18.4
22.4
1.5
1.5
D1
E
1.65
7.4
1.85
7.6
F
K0
P0
P1
P2
R
2.55
3.9
2.75
4.1
Base qty.
Bulk qty.
2500
2500
7.9
8.1
1.9
2.1
40
T
0.25
15.7
0.35
16.3
W
14/17
DocID024435 Rev 1
STDLED625H
Packaging mechanical data
Figure 23. Tape for DPAK (TO-252)
10 pitches cumulative
tolerance on tape +/- 0.2 mm
P0
D
Top cover
tape
P2
T
E
F
W
K0
B1
B0
For machine ref. only
including draft and
A0
D1
P1
radii concentric around B0
User direction of feed
R
Bending radius
User direction of feed
AM08852v1
Figure 24. Reel for DPAK (TO-252)
T
R
L DIMENSIONS
40mm min.
Access hole
At slot location
B
D
C
N
A
G measured at hub
Full radius
Tape slot
in core for
tape start 25 mm min.
width
AM08851v2
DocID024435 Rev 1
15/17
Revision history
STDLED625H
6
Revision history
Table 11. Document revision history
Changes
Date
Revision
22-Mar-2013
1
First release.
16/17
DocID024435 Rev 1
STDLED625H
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17/17
