STMicroelectronics-STF11N60DM2

Part #STMicroelectronics-STF11N60DM2
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STMicroelectronics-STF11N60DM2
STF11N60DM2  
Datasheet  
N-channel 600
V
,
3
70 mΩ typ., 10 A MDmesh DM2 Power MOSFET in a  
TO-220FP package  
V
@ T  
R max.  
DS(on)  
I
P
TOT  
Order code  
DS  
Jmax  
D
STF11N60DM2  
650 V  
420 mΩ  
10 A  
25 W  
•
•
•
•
•
•
Fast-recovery body diode  
Extremely low gate charge and input capacitance  
Low on-resistance  
3
2
1
100% avalanche tested  
Extremely high dv/dt ruggedness  
Zener-protected  
TO-220FP  
D(2)  
Applications  
•
Switching applications  
G(1)  
Description  
S(3)  
This high-voltage N-channel Power MOSFET is part of the MDmesh DM2 fast-  
recovery diode series. It offers very low recovery charge (Q

rr

) and time (t

rr

) combined  
with low R

DS(on)

, rendering it suitable for the most demanding high-efficiency  
converters and ideal for bridge topologies and ZVS phase-shift converters.  
NG1D2S3Z  
Product status  
Product summary  
Order code  
Marking  
STF11N60DM2  
11N60DM2  
TO220FP  
Tube  
Package  
Packing  
DS11673
–
Rev 2
–
November 2019  
For further information contact your local STMicroelectronics sales office.  

STF11N60DM2  
Electrical ratings  
1
Electrical ratings  
Table 1.
Absolute maximum ratings  
Parameter  
Symbol  
Value  
Unit  
V
Gate-source voltage  
±25  
10  
V
GS  
Drain current (continuous) at T  
Drain current (continuous) at T  
= 25 °C  
case  
case  
I
A
D
= 100 °C  
6.3  
40  
I
Drain current (pulsed)  
A
DM  
P
TOT  
T
o
tal power dissipation at T  
= 25 °C  
case  
25  
W
dv/dt

dv/dt

Peak diode recovery voltage slope  
MOSFET dv/dt ruggedness  
50  
V/ns  
kV  
50  
Insulation withstand voltage (RMS) from all three leads to external heat  
sink  
V
2.5  
ISO  
T
stg  
Storage temperature range  
-55 to 150  
°C  
T
Operating junction temperature range  
j
1. Pulse
 
width is limited by safe operating area.  
2.  
3.  
I
≤ 10 A, di/dt=900 A/μs; V
 
peak < V  
,V =
 
400 V  
(BR)DSS DD  
SD  
DS  
V
≤ 480 V.  
DS  
4. t
 
= 1 s; T
 
= 25 °C  
C
Table 2.
Thermal data  
Parameter  
Symbol  
Value  
5
Unit  
R
thj-case  
Thermal resistance junction-case  
Thermal resistance junction-ambient  
°C/W  
R
thj-amb  
62.5  
Table 3.
Avalanche characteristics  
Symbol  
Parameter  
Avalanche current, repetitive or not repetitive  
Single pulse avalanche energy  
Value  
2.5  
Unit  
A
I
AR  
E
250  
mJ  
AS  
1. pulse
 
width limited by T  
jmax  
2. starting
 
T =
 
25 °C, I
 
= I
 
, V
 
= 50 V.  
j
D
AR  
DD  
DS11673
–
Rev 2  
page 2/12  
 
 
 
 
 
 
 
 

STF11N60DM2  
Electrical characteristics  
2
Electrical characteristics  
(T

case

= 25 °C unless otherwise specified)  
Table 4.
Static  
Symbol  
Parameter  
Test conditions  
Min.  
Typ.  
Max.  
Unit  
Drain-source breakdown  
voltage  
V
V
V
= 0
V
, I
 
= 1
m
A  
600  
V
(BR)DSS  
GS  
D
= 0
V
, V
 
=
6
00 V  
1.5  
GS  
GS  
DS  
I
Zero gate voltage drain current  
µA  
DSS  
V
T
= 0
V
, V
 
=
6
00 V,  
DS  
100  
= 125 °C

case  
I
V
= 0
V
, V
 
=
±
25 V  
GS  
Gate-body leakage current  
Gate threshold voltage  
±5  
5
µA  
V
GSS  
DS  
DS  
V
V
V
= V
 
, I
 
= 250 µA  
3
4
GS(th)  
GS  
D
Static drain-source on-  
resistance  
R
DS(on)  
= 10
V
, I
 
= 5 A  
D
370  
420  
mΩ  
GS  
1. Defined
 
by design, not subject to production test.  
Table 5.
Dynamic  
Symbol  
Parameter  
Input capacitance  
Test conditions  
Min.  
Typ.  
614  
32  
Max.  
Unit  
C
iss  
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
C
oss  
V
V
= 100
V
, f = 1
M
Hz, V
 
= 0 V  
Output capacitance  
pF  
DS  
GS  
C
Reverse transfer capacitance  
Equivalent output capacitance  
Intrinsic gate resistance  
T
o
tal gate charge  
1.08  
57  
rss  
= 0 to 480
V
, V
 
= 0 V  
C
oss eq.  
pF  
Ω
DS  
GS  
R
f = 1 MHz, I
 
= 0 A  
D
6.2  
G
Q
16.5  
3.8  
g
V
= 480
V
, I
 
=
1
0 A, V
 
= 0 to 10 V  
D GS  
DD  
Q
Gate-source charge  
nC  
gs  
Q
Gate-drain charge  
9.2  
gd  
1.  
C
oss eq.  
is defined as a constant equivalent capacitance giving the same charging time as C  
when V
 
increases from 0  
oss DS  
to 80% V  
.
DSS  
Table 6.
Switching times  
Test conditions  
Symbol  
Parameter  
Turn-on delay time  
Min.  
Typ.  
11.7  
6.3  
Max.  
Unit  
t
–
–
–
–
–
–
–
–
d(on)  
V
V
= 300
V
, I
 
= 5
A
, R
 
= 4.7 Ω,  
D G  
DD  
t
Rise time  
r
GS  
ns  
t
Turn-off delay time  
Fall time  
31  
d(off)  
t
9.5  
f
DS11673
–
Rev 2  
page 3/12  
 
 
 

STF11N60DM2  
Electrical characteristics  
Table 7.
Source-drain diode  
Test conditions  
Symbol  
Parameter  
Source-drain current  
Min.  
Typ.  
Max.  
10  
Unit  
A
I
–
–
–
–
–
–
–
–
–
SD  
I
Source-drain current (pulsed)  
Forward on voltage  
40  
A
SDM  
V
V
= 0
V
, I
 
=
1
0 A  
SD  
1.6  
V
GS  
SD  
t
Reverse recovery time  
Reverse recovery charge  
Reverse recovery current  
Reverse recovery time  
Reverse recovery charge  
Reverse recovery current  
90  
248  
5.5  
ns  
nC  
A
rr  
I
= 10 A, di/dt = 100 A/µs, V
 
= 60 V  
DD  
SD  
Q
rr  
I
RRM  
t
160  
664  
8.3  
ns  
nC  
A
rr  
I
= 10 A, di/dt = 100 A/µs, V
 
= 60
V
,  
DD  
SD  
T =
 
150 °C (see

j
Q
rr  
I
RRM  
1. Limited
 
by maximum junction temperature.  
2. Pulse
 
width is limited by safe operating area.  
3. Pulse
 
test: pulse duration = 300 µs, duty cycle 1.5%.  
Table 8.
Gate-source Zener diode  
Symbol  
Parameter  
Test conditions  
= ±250 µA, I
 
= 0 A  
Min.  
Typ.  
Max.  
Unit  
V
I
GS  
Gate-source breakdown voltage  
±30  
–
–
V
(BR)GSO  
D
The built-in back-to-back Zener diodes are specifically designed to enhance the ESD performance of the device.  
The Zener voltage facilitates efficient and cost-effective device integrity protection, thus eliminating the need for  
additional external componentry.  
DS11673
–
Rev 2  
page 4/12  
 
 
 

STF11N60DM2  
Electrical characteristics (curves)  
2.1  
Electrical characteristics (curves)  
Figure 1.
Safe operating area  
Figure 2.
Thermal impedance  
I
GC20940  
K
D
(A)  
GIPG270516FQ6F01FSOA  
Operation in this area is  
limited by max. R  
DS(on)  
10

-1  

10

-2  

10

-3  

10

1  

t
t
= 10µs  
p
p
= 100µs  
10

0  

t
t
= 1ms  
p
p
T
≤
150 °C  
j
= 10ms  
Tc
=
25°C  
single pulse  
10

-1  

10

-4  

10

-3  

10

-2  

10

-1  

10

0  

t

p

(s)  
10

-1  

10

0  

10

1  

10

2  

10

3  

V
(V)  
DS  
Figure 3.
Output characteristics  
Figure 4.
Transfer characteristics  
I
I
D
GIPG270516FQ6F01FOCH  
GIPG270516FQ6F01FTCH  
D
(A)  
(A)  
20  
V
= 8, 9, 10 V  
GS  
V
= 20 V  
DS  
20  
16  
12  
8
16  
12  
8
7 V  
6 V  
4
0
4
0
2
3
4
5
6
7
8
9 V  
(V)  
GS  
0
4
8
12  
16  
V
(V)  
DS  
Figure 5.
Gate charge vs gate-source voltage  
Figure 6.
Static drain-source on-resistance  
V
GIPG270516FQ6F01FQVG
V  
R
GIPG270516FQ6F01FRID  
GS  
(V)  
DS  
(V)  
DS(on)  
(mΩ)  
V
= 480V  
DD  
12  
600  
V
= 10 V  
GS  
I
= 10 A  
D
390  
V
DS  
10  
8
500  
400  
300  
200  
100  
380  
370  
6
4
360  
350  
2
0
0
0
4
8
12  
16 Qg
 
(nC)  
0
2
4
6
8
10  
I
(A)  
D
DS11673
–
Rev 2  
page 5/12  
 

STF11N60DM2  
Electrical characteristics (curves)  
Figure 8.
Normalized gate threshold voltage vs  
temperature  
Figure 7.
Capacitance variations  
C
GIPG270516FQ6F01FCVR  
V
GIPG270516FQ6F01FVTH  
GS(th)  
(pF)  
(norm.)  
I
= 250 μ A  
D
C
10

3  

iss  
1.1  
1.0  
0.9  
0.8  
10

2  

10

1  

C
C
oss  
rss  
f = 1 MHz  
10

0  

0.7  
0.6  
10

-1  

10

-1  

10

0  

10

1  

10

2  

V
(V)  
DS  
-75  
-25  
25  
75  
125  
T (°C)  
J
Figure 10.
Normalized V

(BR)DSS

vs temperature  
Figure 9.
Normalized on-resistance vs temperature  
R
GIPG270516FQ6F01FRON  
V
(BR)DSS  
(norm.)  
DS(on)  
(norm.)  
GIPG270516FQ6F01FBDV  
V
GS  
=10 V  
I
= 1 mA  
D
2.2  
1.08  
1.8  
1.4  
1.0  
1.04  
1.00  
0.96  
0.6  
0.2  
0.92  
0.88  
-75  
-25  
25  
75  
125  
T (°C)  
J
-75  
-25  
25  
75  
125  
T (°C)  
J
Figure 11.
Output capacitance stored energy  
Figure 12.
Source-drain diode forward characteristics  
Eoss  
(µJ )  
V
SD  
(V)  
GIPG270516FQ6F01FEOS  
GIPG270516FQ6F01FSDF  
1.1  
T
= – 50 °C  
J
4
3
2
T
= 25 °C  
J
1.0  
0.9  
0.8  
0.7  
T
= 150 °C  
J
1
0
0.6  
0.5  
0
100 200 300 400 500 600
 
V (V)  
0
2
4
6
8
10  
I
(A)  
SD  
DS  
DS11673
–
Rev 2  
page 6/12  

STF11N60DM2  
Test circuits  
3
Test circuits  
Figure 13.
Test circuit for resistive load switching times  
Figure 14.
Test circuit for gate charge behavior  
V

DD  

12 V  
47 kΩ  
1 kΩ  
100 nF  
R

L  

2200  
μF  
3.3  
μF  
V

DD  

+
I

G

= CONST  
2.7 kΩ  
V

D  

R

G  

D.U.
T
.  
100 Ω  
V

GS  

pulse width  
+
D.U.
T
.  
V

GS  

V

G  

2200  
μF  
pulse width  
47 kΩ  
1 kΩ  
AM01469v1  
AM01468v1  
Figure 15.
Test circuit for inductive load switching and  
diode recovery times  
Figure 16.
Unclamped inductive load test circuit  
L
A
A
A
D
S
V

D  

100 µH  
D
fast  
G
D.U.
T
.  
B
diode  
2200  
3.3  
µF  
+
V

DD  

1000  
µF  
B
µF  
3.3  
µF  
B
+
V

DD  

25 Ω  
I

D  

G
D.U.
T
.  
R

G  

S
+
_
D.U.
T
.  
V

i  

pulse width  
AM01471v1  
AM01470v1  
Figure 18.
Switching time waveform  
Figure 17.
Unclamped inductive waveform  
t

on  

t

d(on)  

t

off  

t

d(off)  

V
(BR)DSS  
t

r  

t

f  

V
D  
90%  
90%  
I
DM  
V

DS  

10%  
V

GS  

10%  
0
0
I
D  
V
DD  
V
DD  
90%  
10%  
AM01472v1  
AM01473v1  
DS11673
–
Rev 2  
page 7/12  
 
 
 
 

STF11N60DM2  
Package information  
4
Package information  
In order to meet environmental requirements, ST offers these devices in different grades of

packages,  
depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product  
status are available at:

. ECOPACK is an ST trademark.  
4.1  
TO-220FP package information  
Figure 19.
TO-220FP package outline  
7012510_Rev_13_B  
DS11673
–
Rev 2  
page 8/12  
 
 

STF11N60DM2  
TO-220FP package information  
Table 9.
TO-220FP package mechanical data  
mm  
Dim.  
Min.  
4.40  
2.50  
2.50  
0.45  
0.75  
1.15  
1.15  
4.95  
2.40  
10.00  
Typ.  
Max.  
4.60  
2.70  
2.75  
0.70  
1.00  
1.70  
1.70  
5.20  
2.70  
10.40  
A
B
D
E
F
F1  
F2  
G
G1  
H
L2  
L3  
L4  
L5  
L6  
L7  
Dia  
16.00  
28.60  
9.80  
2.90  
15.90  
9.00  
3.00  
30.60  
10.60  
3.60  
16.40  
9.30  
3.20  
DS11673
–
Rev 2  
page 9/12  

STF11N60DM2  
Revision history  
Table 10.
Document revision history  
Date  
Revision  
Changes  
17-Jun-2016  
04-Nov-2019  
1
First release.  
Minor text changes.  
2
DS11673
–
Rev 2  
page 10/12  
 

STF11N60DM2  
Contents  
Contents  

Electrical ratings

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
.

Electrical characteristics

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
.

Electrical characteristics (curves)

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Test circuits

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
.

Package information

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
.

TO-220FP package information

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Revision history

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

DS11673
–
Rev 2  
page 11/12  

STF11N60DM2  
IMPORTANT NOTICE – PLEASE READ CAREFULLY  
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Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of  
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No license, express or implied, to any intellectual property right is granted by ST herein.  
Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product.  
ST and the ST logo are trademarks of S
T
.
F
or additional information about ST trademarks, please refer to

. All other product or service  
names are the property of their respective owners.  
Information in this document supersedes and replaces information previously supplied in any prior versions of this document.  
© 2019 STMicroelectronics – All rights reserved  
DS11673
–
Rev 2  
page 12/12