STMicroelectronics-STF140N6F7
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STF140N6F7
N-
channel 60 V, 0.0031 Ω typ., 70 A STripFET™ F7
Power MOSFET in a TO-220FP package
Datasheet – production data
Features
Order code
V
DS
R
DS(on)
max.
I
D
P
TOT
STF140N6F7
60 V
0.0035 Ω
70 A
33 W
Among the lowest R
DS(on)
on the market
Excellent figure of merit (FoM)
Low C
rss
/C
iss
ratio for EMI immunity
High avalanche ruggedness
Applications
TO-220FP
Switching applications
Figure 1: Internal schematic diagram
Description
This N-channel Power MOSFET utilizes
STripFET™ F7 technology with an enhanced
trench gate structure that results in very low on-
state resistance, while also reducing internal
capacitance and gate charge for faster and more
efficient switching.
Table 1: Device summary
Order code
Marking
Package
Packing
STF140N6F7
140N6F7
TO-220FP
Tube
January 2016
DocID027730 Rev 3
1/13
This is information on a product in full production.
Contents
STF140N6F7
Contents
2/13
DocID027730 Rev 3
STF140N6F7
Electrical ratings
1
Electrical ratings
Table 2: Absolute maximum ratings
Symbol
V
DS
Parameter
Value
60
Unit
V
Drain-source voltage
Gate-source voltage
V
GS
±20
70
V
Drain current (continuous) at T
case
= 25 °C
Drain current (continuous) at T
case
= 100 °C
Drain current (pulsed)
A
50
280
33
A
W
P
TOT
Total dissipation at T
case
= 25 °C
Single pulse avalanche energy
250
7.1
mJ
V/ns
Insulation withstand voltage (RMS) from all three leads to external
heat sink (t = 1 s; T
c
= 25 °C)
V
ISO
2500
V
T
stg
T
j
Storage temperature
-55 to 175
175
°C
Maximum junction temperature
Notes:
(1)
Current is limited by package.
(2)
Pulse width is limited by safe operating area.
(3)
Starting T
j
= 25°C, I
D
= 20 A, V
DD
= 30 V.
(4)
I
= 70 A; di/dt = 600 A/
μ
s; V
DD
= 48 V; T
j
< T
jmax
SD
Table 3: Thermal data
Symbol
R
thj-case
R
thj-amb
Parameter
Thermal resistance junction-case
Thermal resistance junction-ambient
Value
4.5
Unit
°C/W
62.5
DocID027730 Rev 3
3/13
Electrical characteristics
STF140N6F7
2
Electrical characteristics
(T
case
= 25 °C unless otherwise specified)
Table 4: Static
Symbol
Parameter
Test conditions
V
GS
= 0 V, I
D
= 1 mA
V
GS
= 0 V, V
DS
= 60 V
Min.
Typ.
Max.
Unit
Drain-source breakdown
voltage
V
(BR)DSS
60
V
1
Zero gate voltage drain
current
I
DSS
µA
V
GS
= 0 V, V
DS
= 60 V,
T
j
= 125 °C
100
Gate-body leakage
current
I
GSS
V
DS
= 0 V, V
GS
= 20 V
V
DS
= V
GS
, I
D
= 250 µA
V
GS
= 10 V, I
D
= 35 A
100
4
nA
V
V
GS(th)
R
DS(on)
Gate threshold voltage
2
Static drain-source on-
resistance
0.0031 0.0035
Ω
Table 5: Dynamic
Test conditions
Symbol
C
iss
Parameter
Input capacitance
Output capacitance
Min. Typ. Max. Unit
3100
1520
–
–
–
–
C
oss
V
DS
= 25 V, f = 1 MHz, V
GS
= 0 V
pF
nC
Reverse transfer
capacitance
193
C
rss
–
–
55
19
18
Q
g
Q
gs
Q
gd
Total gate charge
Gate-source charge
Gate-drain charge
–
–
–
–
–
–
V
DD
= 30 V, I
D
= 70 A,
Table 6: Switching times
Test conditions
Symbol
Parameter
Turn-on delay time
Rise time
Min. Typ. Max. Unit
24
68
39
20
t
d(on)
t
r
t
d(off)
t
f
–
–
–
–
–
–
–
–
V
DD
= 30 V, I
D
= 35 A R
G
= 4.7
Ω,
ns
Turn-off delay time
Fall time
4/13
DocID027730 Rev 3
STF140N6F7
Symbol
Electrical characteristics
Min. Typ. Max. Unit
Table 7: Source-drain diode
Test conditions
Parameter
1.2
t
rr
Forward on voltage
Reverse recovery time
V
GS
= 0 V, I
SD
= 70 A
–
–
V
42.4
38.2
ns
I
SD
= 70 A, di/dt = 100 A/µs,
Reverse recovery
charge
Q
rr
–
–
nC
A
Reverse recovery
current
1.8
I
RRM
Notes:
(1)
Pulse test: pulse duration = 300 µs, duty cycle 1.5%.
DocID027730 Rev 3
5/13
Electrical characteristics
STF140N6F7
2.1
Electrical characteristics (curves)
Figure 2: Safe operating area
Figure 3: Thermal impedance
Figure 4: Output characteristics
Figure 5: Transfer characteristics
Figure 6: Gate charge vs gate-source voltage
Figure 7: Static drain-source on-resistance
6/13
DocID027730 Rev 3
STF140N6F7
Electrical characteristics
Figure 9: Normalized gate threshold voltage
vs temperature
Figure 8: Capacitance variations
Figure 10: Normalized on-resistance vs
temperature
Figure 11: Normalized V(BR)DSS vs
temperature
Figure 12: Source-drain diode forward characteristics
DocID027730 Rev 3
7/13
Test circuits
STF140N6F7
3
Test circuits
Figure 13: Test circuit for resistive load
switching times
Figure 14: Test circuit for gate charge
behavior
Figure 15: Test circuit for inductive load
switching and diode recovery times
Figure 16: Unclamped inductive load test
circuit
Figure 18: Switching time waveform
Figure 17: Unclamped inductive waveform
8/13
DocID027730 Rev 3
STF140N6F7
Package information
4
Package information
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK
®
packages, depending on their level of environmental compliance. ECOPACK
®
ECOPACK
®
is an ST trademark.
DocID027730 Rev 3
9/13
Package information
STF140N6F7
4.1
TO-220FP package information
Figure 19: TO-220FP package outline
10/13
DocID027730 Rev 3
STF140N6F7
Package information
Table 8: TO-220FP package mechanical data
mm
Dim.
Min.
4.4
Typ.
Max.
4.6
A
B
2.5
2.7
D
2.5
2.75
0.7
E
0.45
0.75
1.15
1.15
4.95
2.4
F
1
F1
F2
G
1.70
1.70
5.2
G1
H
2.7
10
10.4
L2
L3
L4
L5
L6
L7
Dia
16
28.6
9.8
2.9
15.9
9
30.6
10.6
3.6
16.4
9.3
3
3.2
DocID027730 Rev 3
11/13
Revision history
STF140N6F7
5
Revision history
Table 9: Document revision history
Date
Revision Changes
09-Apr-2015
1
2
3
First release.
Throughout document:
17-Apr-2015
14-Jan-2016
– minor text edits
– updated drain-source on-resistance values
12/13
DocID027730 Rev 3
STF140N6F7
IMPORTANT NOTICE
–
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–
All rights reserved
DocID027730 Rev 3
13/13
