STMicroelectronics-STF15N60M2-EP
| Part # | STMicroelectronics-STF15N60M2-EP |
Download  | STMicroelectronics-STF15N60M2-EP |
STF15N60M2-E
P
,
STFI15N60M2-EP
N-
channel 600 V, 0.340 Ω typ., 11 A MDmesh™
M2 EP
Power MOSFET in TO-220FP and I²PAKFP packages
Datasheet – production data
Extremely low gate charge
Excellent output capacitance (C
OSS
) profile
Very low turn-off switching losses
100% avalanche tested
Zener-protected
Applications
2
TO-220FP
I PAKFP (TO-281)
Switching applications
Tailored for very high frequency converters
(f > 150 kHz)
Figure 1: Internal schematic diagram
Description
D(2)
These devices are N-channel Power MOSFETs
developed using MDme
sh™ M2 EP enhanced
performance technology. Thanks to their strip
layout and improved vertical structure, the
devices exhibit low on-resistance and optimized
switching characteristics with very low turn-off
switching loss, rendering them suitable for the
most demanding very high frequency converters.
G(1)
Table 1: Device summary
Order code
Marking
Package Packaging
STF15N60M2-EP
TO-220FP
S(3)
AM01476v1
15N60M2EP
Tube
I²PAKFP
(TO-281)
STFI15N60M2-EP
Features
Order code
V
DS
@T
Jmax
R
DS(on)
max.
650 V
0.378 Ω
I
D
STF15N60M2-EP
STFI15N60M2-EP
11 A
January 2015
DocID027373 Rev 1
1/15
This is information on a product in full production.
Contents
STF15N60M2-EP, STFI15N60M2-EP
Contents
2/15
DocID027373 Rev 1
STF15N60M2-EP, STFI15N60M2-EP
Electrical ratings
1
Electrical ratings
Table 2: Absolute maximum ratings
Symbol
Parameter
Value
± 25
11
Unit
V
V
GS
Gate-source voltage
Drain current (continuous) at T
C
= 25 °C
Drain current (continuous) at T
C
= 100 °C
Drain current (pulsed)
A
7
A
44
A
P
TOT
Total dissipation at T
C
= 25 °C
Peak diode recovery voltage slope
MOSFET dv/dt ruggedness
25
W
15
V/ns
V/ns
50
Insulation withstand voltage (RMS) from all three leads to external
heat sink (t = 1 s,T
C
= 25 °C)
V
ISO
2500
V
T
stg
T
j
Storage temperature
– 55 to
150
°C
Operating junction temperature
Notes:
(1)
Limited by maximum junction temperature.
(2)
Pulse width limited by safe operating area.
(3)
I
≤ 11 A, di/dt ≤ 400 A/µs; V
DS peak
< V
(BR)DSS
, V
DD
= 400 V.
≤ 480 V
.
SD
(4)
V
DS
Table 3: Thermal data
Parameter
Symbol
R
thj-case
R
thj-amb
Value
5
Unit
°C/W
°C/W
Thermal resistance junction-case max
Thermal resistance junction-ambient max
62.5
Table 4: Avalanche characteristics
Symbol
Parameter
Value
Unit
Avalanche current, repetetive or not repetetive
I
AR
2.8
A
(pulse width limited by T
jmax
)
Single pulse avalanche energy
E
AS
125
mJ
(starting T
j
= 25 °C, I
D
= I
AR
; V
DD
= 50 V)
DocID027373 Rev 1
3/15
Electrical characteristics
STF15N60M2-EP, STFI15N60M2-EP
2
Electrical characteristics
T
C
= 25 °C unless otherwise specified
Table 5: On/off states
Symbol
Parameter
Test conditions
V
GS
= 0 V, I
D
= 1 mA
V
GS
= 0 V, V
DS
= 600 V
Min.
Typ.
Max.
Unit
V
Drain-source breakdown
voltage
V
(BR)DSS
600
1
µA
µA
Zero gate voltage drain
current
I
DSS
V
GS
= 0 V, V
DS
= 600 V
T
C
= 125 °C
100
Gate-body leakage current
Gate threshold voltage
I
GSS
V
DS
= 0 V, V
GS
= ±25 V
V
DS
= V
GS
, I
D
= 250 µA
±10
4
µA
V
V
GS(th)
2
3
Static drain-source on-
resistance
R
DS(on)
V
GS
= 10 V, I
D
= 5.5 A
0.340
0.378
Ω
Table 6: Dynamic
Test conditions
Symbol
C
iss
Parameter
Input capacitance
Output capacitance
Min.
Typ.
590
30
Max.
Unit
pF
–
–
–
–
C
oss
V
DS
= 100 V,f = 1 MHz,
V
GS
= 0 V
pF
Reverse transfer
capacitance
C
rss
–
–
1.1
–
–
pF
pF
Equivalent output
capacitance
V
DS
= 0 to 480 V,
V
GS
= 0 V
148
R
G
Q
g
Intrinsic gate resistance
Total gate charge
f = 1 MHz, I
D
= 0 A
–
–
–
–
7
–
–
–
–
Ω
17
3.1
7.3
nC
nC
nC
V
DD
= 480 V, I
D
= 11 A,
Q
gs
Q
gd
Gate-source charge
Gate-drain charge
Notes:
(1)
C
oss eq.
is defined as a constant equivalent capacitance giving the same charging time as C
oss
when V
DS
increases from 0 to 80% V
DSS.
Table 7: Switching energy
Test conditions
Symbol
Parameter
Min. Typ. Max. Unit
V
DD
= 400 V, I
D
= 1.5 A
R
G
= 4.7
Ω, V
GS
= 10 V
–
–
4.7
5.2
–
–
µJ
µJ
Turn-off energy
(from 90% V
GS
to 0% I
D
)
E
(off)
V
DD
= 400 V, I
D
= 3.5 A
R
G
= 4.7
Ω, V
GS
= 10 V
4/15
DocID027373 Rev 1
STF15N60M2-EP, STFI15N60M2-EP
Electrical characteristics
Min. Typ. Max. Unit
Table 8: Switching times
Test conditions
Symbol
t
d(on)
t
r
Parameter
Turn-on delay time
Rise time
V
DD
= 300 V, I
D
= 5.5 A
R
G
= 4.7
Ω, V
GS
= 10 V (see
–
–
–
11
10
40
–
–
–
ns
ns
ns
t
d(off)
Turn-off-delay time
t
f
Fall time
–
15
–
ns
Table 9: Source drain diode
Test conditions
Symbol
Parameter
Min. Typ. Max. Unit
Source-drain current
–
–
–
–
–
11
44
A
A
Source-drain current (pulsed)
Forward on voltage
V
SD
V
GS
= 0 V, I = 11 A
1.6
V
t
rr
Reverse recovery time
Reverse recovery charge
280
2.7
ns
µC
I
SD
= 11 A, di/dt = 100 A/µs,
Q
rr
I
RRM
Reverse recovery current
–
19.5
A
t
rr
Reverse recovery time
–
–
400
3.8
ns
I
SD
= 11 A, di/dt = 100 A/µs,
V
DD
= 60 V, T
j
= 150 °C
Q
rr
Reverse recovery charge
µC
I
RRM
Reverse recovery current
–
19
A
Notes:
(1)
Limited by maximum junction temperature.
(2)
Pulse width is limited by safe operating area.
(3)
Pulsed: pulse duration = 300 µs, duty cycle 1.5%.
DocID027373 Rev 1
5/15
Electrical characteristics
STF15N60M2-EP, STFI15N60M2-EP
2.1
Electrical characteristics (curves)
Figure 2: Safe operating area
Figure 3: Thermal impedance
GC20940
GIPG200120151046
M
T
I
D
(A)
K
10
s
i
)
n
ea
R
ar
-1
S(o
10
D
s
10µs
hi
t
n
x
i
a
m
on
i
y
at
b
d
100µs
e
per
t
i
O
1
m
i
L
1ms
-2
10
10
10ms
0.1
Tj=150°C
T
c
=25°C
Single pulse
0.01
-3
10
-4
-3
-2
-1
0
10
V
DS
(V)
0.1
1
T
p
(s)
10
10
10
10
100
Figure 4: Output characteristics
Figure 5: Transfer characteristics
GIPG121220141416
M
T
GIPG121220141419
M
T
I
D
I
D
(A)
(A)
V
G
S
=7, 8, 9, 10V
V
DS
=17V
6V
20
15
20
15
5V
10
5
10
4V
16
5
0
0
8
12
V
DS
(V)
2
8
V
G
S
(V)
0
4
0
4
6
Figure 7: Normalized V
(BR)DSS
vs temperature
Figure 6: Normalized gate threshold voltage
vs temperature
V
GS(th)
GIPG181120141615ALS
V
(
(
n
B
o
R
r
)
m
D
S
)
S
GIPG191120141457ALS
(norm)
1.1
1.0
0.9
0.8
1.08
1.04
I
D
= 250 µA
1.00
0.96
I
D
= 1mA
0.7
0.6
0.92
0.88
-75
-25
25
75
125
T
J
(°C)
T
J
(°C)
-75
-25
25
75
125
6/15
DocID027373 Rev 1
STF15N60M2-EP, STFI15N60M2-EP
Figure 8: Static drain-source on-resistance
Electrical characteristics
Figure 9: Normalized on-resistance vs
temperature
GIPG181120141628ALS
R
DS(on)
(norm)
GIPG121220141431
M
T
R
DS(on)
(
Ω
)
V
G
S
=10V
2.2
0.360
0.350
0.340
1.8
V
GS
= 10 V
1.4
1.0
0.6
0.2
0.330
0.320
-75
-25
25
75
T
J
(°C)
125
2
4
6
8
10
I
D
(A)
0
Figure 11: Capacitance variations
Figure 10: Gate charge vs gate-source
voltage
GIPG121220141425
M
T
V
GS
(V)
GIPG121220141441
M
T
V
DS
C
(pF)
(V)
V
DD
=480V
I
D
=11A
12
600
1000
V
DS
Ciss
10
500
8
6
400
300
200
100
10
Coss
Crss
4
2
0
1
100
0
0.1
Q
g
(nC)
0
16
4
8
12
0.1
100
1
10
V
DS
(V)
Figure 12: Turn-off switching loss vs drain
current
Figure 13: Source-drain diode forward
characteristic
GIPG121220141453
M
T
GIPG161220141014
M
T
E
off
(V)
V
SD
(µJ)
5.4
1.1
1
T
J
=-50°C
V
=400
V
, R
=4,7Ω,V
=10V
DD GS
G
5.2
5
0.9
0.8
0.7
T
J
=25°C
4.8
T
J
=150°C
4.6
4.4
0.6
0.5
0
1.5
2.5
3
3.5
2
4
6
10
8
I
SD
(A)
1
2
I
D
(A)
0.5
DocID027373 Rev 1
7/15
Test circuits
STF15N60M2-EP, STFI15N60M2-EP
3
Test circuits
Figure 15: Gate charge test circuit
Figure 14: Switching times test circuit for
resistive load
V
DD
12 V
47
k
Ω
1 k
Ω
100 nF
I
G
= CONST
V
i
≤
V
GS
100 Ω
D.U.
T
.
V
G
2.7
k
Ω
2200 μ
F
47
k
Ω
1 k
Ω
P
W
AM01469v1
Figure 17:
Unclamped inductive load test
circuit
Figure 16:
Test circuit for inductive load
switching and diode recovery times
Figure 18: Unclamped inductive waveform
Figure 19: Switching time waveform
t
t
off
on
t
t
t
t
f
d(on)
r
d(off)
V
(
B
R
)
D
SS
V
D
90%
90%
10%
I
DM
V
10%
DS
0
I
D
90%
V
V
V
GS
DD
DD
AM01473v1
10%
0
AM01472v1
8/15
DocID027373 Rev 1
STF15N60M2-EP, STFI15N60M2-EP
Package mechanical
data
4
Package mechanical data
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK
®
packages, depending on their level of environmental compliance. ECOPACK
®
ECOPACK
®
is an ST trademark.
DocID027373 Rev 1
9/15
Package mechanical
data
STF15N60M2-EP, STFI15N60M2-EP
4.1
TO-220FP package information
Figure 20: TO-220FP package outline
10/15
DocID027373 Rev 1
STF15N60M2-EP, STFI15N60M2-EP
Dim.
Package mechanical
data
Table 10: TO-220FP mechanical data
mm
Min.
4.4
Typ.
Max.
4.6
A
B
2.5
2.7
D
2.5
2.75
0.7
E
0.45
0.75
1.15
1.15
4.95
2.4
F
1
F1
F2
G
1.70
1.70
5.2
G1
H
2.7
10
10.4
L2
L3
L4
L5
L6
L7
Dia
16
28.6
9.8
2.9
15.9
9
30.6
10.6
3.6
16.4
9.3
3
3.2
DocID027373 Rev 1
11/15
Package mechanical
data
STF15N60M2-EP, STFI15N60M2-EP
4.2
I²PAKFP (TO-281) package information
Figure 21: I²PAKFP (TO-281) package outline
8291506 Re v. C
12/15
DocID027373 Rev 1
STF15N60M2-EP, STFI15N60M2-EP
Package mechanical
data
Table 11: I²PAKFP (TO-281) mechanical data
mm
Typ.
–
Dim.
Min.
4.40
2.50
2.50
0.65
0.45
0.75
Max.
4.60
2.70
2.75
0.85
0.70
1.00
1.20
5.20
10.40
23.00
14.10
10.85
3.20
1.25
7.70
A
B
D
D1
E
F
F1
G
4.95
10.00
21.00
13.20
10.55
2.70
H
L1
L2
L3
L4
L5
L6
0.85
7.50
7.60
DocID027373 Rev 1
13/15
Revision history
STF15N60M2-EP, STFI15N60M2-EP
5
Revision history
Table 12: Document revision history
Date
Revision
Changes
First release.
26-Jan-2015
1
14/15
DocID027373 Rev 1
STF15N60M2-EP, STFI15N60M2-EP
IMPORTANT NOTICE
–
PLEASE READ CAREFULLY
STMicroelectronics NV and its subsidiaries (“ST”) reserve the rig
ht to make changes, corrections, enhancements, modifications, and
improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST
products before placing orders. ST products are
sold pursuant to ST’s terms and conditions of sale in place at the time of order
acknowledgement.
Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the
design o
f Purchasers’ products.
No license, express or implied, to any intellectual property right is granted by ST herein.
Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product.
ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners.
Information in this document supersedes and replaces information previously supplied in any prior versions of this document.
© 2015 STMicroelectronics
–
All rights reserved
DocID027373 Rev 1
15/15
