STMicroelectronics-STF16N65M2
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STF16N65M2
N-channel 650
V
,
0
.32
Ω
typ., 11 A MDmesh M2
Power MOSFET in a TO-220FP package
Datasheet
−
production data
Features
Order code
V
DS
@ T
Jmax
R
DS(on)
max
710 V
0.36
Ω
I
D
STF16N65M2
11 A
•
Extremely low gate charge
•
Excellent output capacitance (C
oss
) profile
•
100% avalanche tested
•
Zener-protected
Applications
72ꢀꢁꢁꢂ)3
•
Switching applications
Figure 1. Internal schematic diagram
Description
, TAB
This device is an N-channel Power MOSFET
developed using MDmesh™ M2 technology.
Thanks to its strip layout and an improved vertical
structure, the device exhibits low on-resistance
and optimized switching characteristics, rendering
it suitable for the most demanding high efficiency
converters.
AM15572v1
Table 1. Device summary
Order codes
Marking
16N65M2
Package
Packaging
STF16N65M2
TO-220FP
Tube
October 2014
DocID027084 Rev 1
1/13
This is information on a product in full production.
Contents
STF16N65M2
Contents
Electrical ratings
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Electrical characteristics
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6
Revision history
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
2/13
DocID027084 Rev 1
STF16N65M2
Electrical ratings
1
Electrical ratings
Table 2. Absolute maximum ratings
Parameter
Symbol
Value
Unit
V
GS
Gate-source voltage
± 25
11
V
A
(1)
I
D
Drain current (continuous) at T
C
= 25 °C
Drain current (continuous) at T
C
= 100 °C
Drain current (pulsed)
I
D
6.9
44
A
(2)
I
DM
A
P
TOT
T
o
tal dissipation at T
C
= 25 °C
Peak diode recovery voltage slope
MOSFET dv/dt ruggedness
25
W
dv/dt
(3)
dv/dt
(4)
15
V/ns
V/ns
50
Insulation withstand voltage (RMS) from
all three leads to external heat sink
V
ISO
2500
V
(t=1 s;TC=25 °C)
T
stg
T
j
Storage temperature
– 55 to 150
°C
Max. operating junction temperature
1. Limited
only by maximum temperature allowed.
2. Pulse
width limited by safe operating area.
3.
4.
I
≤
11 A, di/dt
≤
400 A/µs; V
≤
520 V
< V
, V
=400
V
.
(BR)DSS DD
SD
DS peak
V
DS
Table 3. Thermal data
Parameter
Symbol
Value
Unit
R
thj-case
Thermal resistance junction-case max
5
°C/W
°C/W
R
thj-amb
Thermal resistance junction-ambient max
62.50
Table 4. Avalanche characteristics
Symbol
Parameter
Value
Unit
Avalanche current, repetitive or not
repetitive (pulse width limited by T
jmax
I
AR
1.9
A
)
Single pulse avalanche energy (starting
T
j
=25°C, I
D
= I
AR
; V
DD
=50)
E
AS
360
mJ
DocID027084 Rev 1
3/13
13
Electrical characteristics
STF16N65M2
2
Electrical characteristics
(T
C
= 25 °C unless otherwise specified)
Table 5. On /off states
Test conditions
Symbol
Parameter
Drain-source
Min.
Typ.
Max. Unit
V
(BR)DSS
V
GS
= 0, I
D
= 1 mA
650
V
breakdown voltage
V
GS
= 0, V
DS
= 650 V
GS
= 0, V
DS
= 650 V,
1
µA
µA
Zero gate voltage
drain current
I
DSS
V
100
T
C
=125 °C
Gate-body leakage
current
I
GSS
V
DS
= 0, V
GS
= ± 25 V
±10
4
µA
V
V
GS(th)
R
DS(on)
Gate threshold voltage
V
DS
= V
GS
, I
D
= 250 µA
Static drain-source
2
3
V
GS
= 10
V
,
I
D
= 5.5 A
0.32
0.36
Ω
on-resistance
Table 6. Dynamic
Test conditions
Symbol
Parameter
Min.
Typ.
Max. Unit
C
iss
Input capacitance
Output capacitance
–
–
718
32
–
–
pF
pF
C
oss
V
GS
= 0, V
DS
= 100 V,
f = 1 MHz
Reverse transfer
capacitance
C
rss
–
–
–
1.1
189
5.2
–
–
–
pF
pF
Ω
Equivalent output
capacitance
(1)
C
oss eq.
V
GS
= 0, V
DS
= 0 to 520 V
f = 1 MHz open drain
Intrinsic gate
resistance
R
G
Q
g
Q
gs
Q
gd
T
o
tal gate charge
Gate-source charge
Gate-drain charge
–
–
–
19.5
4
–
nC
nC
nC
V
DD
= 520 V, I
D
= 11 A,
–
8.3
–
1.
C
is defined as a constant equivalent capacitance giving the same charging time as C
when V
DS
oss eq.
oss
increases from 0 to 80% V
DSS
4/13
DocID027084 Rev 1
STF16N65M2
Electrical characteristics
Table 7. Switching times
Test conditions
Symbol
Parameter
Min.
Typ.
Max. Unit
t
d(on)
t
r
t
d(off)
t
f
Turn-on delay time
Rise time
–
–
–
–
11.3
8.2
–
–
–
–
ns
ns
ns
ns
V
DD
= 325 V, I
D
= 5.5 A,
R
G
= 4.7
Ω
,
V
GS
= 10 V
Turn-off delay time
Fall time
36
11.3
Table 8. Source drain diode
Test conditions
Symbol
Parameter
Min. Typ. Max.
Unit
I
SD
Source-drain current
–
–
–
–
–
–
–
–
–
11
44
A
A
(1)
I
SDM
Source-drain current (pulsed)
Forward on voltage
(2)
V
SD
V
GS
= 0, I
SD
= 11 A
SD
= 11 A, di/dt = 100 A/µs
1.6
V
t
rr
Q
rr
Reverse recovery time
Reverse recovery charge
Reverse recovery current
Reverse recovery time
Reverse recovery charge
Reverse recovery current
342
3.5
ns
µC
A
I
I
RRM
t
rr
20.4
458
4.6
ns
µC
A
I
SD
= 11 A, di/dt = 100 A/µs
Q
rr
V
DD
= 60
V
,
T
j
=150 °C
I
RRM
20.5
1. Pulse
width limited by safe operating area
2. Pulsed:
pulse duration = 300 µs, duty cycle 1.5%
DocID027084 Rev 1
5/13
13
Electrical characteristics
STF16N65M2
2.1
Electrical characteristics (curves)
Figure 2. Safe operating area
Figure 3. Thermal impedance
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Figure 4. Output characteristics
Figure 5. Transfer characteristics
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Figure 6. Normalized gate threshold voltage vs.
Figure 7. Normalized V
(BR)DSS
vs. temperature
temperature
GIPD180920141442FSR
GIPD180920141448FSR
V
GS(th)
(norm)
V
(BR)DSS
(norm)
I
D
= 250 µA
1.1
1.08
1.04
1.00
I
D
= 1mA
1.0
0.9
0.8
0.96
0.92
0.88
0.7
0.6
-75
-25
25
75
125
-75
-25
25
75
125
T
j
(°C)
T
j
(°C)
6/13
DocID027084 Rev 1
STF16N65M2
Electrical characteristics
Figure 8. Static drain-source on-resistance
Figure 9. Normalized on-resistance vs.
temperature
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GIPD180920141459FSR
R
DS(on)
(norm)
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9
*6
ꢅꢂꢀ9
2.2
ꢀꢁꢈꢉ
ꢀꢁꢈꢈ
ꢀꢁꢈꢇ
V
GS
= 10V
1.8
1.4
1
0.6
0.2
ꢀꢁꢈꢂ
ꢀꢁꢈꢀ
ꢀ
ꢇ
ꢉ
ꢎ
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ꢂꢀ
,
‘
ꢃ$ꢄ
-75
-25
25
75
125
T
j
(°C)
Figure 10. Gate charge vs. gate-source voltage
Figure 11. Capacitance variations
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4
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ꢃQ&ꢄ
ꢀꢁꢂ
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Figure 12. Output capacitance stored energy
Figure 13. Source-drain diode forward
characteristics
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DocID027084 Rev 1
7/13
13
Test circuits
STF16N65M2
3
Test circuits
Figure 14. Switching times test circuit for
resistive load
Figure 15. Gate charge test circuit
V
DD
12V
47k
Ω
1k
Ω
100nF
2200
μ
F
3.3
μ
F
R
L
I
G
=CONST
V
DD
100
Ω
V
i
=20V=V
GMAX
D.U.T.
V
D
R
G
V
GS
2200
μ
F
D.U.T.
V
G
2.7k
Ω
47k
Ω
P
W
1k
Ω
P
W
AM01468v1
AM01469v1
Figure 16. Test circuit for inductive load
switching and diode recovery times
Figure 17. Unclamped inductive load test circuit
L
A
A
A
B
D
S
FAST
DIODE
L=100
μ
H
V
D
G
2200
μ
F
D.U.T.
B
3.3
μ
F
V
DD
3.3
μ
F
1000
μ
F
B
V
DD
25
Ω
I
D
D
G
R
G
S
V
i
D.U.T.
P
w
AM01470v1
AM01471v1
Figure 18. Unclamped inductive waveform
Figure 19. Switching time waveform
t
on
t
off
td
off
9
ꢃ%5ꢄ’66
t
r
t
f
td
on
9
‘
90%
10%
90%
,
‘0
10%
V
GS
V
DS
,
‘
0
0
9
”
9
”
90%
10%
$0ꢀꢂꢉꢌꢇYꢂ
AM01473v1
8/13
DocID027084 Rev 1
STF16N65M2
Package mechanical data
4
Package mechanical data
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK
®
packages, depending on their level of environmental compliance. ECOPACK
®
ECOPACK
®
is an ST trademark.
DocID027084 Rev 1
9/13
13
Package mechanical data
STF16N65M2
Figure 20. TO-220FP drawing
7012510_Rev_K_B
10/13
DocID027084 Rev 1
STF16N65M2
Package mechanical data
Table 9. TO-220FP mechanical data
mm
Dim.
Min.
Typ.
Max.
A
B
4.4
2.5
4.6
2.7
D
2.5
2.75
0.7
E
0.45
0.75
1.15
1.15
4.95
2.4
F
1
F1
F2
G
1.70
1.70
5.2
G1
H
2.7
10
10.4
L2
L3
L4
L5
L6
L7
Ø
16
28.6
9.8
2.9
15.9
9
30.6
10.6
3.6
16.4
9.3
3
3.2
DocID027084 Rev 1
11/13
13
Revision history
STF16N65M2
5
Revision history
Table 10. Document revision history
Changes
Date
Revision
24-Oct-2014
1
First release.
12/13
DocID027084 Rev 1
STF16N65M2
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L
Y
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© 2014 STMicroelectronics – All rights reserved
DocID027084 Rev 1
13/13
13
