STMicroelectronics-STF18N60DM2

Part #STMicroelectronics-STF18N60DM2
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STMicroelectronics-STF18N60DM2
STF18N60DM2  
Datasheet  
N-channel 600
V
,
0
.260 Ω typ., 12 A MDmesh DM2  
Power MOSFET in a TO-220FP package  
Features  
V
R
max.  
I
D
Order code  
STF18N60DM2  
DS  
DS(on)  
600 V  
0.295 Ω  
12 A  
•
•
•
•
•
•
Fast-recovery body diode  
Extremely low gate charge and input capacitance  
Low on-resistance  
3
2
1
100% avalanche tested  
TO-220FP  
Extremely high dv/dt ruggedness  
Zener-protected  
D(2)  
Applications  
G(1)  
•
Switching applications  
Description  
This high-voltage N-channel Power MOSFET is part of the MDmesh DM2 fast-  
recovery diode series. It offers very low recovery charge (Q

rr

) and time (t

rr

) combined  
with low R

DS(on)

, rendering it suitable for the most demanding high-efficiency  
converters and ideal for bridge topologies and ZVS phase-shift converters.  
S(3)  
AM15572v1_no_tab  
Product status links  
Product summary  
Order code  
Marking  
STF18N60DM2  
18N60DM2  
TO-220FP  
Tube  
Package  
Packing  
DS10966
–
Rev 5
–
June 2019  
For further information contact your local STMicroelectronics sales office.  

STF18N60DM2  
Electrical ratings  
1
Electrical ratings  
Table 1.
Absolute maximum ratings  
Parameter  
Symbol  
Value  
Unit  
V
V
Gate-source voltage  
±25  
12  
GS  
I
Drain current (continuous) at T  
Drain current (continuous) at T  
= 25 °C  
A
D
case  
case  
I
= 100 °C  
7.6  
48  
A
D
I
Drain current (pulsed)  
A
DM  
P
TOT  
T
o
tal power dissipation at T  
= 25 °C  
case  
25  
W
dv/dt

dv/dt

Peak diode recovery voltage slope  
MOSFET dv/dt ruggedness  
40  
V/ns  
kV  
50  
Insulation withstand voltage (RMS) from all three leads to external heat  
sink  
V
2.5  
ISO  
(t = 1 s; T
 
= 25 °C)  
C
T
Storage temperature range  
°C  
°C  
stg  
–55 to 150  
T
Operating junction temperature range  
j
1. Pulse
 
width is limited by safe operating area.  
2.  
3.  
I
≤ 12, di/dt ≤ 400 A/µs, V  
< V  
, V
 
= 400 V  
DD  
SD  
DS(peak)  
(BR)DSS  
V
≤ 480 V  
DS  
Table 2.
Thermal data  
Symbol  
Parameter  
Value  
5
Unit  
R
thj-case  
Thermal resistance junction-case  
Thermal resistance junction-ambient  
°C/W  
R
thj-amb  
62.5  
Table 3.
Avalanche characteristics  
Symbol  
Parameter  
Value  
Unit  
Avalanche current, repetitive or not repetitive  
I
2.5  
A
AR  
(pulse width limited by T  
)
jmax  
Single pulse avalanche energy  
(starting T
 
= 25 °C, I
 
= I
 
, V
 
= 50 V)  
E
380  
mJ  
AR  
j
D
AR  
DD  
DS10966
–
Rev 5  
page 2/12  
 
 
 
 
 
 

STF18N60DM2  
Electrical characteristics  
2
Electrical characteristics  
(T

case

= 25 °C unless otherwise specified)  
Table 4.
Static  
Symbol  
Parameter  
Test conditions  
Min.  
Typ.  
Max.  
Unit  
V
Drain-source breakdown  
voltage  
V
V
= 0
V
, I
 
= 1
m
A  
600  
(BR)DSS  
GS  
D
V
V
T
= 0
V
, V
 
=
6
00 V  
1
µA  
GS  
DS  
I
= 0
V
, V
 
=
6
00 V,  
Zero gate voltage drain current  
DSS  
GS  
DS  
100  
µA  
= 125 °C

case  
I
V
= 0
V
, V
 
=
±
25 V  
GS  
Gate-body leakage current  
Gate threshold voltage  
±5  
5
µA  
V
GSS  
DS  
DS  
V
V
V
= V
 
, I
 
= 250 µA  
3
4
GS(th)  
GS  
D
Static drain-source on-  
resistance  
R
DS(on)  
= 10
V
, I
 
= 6 A  
D
0.260 0.295  
Ω
GS  
1. Defined
 
by design, not subject to production test.  
Table 5.
Dynamic  
Symbol  
Parameter  
Input capacitance  
Test conditions  
Min.  
Typ.  
800  
40  
Max.  
Unit  
pF  
pF  
pF  
pF  
Ω
C
iss  
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
C
oss  
V
V
= 100
V
, f = 1
M
Hz, V
 
= 0 V  
Output capacitance  
DS  
GS  
C
Reverse transfer capacitance  
Equivalent output capacitance  
Intrinsic gate resistance  
T
o
tal gate charge  
1.33  
80  
rss  
= 0 to 480
V
, f = 1
M
Hz, V
 
= 0 V  
C
oss eq.  
DS  
GS  
R
G
f = 1 MHz, I
 
=0 A  
D
5.6  
20  
Q
g
nC  
nC  
nC  
V
= 480
V
, I
 
=
1
2 A, V
 
= 0 to 10 V  
D GS  
DD  
Q
gs  
Gate-source charge  
5.2  
8.5  
Q
Gate-drain charge  
gd  
1.  
C
oss eq.  
is defined as a constant equivalent capacitance giving the same charging time as C  
when V
 
increases from 0  
oss DS  
to 80% V  
DSS  
Table 6.
Switching times  
Test conditions  
Symbol  
Parameter  
Turn-on delay time  
Min.  
Typ.  
13.5  
8
Max.  
Unit  
ns  
t
–
–
–
–
–
–
–
–
d(on)  
V
V
= 300
V
, I
 
= 6 A R
 
=
4
.7 Ω,  
D G  
DD  
t
Rise time  
ns  
r
GS  
t
Turn-off delay time  
Fall time  
9.5  
ns  
d(off)  
t
32.5  
ns  
f
DS10966
–
Rev 5  
page 3/12  
 
 
 
 

STF18N60DM2  
Electrical characteristics  
Table 7.
Source-drain diode  
Test conditions  
Symbol  
Parameter  
Source-drain current  
Min.  
Typ.  
Max.  
12  
Unit  
A
I
–
–
–
–
–
–
–
–
–
SD  
I
Source-drain current (pulsed)  
Forward on voltage  
48  
A
SDM  
V
V
= 0
V
, I
 
=
1
2 A  
SD  
1.6  
V
GS  
SD  
t
Reverse recovery time  
Reverse recovery charge  
Reverse recovery current  
Reverse recovery time  
Reverse recovery charge  
Reverse recovery current  
125  
0.675  
11  
ns  
μC  
A
rr  
I
= 12 A, di/dt = 100 A/µs, V
 
= 60 V  
DD  
SD  
Q
rr  
I
RRM  
t
190  
1.225  
13  
ns  
μC  
A
rr  
I
= 12 A, di/dt = 100 A/µs, V
 
= 60
V
,  
DD  
SD  
T =
 
150 °C (see

j
Q
rr  
I
RRM  
1. Pulse
 
width is limited by safe operating area.  
2. Pulse
 
test: pulse duration = 300 µs, duty cycle 1.5%.  
DS10966
–
Rev 5  
page 4/12  
 
 
 

STF18N60DM2  
Electrical characteristics (curves)  
2.1  
Electrical characteristics (curves)  
Figure 1.
Safe operating area  
Figure 2.
Thermal impedance  
GIPG260320151622ALS  
GC20940  
K
I

D  

(A)  
10

1  

10

-1  

10

-2  

10

-3  

10 μs  
10

0  

100 μs  
1 ms  
10 ms  
10

-1  

10

-2  

T

j

≤
150  
°C  
T

c

= 25 °C  
single pulse  
10

-1  

10

0  

10

1  

10

2  

10

-4  

10

-3  

10

-2  

10

-1  

10

0  

V

DS

(V)  
t

p

(s)  
Figure 3.
Output characteristics  
Figure 4.
Transfer characteristics  
GIPG290415FQ6GOCH  
GIPG290415FQ6GTCH  
I

D  

I

D  

(A)  
(A)  
V

GS

= 7,8,9,10 V  
V

DS

= 12 V  
24  
24  
20  
16  
12  
8
20  
16  
12  
8
V

GS

= 6 V  
4
0
4
0
V

GS

= 5 V  
12 V
 

DS

(V)  
0
2
4
6
8
10  
2
3
4
5
6
7
8
V

GS

(V)  
Figure 5.
Gate charge vs gate-source voltage  
Figure 6.
Static drain-source on-resistance  
GIPG250320151541ALS  
GIPG250320151528ALS  
V

GS

(V)  
R

DS(on)  

V
DS  
(Ω)  
(V)  
V

DD

= 480 V  
I

D

= 12 A  
12  
10  
8
600  
0.275  
V

DS  

500  
400  
300  
200  
100  
V

GS

= 10 V  
0.270  
0.265  
0.260  
0.255  
0.250  
6
4
2
0
0
0
4
8
12  
16  
20  
Q

g

(nC)  
0
2
4
6
8
10  
12  
I

D

(A)  
DS10966
–
Rev 5  
page 5/12  
 

STF18N60DM2  
Electrical characteristics (curves)  
Figure 8.
Normalized gate threshold voltage vs  
temperature  
Figure 7.
Capacitance variations  
GIPG250320151620ALS  
C
(pF)  
GIPG250320151515ALS  
V

GS(th)  

(norm.)  
1.1  
10

3  

I

D

= 250 μA  
C

ISS  

1.0  
0.9  
0.8  
0.7  
0.6  
10

2  

10

1  

10

0  

C

OSS  

f = 1 MHz  
C

RSS  

10

-1  

10

0  

10

1  

10

2  

V

DS

(V)  
-75  
-25  
25  
75  
125  
T

j

(°C)  
Figure 10.
Normalized V

(BR)DSS

vs temperature  
Figure 9.
Normalized on-resistance vs temperature  
GIPG250320151534ALS  
R

DS(on)  

(norm.)  
GIPG250320151522ALS  
V

(BR)DSS  

(norm.)  
2.2  
1.08  
1.04  
1.00  
0.96  
V

GS

= 10 V  
I

D

= 1 mA  
1.8  
1.4  
1.0  
0.6  
0.2  
0.92  
0.88  
-75  
-25  
25  
75  
125  
T

j

(°C)  
-75  
-25  
25  
75  
125  
T

j

(°C)  
Figure 11.
Source-drain diode forward characteristics  
Figure 12.
Output capacitance stored energy  
GIPG250320151630ALS  
GIPD280120161127EOS  
V

SD  

E

OSS  

(V)  
(µJ)  
T

j

= -50 °C  
1.1  
1.0  
0.9  
0.8  
0.7  
0.6  
0.5  
6
5
4
3
2
T

j

= 25 °C  
T

j

= 150 °C  
1
0
0
2
4
6
8
10  
12  
I

SD

(A)  
0
100 200 300 400 500 600
 
V

DS

(V)  
DS10966
–
Rev 5  
page 6/12  

STF18N60DM2  
Test circuits  
3
Test circuits  
Figure 13.
Test circuit for resistive load switching times  
Figure 14.
Test circuit for gate charge behavior  
V

DD  

12 V  
47 kΩ  
1 kΩ  
100 nF  
R

L  

2200  
μF  
3.3  
μF  
V

DD  

+
I

G

= CONST  
2.7 kΩ  
V

D  

R

G  

D.U.
T
.  
100 Ω  
V

GS  

pulse width  
+
D.U.
T
.  
V

GS  

V

G  

2200  
μF  
pulse width  
47 kΩ  
1 kΩ  
AM01469v1  
AM01468v1  
Figure 15.
Test circuit for inductive load switching and  
diode recovery times  
Figure 16.
Unclamped inductive load test circuit  
L
A
A
A
D
S
V

D  

100 µH  
D
fast  
G
D.U.
T
.  
B
diode  
2200  
3.3  
µF  
+
V

DD  

1000  
µF  
B
µF  
3.3  
µF  
B
+
V

DD  

25 Ω  
I

D  

G
D.U.
T
.  
R

G  

S
+
_
D.U.
T
.  
V

i  

pulse width  
AM01471v1  
AM01470v1  
Figure 18.
Switching time waveform  
Figure 17.
Unclamped inductive waveform  
t

on  

t

d(on)  

t

off  

t

d(off)  

V
(BR)DSS  
t

r  

t

f  

V
D  
90%  
90%  
I
DM  
V

DS  

10%  
V

GS  

10%  
0
0
I
D  
V
DD  
V
DD  
90%  
10%  
AM01472v1  
AM01473v1  
DS10966
–
Rev 5  
page 7/12  
 
 
 
 

STF18N60DM2  
Package information  
4
Package information  
In order to meet environmental requirements, ST offers these devices in different grades of

packages,  
depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product  
status are available at:

. ECOPACK is an ST trademark.  
4.1  
TO-220FP package information  
Figure 19.
TO-220FP package outline  
7012510_Rev_13_B  
DS10966
–
Rev 5  
page 8/12  
 
 

STF18N60DM2  
TO-220FP package information  
Table 8.
TO-220FP package mechanical data  
mm  
Dim.  
Min.  
4.40  
2.50  
2.50  
0.45  
0.75  
1.15  
1.15  
4.95  
2.40  
10.00  
Typ.  
Max.  
4.60  
2.70  
2.75  
0.70  
1.00  
1.70  
1.70  
5.20  
2.70  
10.40  
A
B
D
E
F
F1  
F2  
G
G1  
H
L2  
L3  
L4  
L5  
L6  
L7  
Dia  
16.00  
28.60  
9.80  
2.90  
15.90  
9.00  
3.00  
30.60  
10.60  
3.60  
16.40  
9.30  
3.20  
DS10966
–
Rev 5  
page 9/12  

STF18N60DM2  
Revision history  
Table 9.
Document revision history  
Date  
Revision  
Changes  
01-Apr-2015  
1
First release.  
T
e
xt edits throughout document  
In
Section 2.1 Electrical characteristics (curves)
:  
– updated
Figure 4: Output characteristics  
– updated
Figure 5: Transfer characteristics  
21-May-2015  
2
Updated title and I
 
values in
features
and
T
a
ble 1  
02-Jul-2015  
28-Jan-2016  
3
4
D
Updated
Section 2.1: “Electrical characteristics (curves)”
.  
10-Jun-2019  
5
Minor text changes.  
DS10966
–
Rev 5  
page 10/12  
 

STF18N60DM2  
Contents  
Contents  

Electrical ratings

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
.

Electrical characteristics

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
.

Electrical characteristics (curves)

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Test circuits

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
.

Package information

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
.

TO-220FP package information

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Revision history

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

DS10966
–
Rev 5  
page 11/12  

STF18N60DM2  
IMPORTANT NOTICE – PLEASE READ CAREFULLY  
STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST  
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products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement.  
Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of  
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Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product.  
ST and the ST logo are trademarks of S
T
.
F
or additional information about ST trademarks, please refer to

. All other product or service  
names are the property of their respective owners.  
Information in this document supersedes and replaces information previously supplied in any prior versions of this document.  
© 2019 STMicroelectronics – All rights reserved  
DS10966
–
Rev 5  
page 12/12