STMicroelectronics-STF26NM60N

Part #STMicroelectronics-STF26NM60N
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STMicroelectronics-STF26NM60N
STF26NM60N  
N-
channel 600 V, 0.135 Ω typ., 20 A MDmesh™ II  
Power MOSFET in a TO-220FP package  
Datasheet – production data  
Features  
Order code  
V

DS  

R

DS(on)

max  
I

D  

STF26NM60N  
600 V  
0.165 Ω  
20 A  
100% avalanche tested  
Low input capacitance and gate charge  
Low gate input resistance  
Applications  
TO-220FP  
Switching applications  
Description  
Figure 1: Internal schematic diagram  
This device is an N-channel Power MOSFET  
developed using the second generation of  
D(2)  
MDmesh™ technology. This revolutionary Power  
MOSFET associates a vertical structure to the  
company’s strip layout to yield one of the world’s  
lowest on-resistance and gate charge. It is  
therefore suitable for the most demanding high  
efficiency converters.  
G(1)  
S(3)  
AM01475v1_n
o
T
a
b_noZen  
Table 1: Device summary  
Order code  
Marking  
Package  
Packaging  
STF26NM60N  
26NM60N  
TO-220FP  
Tube  
December 2016  
DocID030178 Rev 1  
1/13  
This is information on a product in full production.  

STF26NM60N  
Electrical ratings  
1
Electrical ratings  
Table 2: Absolute maximum ratings  
Symbol  
V

DS  

Parameter  
Value  
600  
±30  
20  
Unit  
V
Drain-source voltage  
Gate-source voltage  
V

GS  

V
Drain current (continuous) at T

C

= 25 °C  
Drain current (continuous) at T

C

= 100 °C  
Drain current (pulsed)  
A
12.6  
80  
A
I

DM  

A
P

TOT  

Total dissipation at T

C

= 25 °C  
35  
W
V/ns  
dv/d

Peak diode recovery voltage slope  
15  
Insulation withstand voltage (RMS) from all three leads to external  
heat sink  
V

ISO  

2500  
V
(t = 1 s; T

C

= 25 °C)  
T

stg  

T

j  

Storage temperature range  
-55 to 150  
°C  
Operating junction temperature range  
Notes:  

(1)

Limited by package.  

(2)

Pulse width limited by safe operating area.  
(3)  
I
≤ 20 A, di/dt ≤ 400 A/µs, V

DS(peak)

≤ V

(BR)DSS,

V

DD

≤ 80% V

(BR)DSS  

SD  
Table 3: Thermal data  
Symbol  
R

thj-case  

R

thj-amb  

Parameter  
Thermal resistance junction-case  
Thermal resistance junction-ambient  
Value  
3.6  
Unit  
°C/W  
°C/W  
62.5  
Table 4: Avalanche characteristics  
Symbol  
Parameter  
Value  
Unit  
Single pulse avalanche current (pulse width limited by T

jmax  

)
I

AS  

6
A
Single pulse avalanche energy  
E

AS  

610  
mJ  
(starting T

J

=25 °C, I

D

=I

AR

, V

DD

=50 V)  
DocID030178 Rev 1  
3/13  
 
 

Electrical characteristics  
STF26NM60N  
2
Electrical characteristics  
(T

CASE

= 25 °C unless otherwise specified)  
Table 5: On/off states  
Symbol  
Parameter  
Drain-source  
Test conditions  
I

D

= 1 mA, V

GS

= 0 V  
V

GS

= 0 V, V

DS

= 600 V  
Min. Typ.  
Max. Unit  
V

(BR)DSS  

600  
V
breakdown voltage  
1
Zero gate voltage drain  
current  
I

DSS  

µA  
V

GS

= 0 V, V

DS

= 600 V,  
T

C

= 125

100  
I

GSS  

Gate-body leakage current
 
V

DS

= 0 V, V

GS

= ±25 V  
±0.1  
4
µA  
V
V

GS(th)  

Gate threshold voltage  
V

DS

= V

GS

, I

D

= 250 µA  
2
3
Static drain-source on-  
resistance  
R

DS(on)  

V

GS

= 10 V, I

D

= 10 A  
0.135 0.165  
Ω
Notes:  

(1)

Defined by design, not subject to production test.  
Table 6: Dynamic  
Test conditions  
Symbol  
C

iss  

Parameter  
Input capacitance  
Output capacitance  
Min. Typ. Max. Unit  
–
–
1800  
115  
–
–
pF  
pF  
V

DS

= 50 V, f = 1 MHz,  
V

GS

= 0 V  
C

oss  

Reverse transfer  
capacitance  
C

rss  

–
–
6
–
–
pF  
pF  
Equivalent output  
capacitance  
C

oss eq

V

GS

= 0 V, V

DS

= 0 to 480 V  
V

DD

= 480 V, I

D

= 20 A,  
310  
Q

g  

Total gate charge  
–
–
60  
–
–
nC  
nC  
V

GS

= 10 V  
Q

gs  

Gate-source charge  
8.5  
Q

gd  

R

G  

Gate-drain charge  
–
–
30  
–
–
nC  
Gate input resistance  
f=1 MHz, I

D

=0 A  
2.8  
Ω
Notes:  
(1)  
C
oss eq.  
is defined as a constant equivalent capacitance giving the same charging time as C

oss

when V

DS  

increases from 0 to 80% V

DS  

Table 7: Switching times  
Test conditions  
Symbol  
Parameter  
Min. Typ. Max. Unit  
t

d(on)  

t

r  

Turn-on delay time  
Rise time  
V

DD

= 300 V, I

D

= 10 A,  
R

G

= 4.7 Ω, V

GS

= 10 V  
–
–
–
13  
25  
85  
–
–
–
ns  
ns  
ns  
t

d(off)  

Turn-off delay time  
t

f  

Fall time  
–
50  
–
ns  
4/13  
DocID030178 Rev 1  
 
 

STF26NM60N  
Symbol  
Electrical characteristics  
Min. Typ. Max. Unit  
Table 8: Source-drain diode  
Test conditions  
Parameter  
Source-drain current  
–
–
20  
80  
A
A
Source-drain current  
(pulsed)  
t

rr  

Forward on voltage  
I

SD

= 20 A, V

GS

= 0 V  
–
–
–
1.5  
V
Reverse recovery time  
Reverse recovery charge  
I

SD

= 20 A, di/dt = 100 A/µs  
370  
5.8  
ns  
µC  
V

DD

= 60 V  
Q

rr  

I

RRM  

Reverse recovery current  
–
31.6  
A
t

rr  

Reverse recovery time  
I

SD

= 20 A, di/dt = 100 A/µs  
–
–
450  
7.5  
ns  
V

DD

= 60 V, T

j

= 150 °C (see  
Q

rr  

Reverse recovery charge  
µC  
I

RRM  

Reverse recovery current  
–
32.5  
A
Notes:  

(1)

Pulse width limited by package.  

(2)

Pulse width limited by safe operating area.  

(3)

Pulsed: pulse duration = 300 µs, duty cycle 1.5%  
DocID030178 Rev 1  
5/13  
 
 
 

Electrical characteristics  
STF26NM60N  
2.1  
Electrical characteristics (curves)  
Figure 3: Thermal impedance  
Figure 2: Safe operating area  
Figure 5: Transfer characteristics  
Figure 4: Output characteristics  
Figure 6: Gate charge vs gate-source voltage  
Figure 7: Static drain-source on-resistance  
W
6/13  
DocID030178 Rev 1  

STF26NM60N  
Figure 8: Capacitance variations  
Electrical characteristics  
Figure 9: Source-drain diode forward characteristics  
Figure 10: Normalized gate threshold voltage vs  
temperature  
Figure 11: Normalized on-resistance vs temperature  
Figure 12: Normalized V

(BR)DSS

vs temperature  
DocID030178 Rev 1  
7/13  

Test circuits  
STF26NM60N  
3
Test circuits  
Figure 13: Test circuit for resistive load  
switching times  
Figure 14: Test circuit for gate charge  
behavior  
Figure 15: Test circuit for inductive load  
switching and diode recovery times  
Figure 16: Unclamped inductive load test  
circuit  
Figure 17: Unclamped inductive waveform  
Figure 18: Switching time waveform  
8/13  
DocID030178 Rev 1  

STF26NM60N  
Package information  
4
Package information  
In order to meet environmental requirements, ST offers these devices in different grades of  
ECOPACK

®

packages, depending on their level of environmental compliance. ECOPACK

®  

specifications, grade definitions and product status are available at:

.  
ECOPACK

®

is an ST trademark.  
DocID030178 Rev 1  
9/13  

Package information  
STF26NM60N  
4.1  
TO-220FP package information  
Figure 19: TO-220FP package outline  
10/13  
DocID030178 Rev 1  

STF26NM60N  
Package information  
Table 9: TO-220FP package mechanical data  
mm  
Dim.  
Min.  
4.4  
Typ.  
Max.  
4.6  
A
B
2.5  
2.7  
D
2.5  
2.75  
0.7  
E
0.45  
0.75  
1.15  
1.15  
4.95  
2.4  
F
1
F1  
F2  
G
1.70  
1.70  
5.2  
G1  
H
2.7  
10  
10.4  
L2  
L3  
L4  
L5  
L6  
L7  
Dia  
16  
28.6  
9.8  
2.9  
15.9  
9
30.6  
10.6  
3.6  
16.4  
9.3  
3
3.2  
DocID030178 Rev 1  
11/13  

Revision history  
STF26NM60N  
5
Revision history  
Table 10: Document revision history  
Changes  
Date  
Revision  
13-Dec-2016  
1
First release. Part number previously included in datasheet DocID15642  
12/13  
DocID030178 Rev 1  

STF26NM60N  
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–
PLEASE READ CAREFULLY  
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der  
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Information in this document supersedes and replaces information previously supplied in any prior versions of this document.  
© 2016 STMicroelectronics
–
All rights reserved  
DocID030178 Rev 1  
13/13