STMicroelectronics-STF4N80K5
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STD4N80K5, STF4N80K5,
STP4N80K5, STU4N80K5
N-channel 800 V, 2.1
Ω
typ., 3 A MDmesh™ K5
Power MOSFE
T
s
in DPAK, TO-220F
P
,
T
O-220 and IPAK packages
Datasheet
–
production data
Features
T
A
B
Order code
V
DS
R
DS(on)
max.
I
D
P
TOT
3
1
STD4N80K5
STF4N80K5
STP4N80K5
STU4N80K5
60 W
20 W
3
DPAK
2
1
800 V
2.5
Ω
3 A
TO-220FP
TAB
60 W
TAB
•
Industry’s lowest R
DS(on)
x area
3
3
2
2
1
•
Industry’s best figure of merit (FoM)
•
Ultra low gate charge
1
IPAK
TO-220
•
100% avalanche tested
•
Zener-protected
Figure 1.
Internal schematic diagram
‘ꢀꢁꢂꢃ7$%ꢄ
Applications
•
Switching applications
Description
*ꢀꢅꢄ
These very high voltage N-channel Power
MOSFE
T
s
a
re designed using MDmesh™ K5
technology based on an innovative proprietary
vertical structure. The result is a dramatic
reduction in on-resistance and ultra-low gate
charge for applications requiring superior power
density and high efficiency.
6ꢀꢆꢄ
AM01476v1
Table 1. Device summary
Order code
Marking
Packages
Packaging
STD4N80K5
STF4N80K5
STP4N80K5
STU4N80K5
DPAK
TO-220FP
TO-220
IPAK
T
a
pe and reel
4N80K5
Tube
February 2015
DocID025105 Rev 3
1/23
This is information on a product in full production.
Contents
STD4N80K5, STF4N80K5, STP4N80K5, STU4N80K5
Contents
Electrical ratings
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Electrical characteristics
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6
Revision history
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
2/23
DocID025105 Rev 3
STD4N80K5, STF4N80K5, STP4N80K5, STU4N80K5
Electrical ratings
1
Electrical ratings
Table 2. Absolute maximum ratings
Value
Symbol
Parameter
Unit
DPAK,
IPAK
TO-220FP
TO-220
V
DS
V
GS
I
D
Drain-source voltage
800
±30
V
V
Gate- source voltage
Drain current (continuous) at T
C
= 25 °C
Drain current (continuous) at T
C
= 100 °C
Drain current (pulsed)
3
3
(1)
3
A
A
I
D
1.7
12
60
1.7
(1)
12
(1)
20
1.7
12
60
(2)
I
DM
A
P
TOT
I
AR
T
o
tal dissipation at T
C
= 25 °C
W
Avalanche current, repetitive or not-
repetitive (pulse width limited by T
J
max)
1
A
Single pulse avalanche energy
E
AS
74.5
mJ
(starting T
J
= 25 °C, I
D
= I
AR
, V
DD
= 50 V)
dv/dt
(3)
Peak diode recovery voltage slope
dv/dt
(4)
MOSFET dv/dt ruggedness
4.5
50
V/ns
V/ns
Insulation withstand voltage (RMS) from all
V
ISO
three leads to external heat sink
(t = 1 s, T
C
= 25 °C)
2500
V
T
J
Operating junction temperature
Storage temperature
°C
°C
-55 to 150
T
stg
1. Limited
by maximum junction temperature
2. Pulse
width limited by safe operating area
3.
4.
I
< 3
A, di/dt
< 100
A/µs, V
≤
V
DS(peak) (BR)DSS
SD
V
≤
640 V
DS
Table 3. Thermal data
Value
TO-220FP
6.25
Symbol
Parameter
Unit
DPAK,
IPAK
TO-220
R
thj-case
Thermal resistance junction-case max
2.08
2.08
°C/W
°C/W
°C/W
R
thj-amb
Thermal resistance junction-ambient max
62.5
(1)
R
thj-pcb
Thermal resistance junction-pcb max
50
1. When
mounted on 1inch² FR-4 board, 2 oz Cu
DocID025105 Rev 3
3/23
23
Electrical characteristics
STD4N80K5, STF4N80K5, STP4N80K5, STU4N80K5
2
Electrical characteristics
(
T
c
ase =25 °C unless otherwise specified)
Table 4. On /off states
Test conditions
Symbol
Parameter
Drain-source
Min.
Typ.
Max. Unit
V
(BR)DSS
I
D
= 1 mA, V
GS
= 0
800
V
breakdown voltage
V
V
DS
= 800 V
1
µA
µA
Zero gate voltage
I
DSS
drain current (V
GS
= 0)
DS
= 800 V, T
C
=125 °C
50
Gate-body leakage
current (V
DS
= 0)
I
GSS
V
GS
= ± 20 V
±10
5
µA
V
V
GS(th)
R
DS(on)
Gate threshold voltage
V
DS
= V
GS
, I
D
= 100 µA
3
4
Static drain-source on-
V
GS
= 10
V
,
I
D
= 1.5 A
resistance
2.1
2.5
Ω
Table 5. Dynamic
Symbol
Parameter
Input capacitance
Output capacitance
Test conditions
Min.
Typ.
175
18
Max. Unit
C
iss
–
–
–
–
pF
pF
C
oss
V
DS
= 100
V
, f = 1
M
Hz,
V
GS
= 0
Reverse transfer
capacitance
C
rss
–
–
0.5
26
–
–
pF
pF
Equivalent
capacitance time
related
(1)
C
o(tr)
V
DS
= 0 to 640
V
, V
GS
= 0
V
DS
= 0 to 640
V
, V
GS
= 0
Equivalent
capacitance energy
related
(2)
C
o(er)
–
11
–
pF
R
g
Q
g
Gate input resistance
f=1 MHz, I
D
= 0
T
o
tal gate charge
–
–
–
–
15
10.5
2
–
–
–
–
Ω
nC
nC
nC
V
DD
= 640 V, I
D
= 3 A,
Q
gs
Q
gd
Gate-source charge
Gate-drain charge
V
GS
= 10 V
7.5
1. Time
related is defined as a constant equivalent capacitance giving the same charging time as C
when
oss
V
increases from 0 to 80% V
DS
DSS
2. Energy
related is defined as a constant equivalent capacitance giving the same stored energy as C
oss
when V
increases from 0 to 80% V
DS
DSS
4/23
DocID025105 Rev 3
STD4N80K5, STF4N80K5, STP4N80K5, STU4N80K5
Electrical characteristics
Min. Typ. Max.
Unit
Table 6. Switching times
Symbol
Parameter
Test conditions
t
d(on)
t
r
t
d(off)
t
f
Turn-on delay time
Rise time
–
–
–
–
16.5
15
–
–
–
–
ns
ns
ns
ns
V
DD
= 400
V
, I
D
= 1.5 A,
R
G
= 4.7
Ω
,
V
GS
= 10 V
Turn-off-delay time
Fall time
36
21
Table 7. Source drain diode
Test conditions
Symbol
Parameter
Min. Typ. Max. Unit
I
SD
Source-drain current
–
3
A
A
(1)
I
SDM
Source-drain current (pulsed)
Forward on voltage
12
1.5
(2)
V
SD
I
SD
= 3 A, V
GS
= 0
–
–
–
–
–
–
–
V
t
rr
Q
rr
Reverse recovery time
Reverse recovery charge
Reverse recovery current
Reverse recovery time
Reverse recovery charge
Reverse recovery current
242
1.42
12
ns
µC
A
I
SD
= 3 A, di/dt = 100 A/µs
V
DD
= 60 V
I
RRM
t
rr
373
1.98
10.5
ns
µC
A
I
SD
= 3 A, di/dt = 100 A/µs
Q
rr
V
DD
= 60 V T
J
= 150 °C
I
RRM
1. Pulse
width limited by safe operating area
2. Pulsed:
pulse duration = 300 µs, duty cycle 1.5%
Table 8. Gate-source Zener diode
Symbol
Parameter
Test conditions
Min. Typ. Max.
Unit
30
Gate-source breakdown
voltage
V
(BR)GSO
I
GS
= ± 1 mA, I
D
=0
–
V
The built-in back-to-back Zener diodes have been specifically designed to enhance the ESD
capability of the device. The Zener voltage is appropriate for efficient and cost-effective
intervention to protect the device integrity. These integrated Zener diodes thus eliminate the
need for external components.
DocID025105 Rev 3
5/23
23
Electrical characteristics
STD4N80K5, STF4N80K5, STP4N80K5, STU4N80K5
2.1
Electrical characteristics (curves)
Figure 2. Safe operating area for DPAK and
Figure 3. Thermal impedance for DPAK and
IPAK
IPAK
AM15986v1
I
D
(A)
Tj=150°C
Tc=25°C
Single pulse
10
10µs
100µs
1
1ms
10ms
0.1
0.01
10
V
DS
(V)
0.1
1
100
Figure 4. Safe operating area for TO-220FP
Figure 5. Thermal impedance for TO-220FP
AM15987v1
I
D
(A)
Tj=150°C
Tc=25°C
Single pulse
10
10µs
1
100µs
1ms
0.1
10ms
0.01
10
V
DS
(V)
0.1
1
100
Figure 6. Safe operating area for TO-220
Figure 7. Thermal impedance for TO-220
AM15988v1
I
D
(A)
Tj=150°C
Tc=25°C
Single pulse
10
10µs
100µs
1
1ms
10ms
0.1
0.01
10
V
DS
(V)
0.1
1
100
6/23
DocID025105 Rev 3
STD4N80K5, STF4N80K5, STP4N80K5, STU4N80K5
Electrical characteristics
Figure 8. Output characteristics
Figure 9. Transfer characteristics
AM15989v1
AM15990v1
I
D
(A)
D
(A)
I
V
GS
=10, 11 V
V
DS
=20V
5
5
4
3
2
9V
8V
4
3
2
7V
6V
1
1
0
0
12
7
8
9
10
4
8
16
V
DS
(V)
6
V
GS
(V)
0
5
Figure 10. Gate charge vs gate-source voltage
Figure 11. Static drain-source on-resistance
*,3’ꢉꢅꢉꢅꢅꢉꢇꢊꢇꢂꢊꢊ59
AM15991v1
V
GS
(V)
5
‘6ꢀRQꢁ
ꢀȍꢁ
V
DS
(V)
V
DD
=640V
I
D
=3A
V
DS
12
600
9
ꢇꢉ9
*6
ꢄꢃꢅ
ꢂꢃꢄ
500
400
300
200
100
10
8
6
ꢅꢃꢆ
ꢇꢃꢈ
ꢇꢃꢉ
4
2
0
0
8
0
2
4
6
10
Q
g
(nC)
ꢉ
ꢇ
ꢅ
ꢂ
ꢄ
ꢊ
,’ꢀ$ꢁ
Figure 12. Capacitance variations
Figure 13. Normalized gate threshold voltage vs
temperature
*,3’ꢉꢅꢉꢅꢅꢉꢇꢊꢇꢄꢇꢉ59
AM15639v1
V
GS(th)
&
ꢀS)ꢁ
(norm)
I
D
=100µA
V
DS
=V
GS
ꢇꢉꢉꢉ
ꢇꢉꢉ
1
&LVV
0.8
ꢇꢉ
ꢇ
&RVV
&UVV
0.6
0.4
I ꢇ0+]
ꢉꢃꢇ
ꢉꢃꢇ
ꢇꢉꢉ
-50
ꢇ
ꢇꢉ
9
‘
6
ꢀ9ꢁ
0
50
T
J
(°C)
100
DocID025105 Rev 3
7/23
23
Electrical characteristics
STD4N80K5, STF4N80K5, STP4N80K5, STU4N80K5
Figure 14. Normalized on-resistance vs
temperature
Figure 15. Source-drain diode forward
characteristics
AM15640v1
AM15994v1
R
DS(on)
V
SD
(norm)
(V)
V
GS
=10V
I
D
=1.5 A
2.4
1
T
J
=-50°C
0.9
0.8
0.7
0.6
0.5
2
T
J
=25°C
1.6
1.2
T
J
=150°C
1.5
0.8
0.4
-50
0.5
1
2
T
J
(°C)
I
SD
(A)
0
50
2.5
100
Figure 16. Normalized V
DS
vs temperature
Figure 17. Maximum avalanche energy vs.
starting T
J
AM15642v1
AM15995v1
V
DS
(norm)
E
AS
(mJ)
1.1
I
D
= 1mA
60
1.06
1.02
40
0.98
0.94
0.9
20
0
-50
0
120
T
J
(°C)
T
J
(°C)
0
50
40
80
100
8/23
DocID025105 Rev 3
STD4N80K5, STF4N80K5, STP4N80K5, STU4N80K5
Test circuits
3
Test circuits
Figure 18. Switching times test circuit for
resistive load
Figure 19. Gate charge test circuit
V
DD
12V
47k
Ω
1k
Ω
100nF
2200
μ
F
3.3
μ
F
R
L
I
G
=CONST
V
DD
100
Ω
V
i
=20V=V
GMAX
D.U.T.
V
D
R
G
V
GS
2200
μ
F
D.U.T.
V
G
2.7k
Ω
47k
Ω
P
W
1k
Ω
P
W
AM01468v1
AM01469v1
Figure 20. Test circuit for inductive load
switching and diode recovery times
Figure 21. Unclamped inductive load test circuit
L
A
A
A
B
D
S
FAST
DIODE
L=100
μ
H
V
D
G
2200
μ
F
D.U.T.
B
3.3
μ
F
V
DD
3.3
μ
F
1000
μ
F
B
V
DD
25
Ω
I
D
D
G
R
G
S
V
i
D.U.T.
P
w
AM01470v1
AM01471v1
Figure 22. Unclamped inductive waveform
Figure 23. Switching time waveform
t
on
t
off
td
off
V
(BR)DSS
t
r
t
f
td
on
V
D
90%
10%
90%
I
DM
10%
V
GS
V
DS
I
D
0
0
V
DD
V
DD
90%
10%
AM01472v1
AM01473v1
DocID025105 Rev 3
9/23
23
Package information
STD4N80K5, STF4N80K5, STP4N80K5, STU4N80K5
4
Package information
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK
®
packages, depending on their level of environmental compliance. ECOPACK
®
ECOPACK
®
is an ST trademark.
10/23
DocID025105 Rev 3
STD4N80K5, STF4N80K5, STP4N80K5, STU4N80K5
Package information
4.1
DPAK(TO-252), package information
Figure 24. DPAK (TO-252) type A outline
ꢉꢉꢆꢈꢋꢋꢅB5
DocID025105 Rev 3
11/23
23
Package information
STD4N80K5, STF4N80K5, STP4N80K5, STU4N80K5
Figure 25. DPAK (TO-252) mechanical data
mm
Dim.
Min.
Typ.
Max.
A
A1
A2
b
2.20
0.90
0.03
0.64
5.20
0.45
0.48
6.00
2.40
1.10
0.23
0.90
5.40
0.60
0.60
6.20
b4
c
c2
D
D1
E
5.10
6.40
6.60
E1
e
4.70
2.28
e1
H
4.40
9.35
1.00
4.60
10.10
1.50
L
L1
L2
L4
R
2.80
0.80
0.60
0°
1.00
8°
0.20
V2
12/23
DocID025105 Rev 3
STD4N80K5, STF4N80K5, STP4N80K5, STU4N80K5
Figure 26. DPAK (TO-252) footprint
(a)
Package information
)3ꢉꢉꢆꢈꢋꢋꢅB5
a. All
dimensions are in millimeters
DocID025105 Rev 3
13/23
23
Package information
STD4N80K5, STF4N80K5, STP4N80K5, STU4N80K5
Figure 27. TO-220FP outline
4.2
TO-220F
P
,
p
ackage information
7012510_Rev_K_B
14/23
DocID025105 Rev 3
STD4N80K5, STF4N80K5, STP4N80K5, STU4N80K5
Package information
Table 9. TO-220FP mechanical data
mm
Dim.
Min.
Typ.
Max.
A
B
4.4
2.5
4.6
2.7
D
2.5
2.75
0.7
E
0.45
0.75
1.15
1.15
4.95
2.4
F
1
F1
F2
G
1.70
1.70
5.2
G1
H
2.7
10
10.4
L2
L3
L4
L5
L6
L7
Dia
16
28.6
9.8
2.9
15.9
9
30.6
10.6
3.6
16.4
9.3
3
3.2
DocID025105 Rev 3
15/23
23
Package information
STD4N80K5, STF4N80K5, STP4N80K5, STU4N80K5
Figure 28. TO-220 type A outline
4.3
TO-220, package information
ꢉꢉꢇꢊꢌꢈꢈBWSH$B5HYB7
16/23
DocID025105 Rev 3
STD4N80K5, STF4N80K5, STP4N80K5, STU4N80K5
Package information
Table 10. TO-220 type A mechanical data
mm
Dim.
Min.
Typ.
Max.
A
b
4.40
0.61
1.14
0.48
15.25
4.60
0.88
1.70
0.70
15.75
b1
c
D
D1
E
1.27
10
10.40
2.70
5.15
1.32
6.60
2.72
14
e
2.40
4.95
1.23
6.20
2.40
13
e1
F
H1
J1
L
L1
L20
L30
3.50
3.93
16.40
28.90
∅
Q
P
3.75
2.65
3.85
2.95
DocID025105 Rev 3
17/23
23
Package information
STD4N80K5, STF4N80K5, STP4N80K5, STU4N80K5
4.4
IPAK(TO-251), package information
Figure 29. IPAK (TO-251) type A outline
ꢉꢉꢆꢈꢋꢋꢇB0
18/23
DocID025105 Rev 3
STD4N80K5, STF4N80K5, STP4N80K5, STU4N80K5
Package information
Table 11. IPAK (TO-251) type A mechanical data
mm.
typ.
DIM
min.
max.
A
A1
b
2.20
0.90
0.64
2.40
1.10
0.90
0.95
5.40
b2
b4
B5
c
5.20
0.30
0.45
0.48
6.00
6.40
0.60
0.60
6.20
6.60
c2
D
E
e
2.28
e1
H
4.40
4.60
16.10
L
9.00
0.80
9.40
1.20
1.00
L1
L2
V1
0.80
10°
DocID025105 Rev 3
19/23
23
Packaging mechanical data
STD4N80K5, STF4N80K5, STP4N80K5, STU4N80K5
5
Packaging mechanical data
Table 12. DPAK (TO-252) tape and reel mechanical data
Tape Reel
mm
mm
Dim.
Dim.
Min.
Max.
Min.
Max.
A0
B0
B1
D
6.8
7
A
B
C
D
G
N
T
330
10.4
10.6
12.1
1.6
1.5
12.8
20.2
16.4
50
13.2
18.4
22.4
1.5
1.5
D1
E
1.65
7.4
1.85
7.6
F
K0
P0
P1
P2
R
2.55
3.9
2.75
4.1
Base qty.
Bulk qty.
2500
2500
7.9
8.1
1.9
2.1
40
T
0.25
15.7
0.35
16.3
W
20/23
DocID025105 Rev 3
STD4N80K5, STF4N80K5, STP4N80K5, STU4N80K5
Packaging mechanical data
Figure 30. Tape for DPAK (TO-252)
10 pitches cumulative
tolerance on tape +/- 0.2 mm
P0
D
Top cover
tape
P2
T
E
F
W
K0
B1
B0
For machine ref. only
including draft and
A0
D1
P1
radii concentric around B0
User direction of feed
R
Bending radius
User direction of feed
AM08852v1
Figure 31. Reel for DPAK (TO-252)
T
REEL DIMENSIONS
40mm min.
Access hole
At sl
ot location
B
D
C
N
A
G measured at hub
Full radius
Tape slot
in core for
tape start 25 mm min.
width
AM08851v2
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Revision history
STD4N80K5, STF4N80K5, STP4N80K5, STU4N80K5
6
Revision history
Table 13. Document revision history
Changes
Date
Revision
09-Aug-2013
1
First release
– Added: IPAK package
13-Dec-2013
04-Feb-2015
2
3
– Minor text changes
– Updated title and description in cover page.
data
.
– Minor text changes.
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